Registers in AddressMap abc_soc_top/dlnk/jesdabc2/pipe_phy_1x4lane_map/pipe_phy_VERSA/versa_PMA0/PMA_RXWORD_Q0/PMA_RXWORD_regs

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AddressMap abc_soc_top/dlnk/jesdabc2/pipe_phy_1x4lane_map/pipe_phy_VERSA/versa_PMA0/PMA_RXWORD_Q0/PMA_RXWORD_regs

AddressUnit: 8

Accessible over:
Group NOC.rcs__axi Mem with fixed address

Address EndAddress Name Description
0x00000000 ffe_coeff_set0_0 placeholder
0x00000004 ffe_coeff_set0_1 placeholder
0x00000008 ffe_coeff_set0_2 placeholder
0x0000000c ffe_coeff_set0_3 placeholder
0x00000010 ffe_coeff_set0_4 placeholder
0x00000014 ffe_coeff_set1_0 placeholder
0x00000018 ffe_coeff_set1_1 placeholder
0x0000001c ffe_coeff_set1_2 placeholder
0x00000020 ffe_coeff_set1_3 placeholder
0x00000024 ffe_coeff_set1_4 placeholder
0x00000028 ffe_coeff_set2_0 placeholder
0x0000002c ffe_coeff_set2_1 placeholder
0x00000030 ffe_coeff_set2_2 placeholder
0x00000034 ffe_coeff_set2_3 placeholder
0x00000038 ffe_coeff_set2_4 placeholder
0x0000003c ffe_coeff_set3_0 placeholder
0x00000040 ffe_coeff_set3_1 placeholder
0x00000044 ffe_coeff_set3_2 placeholder
0x00000048 ffe_coeff_set3_3 placeholder
0x0000004c ffe_coeff_set3_4 placeholder
0x00000050 ffe_coeff_set4_0 placeholder
0x00000054 ffe_coeff_set4_1 placeholder
0x00000058 ffe_coeff_set4_2 placeholder
0x0000005c ffe_coeff_set4_3 placeholder
0x00000060 ffe_coeff_set4_4 placeholder
0x00000064 ffe_coeff_set5_0 placeholder
0x00000068 ffe_coeff_set5_1 placeholder
0x0000006c ffe_coeff_set5_2 placeholder
0x00000070 ffe_coeff_set5_3 placeholder
0x00000074 ffe_coeff_set5_4 placeholder
0x00000078 ffe_coeff_set6_0 placeholder
0x0000007c ffe_coeff_set6_1 placeholder
0x00000080 ffe_coeff_set6_2 placeholder
0x00000084 ffe_coeff_set6_3 placeholder
0x00000088 ffe_coeff_set6_4 placeholder
0x0000008c ffe_coeff_set7_0 placeholder
0x00000090 ffe_coeff_set7_1 placeholder
0x00000094 ffe_coeff_set7_2 placeholder
0x00000098 ffe_coeff_set7_3 placeholder
0x0000009c ffe_coeff_set7_4 placeholder
0x000000a0 ffe_coeff_set8_0 placeholder
0x000000a4 ffe_coeff_set8_1 placeholder
0x000000a8 ffe_coeff_set8_2 placeholder
0x000000ac ffe_coeff_set8_3 placeholder
0x000000b0 ffe_coeff_set8_4 placeholder
0x000000b4 ffe_coeff_set9_0 placeholder
0x000000b8 ffe_coeff_set9_1 placeholder
0x000000bc ffe_coeff_set9_2 placeholder
0x000000c0 ffe_coeff_set9_3 placeholder
0x000000c4 ffe_coeff_set9_4 placeholder
0x000000c8 0x000000cb (Not allocated)
0x000000cc ffe_coeff_set10_0 placeholder
0x000000d0 ffe_coeff_set10_1 placeholder
0x000000d4 ffe_coeff_set10_2 placeholder
0x000000d8 ffe_coeff_set10_3 placeholder
0x000000dc ffe_coeff_set10_4 placeholder
0x000000e0 ffe_coeff_set11_0 placeholder
0x000000e4 ffe_coeff_set11_1 placeholder
0x000000e8 ffe_coeff_set11_2 placeholder
0x000000ec ffe_coeff_set11_3 placeholder
0x000000f0 ffe_coeff_set11_4 placeholder
0x000000f4 ffe_coeff_set12_0 placeholder
0x000000f8 ffe_coeff_set12_1 placeholder
0x000000fc ffe_coeff_set12_2 placeholder
0x00000100 ffe_coeff_set12_3 placeholder
0x00000104 ffe_coeff_set12_4 placeholder
0x00000108 ffe_coeff_set13_0 placeholder
0x0000010c ffe_coeff_set13_1 placeholder
0x00000110 ffe_coeff_set13_2 placeholder
0x00000114 ffe_coeff_set13_3 placeholder
0x00000118 ffe_coeff_set13_4 placeholder
0x0000011c ffe_coeff_set14_0 placeholder
0x00000120 ffe_coeff_set14_1 placeholder
0x00000124 ffe_coeff_set14_2 placeholder
0x00000128 ffe_coeff_set14_3 placeholder
0x0000012c ffe_coeff_set14_4 placeholder
0x00000130 ffe_coeff_set15_0 placeholder
0x00000134 ffe_coeff_set15_1 placeholder
0x00000138 ffe_coeff_set15_2 placeholder
0x0000013c ffe_coeff_set15_3 placeholder
0x00000140 ffe_coeff_set15_4 placeholder
0x00000144 0x00000147 (Not allocated)
0x00000148 ffe_slice_level_set0 placeholder
0x0000014c ffe_slice_level_set1 placeholder
0x00000150 ffe_slice_level_set2 placeholder
0x00000154 ffe_slice_level_set3 placeholder
0x00000158 ffe_slice_level_set4 placeholder
0x0000015c ffe_slice_level_set5 placeholder
0x00000160 ffe_slice_level_set6 placeholder
0x00000164 ffe_slice_level_set7 placeholder
0x00000168 ffe_slice_level_set8 placeholder
0x0000016c ffe_slice_level_set9 placeholder
0x00000170 ffe_slice_level_set10 placeholder
0x00000174 ffe_slice_level_set11 placeholder
0x00000178 ffe_slice_level_set12 placeholder
0x0000017c ffe_slice_level_set13 placeholder
0x00000180 ffe_slice_level_set14 placeholder
0x00000184 ffe_slice_level_set15 placeholder
0x00000188 ffe_err_level_m1m3_set0 placeholder
0x0000018c ffe_err_level_p1p3_set0 placeholder
0x00000190 ffe_err_level_m1m3_set1 placeholder
0x00000194 ffe_err_level_p1p3_set1 placeholder
0x00000198 ffe_err_level_m1m3_set2 placeholder
0x0000019c ffe_err_level_p1p3_set2 placeholder
0x000001a0 ffe_err_level_m1m3_set3 placeholder
0x000001a4 ffe_err_level_p1p3_set3 placeholder
0x000001a8 ffe_err_level_m1m3_set4 placeholder
0x000001ac ffe_err_level_p1p3_set4 placeholder
0x000001b0 ffe_err_level_m1m3_set5 placeholder
0x000001b4 ffe_err_level_p1p3_set5 placeholder
0x000001b8 ffe_err_level_m1m3_set6 placeholder
0x000001bc ffe_err_level_p1p3_set6 placeholder
0x000001c0 ffe_err_level_m1m3_set7 placeholder
0x000001c4 ffe_err_level_p1p3_set7 placeholder
0x000001c8 ffe_err_level_m1m3_set8 placeholder
0x000001cc ffe_err_level_p1p3_set8 placeholder
0x000001d0 ffe_err_level_m1m3_set9 placeholder
0x000001d4 ffe_err_level_p1p3_set9 placeholder
0x000001d8 ffe_err_level_m1m3_set10 placeholder
0x000001dc ffe_err_level_p1p3_set10 placeholder
0x000001e0 ffe_err_level_m1m3_set11 placeholder
0x000001e4 ffe_err_level_p1p3_set11 placeholder
0x000001e8 ffe_err_level_m1m3_set12 placeholder
0x000001ec ffe_err_level_p1p3_set12 placeholder
0x000001f0 ffe_err_level_m1m3_set13 placeholder
0x000001f4 ffe_err_level_p1p3_set13 placeholder
0x000001f8 ffe_err_level_m1m3_set14 placeholder
0x000001fc ffe_err_level_p1p3_set14 placeholder
0x00000200 ffe_err_level_m1m3_set15 placeholder
0x00000204 ffe_err_level_p1p3_set15 placeholder
0x00000208 rx_dump_mem_ctrl placeholder
0x0000020c rx_dump_mem_apb_rd_data placeholder
0x00000210 rx_dump_mem_apb_rd_en placeholder
0x00000214 rx_dump_mem_apb_en placeholder
0x00000218 rx_data_path_control_1 placeholder
0x0000021c adp_msb_lsb_swap_ctrl placeholder
0x00000220 ffe_float_tap_position1 placeholder
0x00000224 ffe_float_tap_position2 placeholder
0x00000228 ffe_float_tap_position3 placeholder
0x0000022c rxeq_clock_gating_ctrl_0 placeholder
0x00000230 rxeq_clock_gating_ctrl_1 placeholder
0x00000234 rxeq_clock_gating_ctrl_2 placeholder
0x00000238 rxeq_clock_gating_ctrl_3 placeholder
0x0000023c rxeq_clock_gating_ctrl_4 placeholder
0x00000240 rxeq_clock_gating_ctrl_6 placeholder
0x00000244 rxeq_clock_gating_ctrl_7 placeholder
0x00000248 rxeq_clock_gating_ctrl_8 placeholder
0x0000024c 0x0000028b (Not allocated)
0x0000028c adc_slicer_level_set0_control placeholder
0x00000290 adc_slicer_level_set1_control placeholder
0x00000294 adc_slicer_level_set2_control placeholder
0x00000298 adc_slicer_level_set3_control placeholder
0x0000029c adc_slicer_level_set4_control placeholder
0x000002a0 adc_slicer_level_set5_control placeholder
0x000002a4 adc_slicer_level_set6_control placeholder
0x000002a8 adc_slicer_level_set7_control placeholder
0x000002ac adc_slicer_level_set8_control placeholder
0x000002b0 adc_slicer_level_set9_control placeholder
0x000002b4 adc_slicer_level_set10_control placeholder
0x000002b8 adc_slicer_level_set11_control placeholder
0x000002bc adc_slicer_level_set12_control placeholder
0x000002c0 adc_slicer_level_set13_control placeholder
0x000002c4 adc_slicer_level_set14_control placeholder
0x000002c8 adc_slicer_level_set15_control placeholder
0x000002cc adc_err_level_set0_control placeholder
0x000002d0 adc_err_level_set1_control placeholder
0x000002d4 adc_err_level_set2_control placeholder
0x000002d8 adc_err_level_set3_control placeholder
0x000002dc adc_err_level_set4_control placeholder
0x000002e0 adc_err_level_set5_control placeholder
0x000002e4 adc_err_level_set6_control placeholder
0x000002e8 adc_err_level_set7_control placeholder
0x000002ec adc_err_level_set8_control placeholder
0x000002f0 adc_err_level_set9_control placeholder
0x000002f4 adc_err_level_set10_control placeholder
0x000002f8 adc_err_level_set11_control placeholder
0x000002fc adc_err_level_set12_control placeholder
0x00000300 adc_err_level_set13_control placeholder
0x00000304 adc_err_level_set14_control placeholder
0x00000308 adc_err_level_set15_control placeholder
0x0000030c rxsararray_valid_calassist_ctrl0 Rx SAR Array Valid Calibration Assistance Control
0x00000310 rxsararray_valid_calassist_ctrl1 Rx SAR Array Valid Calibration Assistance Control
0x00000314 rxsararray_valid_calassist_ctrl2 Rx SAR Array Valid Calibration Assistance Control
0x00000318 rxsararray_valid_calassist_status Rx SAR Array Valid Calibration Assistance Status
0x0000031c rxsar_calassist_ctrl Rx SAR Calibration Assistance Control
0x00000320 rxsar_calassist_status Rx SAR Calibration Assistance Status
0x00000324 0x000003eb (Not allocated)
0x000003ec main_fsm_control_6 placeholder
0x000003f0 main_fsm_control_0 placeholder
0x000003f4 main_fsm_status_0 placeholder
0x000003f8 main_fsm_control_1 placeholder
0x000003fc main_fsm_control_2 placeholder
0x00000400 main_fsm_control_3 placeholder
0x00000404 taps_set_control placeholder
0x00000408 rx_gearbox_ctrl Rx Gearbox Control
0x0000040c main_fsm_control_4 placeholder
0x00000410 main_fsm_control_5 placeholder
0x00000414 vref_control_1 placeholder
0x00000418 vref_control_2 placeholder
0x0000041c vref_control_3 placeholder
0x00000420 vref_control_4 placeholder
0x00000424 vref_control_5 placeholder
0x00000428 vref_control_6 placeholder
0x0000042c 0x0000042f (Not allocated)
0x00000430 vref_status_0 placeholder
0x00000434 vga_control_6 placeholder
0x00000438 vga_control_5 placeholder
0x0000043c vga_control_4 placeholder
0x00000440 vga_control_0 placeholder
0x00000444 vga_control_1 placeholder
0x00000448 vga_control_2 placeholder
0x0000044c vga_control_3 placeholder
0x00000450 vga_status_0 placeholder
0x00000454 jpp_control_1 placeholder
0x00000458 jpp_control_2 placeholder
0x0000045c 0x0000045f (Not allocated)
0x00000460 ffe_control_0 placeholder
0x00000464 ffe_control_1 placeholder
0x00000468 ffe_control_2 placeholder
0x0000046c ffe_control_3 placeholder
0x00000470 ffe_control_4 placeholder
0x00000474 ffe_control_5 placeholder
0x00000478 0x0000047b (Not allocated)
0x0000047c ffe_status_0 placeholder
0x00000480 0x0000048f (Not allocated)
0x00000490 hist_control_0 placeholder
0x00000494 hist_control_1 placeholder
0x00000498 hist_control_2 placeholder
0x0000049c hist_control_3 placeholder
0x000004a0 hist_control_4 placeholder
0x000004a4 hist_control_5 placeholder
0x000004a8 hist_control_6 placeholder
0x000004ac hist_control_7 placeholder
0x000004b0 hist_control_8 placeholder
0x000004b4 hist_control_9 placeholder
0x000004b8 hist_control_10 placeholder
0x000004bc hist_control_11 placeholder
0x000004c0 hist_control_12 placeholder
0x000004c4 hist_control_13 placeholder
0x000004c8 hist_status_0 placeholder
0x000004cc hist_status_1 placeholder
0x000004d0 hist_status_2 placeholder
0x000004d4 hist_status_3 placeholder
0x000004d8 hist_status_4 placeholder
0x000004dc 0x000004df (Not allocated)
0x000004e0 hist_status_5 placeholder
0x000004e4 hist_status_6 placeholder
0x000004e8 hist_status_7 placeholder
0x000004ec hist_status_8 placeholder
0x000004f0 hist_status_9 placeholder
0x000004f4 hist_status_10 placeholder
0x000004f8 hist_status_11 placeholder
0x000004fc hist_status_12 placeholder
0x00000500 hist_status_13 placeholder
0x00000504 0x0000050f (Not allocated)
0x00000510 hist_status_14 placeholder
0x00000514 hist_status_15 placeholder
0x00000518 ops_control_1 placeholder
0x0000051c ops_control_2 placeholder
0x00000520 ops_control_3 placeholder
0x00000524 ops_control_4 placeholder
0x00000528 0x0000052b (Not allocated)
0x0000052c ops_status_1 placeholder
0x00000530 0x00000533 (Not allocated)
0x00000534 ops_status_2 placeholder
0x00000538 adcvref_control_1 placeholder
0x0000053c adcvref_control_2 placeholder
0x00000540 adcvref_control_3 placeholder
0x00000544 adcvref_control_4 placeholder
0x00000548 adcvref_control_5 placeholder
0x0000054c adcvref_control_6 placeholder
0x00000550 adcvref_status_0 placeholder
0x00000554 0x0000055f (Not allocated)
0x00000560 affe_control_0 placeholder
0x00000564 affe_control_1 placeholder
0x00000568 affe_control_2 placeholder
0x0000056c affe_control_3 placeholder
0x00000570 affe_status_0 placeholder
0x00000574 0x0000057b (Not allocated)
0x0000057c ofc_control_0 placeholder
0x00000580 ofc_control_1a placeholder
0x00000584 ofc_control_1b placeholder
0x00000588 ofc_control_2 placeholder
0x0000058c ofc_control_3 placeholder
0x00000590 ofc_status_0 placeholder
0x00000594 ffe_coeff_set0_frac_0 placeholder
0x00000598 ffe_coeff_set0_frac_1 placeholder
0x0000059c ffe_coeff_set0_frac_2 placeholder
0x000005a0 ffe_coeff_set0_frac_3 placeholder
0x000005a4 ffe_coeff_set0_frac_4 placeholder
0x000005a8 ffe_coeff_set0_frac_5 placeholder
0x000005ac ffe_coeff_set1_frac_0 placeholder
0x000005b0 ffe_coeff_set1_frac_1 placeholder
0x000005b4 ffe_coeff_set1_frac_2 placeholder
0x000005b8 ffe_coeff_set1_frac_3 placeholder
0x000005bc ffe_coeff_set1_frac_4 placeholder
0x000005c0 ffe_coeff_set1_frac_5 placeholder
0x000005c4 ffe_coeff_set2_frac_0 placeholder
0x000005c8 ffe_coeff_set2_frac_1 placeholder
0x000005cc ffe_coeff_set2_frac_2 placeholder
0x000005d0 ffe_coeff_set2_frac_3 placeholder
0x000005d4 ffe_coeff_set2_frac_4 placeholder
0x000005d8 ffe_coeff_set2_frac_5 placeholder
0x000005dc ffe_coeff_set3_frac_0 placeholder
0x000005e0 ffe_coeff_set3_frac_1 placeholder
0x000005e4 ffe_coeff_set3_frac_2 placeholder
0x000005e8 ffe_coeff_set3_frac_3 placeholder
0x000005ec ffe_coeff_set3_frac_4 placeholder
0x000005f0 ffe_coeff_set3_frac_5 placeholder
0x000005f4 ffe_coeff_set4_frac_0 placeholder
0x000005f8 ffe_coeff_set4_frac_1 placeholder
0x000005fc ffe_coeff_set4_frac_2 placeholder
0x00000600 ffe_coeff_set4_frac_3 placeholder
0x00000604 ffe_coeff_set4_frac_4 placeholder
0x00000608 ffe_coeff_set4_frac_5 placeholder
0x0000060c ffe_coeff_set5_frac_0 placeholder
0x00000610 ffe_coeff_set5_frac_1 placeholder
0x00000614 ffe_coeff_set5_frac_2 placeholder
0x00000618 ffe_coeff_set5_frac_3 placeholder
0x0000061c ffe_coeff_set5_frac_4 placeholder
0x00000620 ffe_coeff_set5_frac_5 placeholder
0x00000624 ffe_coeff_set6_frac_0 placeholder
0x00000628 ffe_coeff_set6_frac_1 placeholder
0x0000062c ffe_coeff_set6_frac_2 placeholder
0x00000630 ffe_coeff_set6_frac_3 placeholder
0x00000634 ffe_coeff_set6_frac_4 placeholder
0x00000638 ffe_coeff_set6_frac_5 placeholder
0x0000063c ffe_coeff_set7_frac_0 placeholder
0x00000640 ffe_coeff_set7_frac_1 placeholder
0x00000644 ffe_coeff_set7_frac_2 placeholder
0x00000648 ffe_coeff_set7_frac_3 placeholder
0x0000064c ffe_coeff_set7_frac_4 placeholder
0x00000650 ffe_coeff_set7_frac_5 placeholder
0x00000654 ffe_coeff_set8_frac_0 placeholder
0x00000658 ffe_coeff_set8_frac_1 placeholder
0x0000065c ffe_coeff_set8_frac_2 placeholder
0x00000660 ffe_coeff_set8_frac_3 placeholder
0x00000664 ffe_coeff_set8_frac_4 placeholder
0x00000668 ffe_coeff_set8_frac_5 placeholder
0x0000066c ffe_coeff_set9_frac_0 placeholder
0x00000670 ffe_coeff_set9_frac_1 placeholder
0x00000674 ffe_coeff_set9_frac_2 placeholder
0x00000678 ffe_coeff_set9_frac_3 placeholder
0x0000067c ffe_coeff_set9_frac_4 placeholder
0x00000680 ffe_coeff_set9_frac_5 placeholder
0x00000684 ffe_coeff_set10_frac_0 placeholder
0x00000688 ffe_coeff_set10_frac_1 placeholder
0x0000068c ffe_coeff_set10_frac_2 placeholder
0x00000690 ffe_coeff_set10_frac_3 placeholder
0x00000694 ffe_coeff_set10_frac_4 placeholder
0x00000698 ffe_coeff_set10_frac_5 placeholder
0x0000069c ffe_coeff_set11_frac_0 placeholder
0x000006a0 ffe_coeff_set11_frac_1 placeholder
0x000006a4 ffe_coeff_set11_frac_2 placeholder
0x000006a8 ffe_coeff_set11_frac_3 placeholder
0x000006ac ffe_coeff_set11_frac_4 placeholder
0x000006b0 ffe_coeff_set11_frac_5 placeholder
0x000006b4 ffe_coeff_set12_frac_0 placeholder
0x000006b8 ffe_coeff_set12_frac_1 placeholder
0x000006bc ffe_coeff_set12_frac_2 placeholder
0x000006c0 ffe_coeff_set12_frac_3 placeholder
0x000006c4 ffe_coeff_set12_frac_4 placeholder
0x000006c8 ffe_coeff_set12_frac_5 placeholder
0x000006cc ffe_coeff_set13_frac_0 placeholder
0x000006d0 ffe_coeff_set13_frac_1 placeholder
0x000006d4 ffe_coeff_set13_frac_2 placeholder
0x000006d8 ffe_coeff_set13_frac_3 placeholder
0x000006dc ffe_coeff_set13_frac_4 placeholder
0x000006e0 ffe_coeff_set13_frac_5 placeholder
0x000006e4 ffe_coeff_set14_frac_0 placeholder
0x000006e8 ffe_coeff_set14_frac_1 placeholder
0x000006ec ffe_coeff_set14_frac_2 placeholder
0x000006f0 ffe_coeff_set14_frac_3 placeholder
0x000006f4 ffe_coeff_set14_frac_4 placeholder
0x000006f8 ffe_coeff_set14_frac_5 placeholder
0x000006fc ffe_coeff_set15_frac_0 placeholder
0x00000700 ffe_coeff_set15_frac_1 placeholder
0x00000704 ffe_coeff_set15_frac_2 placeholder
0x00000708 ffe_coeff_set15_frac_3 placeholder
0x0000070c ffe_coeff_set15_frac_4 placeholder
0x00000710 ffe_coeff_set15_frac_5 placeholder
0x00000714 ffe_err_level_frac_set0_0 placeholder
0x00000718 ffe_err_level_frac_set1_0 placeholder
0x0000071c ffe_err_level_frac_set2_0 placeholder
0x00000720 ffe_err_level_frac_set3_0 placeholder
0x00000724 ffe_err_level_frac_set4_0 placeholder
0x00000728 ffe_err_level_frac_set5_0 placeholder
0x0000072c ffe_err_level_frac_set6_0 placeholder
0x00000730 ffe_err_level_frac_set7_0 placeholder
0x00000734 ffe_err_level_frac_set8_0 placeholder
0x00000738 ffe_err_level_frac_set9_0 placeholder
0x0000073c ffe_err_level_frac_set10_0 placeholder
0x00000740 ffe_err_level_frac_set11_0 placeholder
0x00000744 ffe_err_level_frac_set12_0 placeholder
0x00000748 ffe_err_level_frac_set13_0 placeholder
0x0000074c ffe_err_level_frac_set14_0 placeholder
0x00000750 ffe_err_level_frac_set15_0 placeholder
0x00000754 adc_err_level_frac_set0_0 placeholder
0x00000758 adc_err_level_frac_set1_0 placeholder
0x0000075c adc_err_level_frac_set2_0 placeholder
0x00000760 adc_err_level_frac_set3_0 placeholder
0x00000764 adc_err_level_frac_set4_0 placeholder
0x00000768 adc_err_level_frac_set5_0 placeholder
0x0000076c adc_err_level_frac_set6_0 placeholder
0x00000770 adc_err_level_frac_set7_0 placeholder
0x00000774 adc_err_level_frac_set8_0 placeholder
0x00000778 adc_err_level_frac_set9_0 placeholder
0x0000077c adc_err_level_frac_set10_0 placeholder
0x00000780 adc_err_level_frac_set11_0 placeholder
0x00000784 adc_err_level_frac_set12_0 placeholder
0x00000788 adc_err_level_frac_set13_0 placeholder
0x0000078c adc_err_level_frac_set14_0 placeholder
0x00000790 adc_err_level_frac_set15_0 placeholder
0x00000794 affe_lms_set0 placeholder
0x00000798 affe_lms_set1 placeholder
0x0000079c affe_lms_set2 placeholder
0x000007a0 affe_lms_set3 placeholder
0x000007a4 affe_lms_set4 placeholder
0x000007a8 affe_lms_set5 placeholder
0x000007ac affe_lms_set6 placeholder
0x000007b0 affe_lms_set7 placeholder
0x000007b4 affe_lms_set8 placeholder
0x000007b8 affe_lms_set9 placeholder
0x000007bc affe_lms_set10 placeholder
0x000007c0 affe_lms_set11 placeholder
0x000007c4 affe_lms_set12 placeholder
0x000007c8 affe_lms_set13 placeholder
0x000007cc affe_lms_set14 placeholder
0x000007d0 affe_lms_set15 placeholder
0x000007d4 affe_lms_frac_set0 placeholder
0x000007d8 affe_lms_frac_set1 placeholder
0x000007dc affe_lms_frac_set2 placeholder
0x000007e0 affe_lms_frac_set3 placeholder
0x000007e4 affe_lms_frac_set4 placeholder
0x000007e8 affe_lms_frac_set5 placeholder
0x000007ec affe_lms_frac_set6 placeholder
0x000007f0 affe_lms_frac_set7 placeholder
0x000007f4 affe_lms_frac_set8 placeholder
0x000007f8 affe_lms_frac_set9 placeholder
0x000007fc affe_lms_frac_set10 placeholder
0x00000800 affe_lms_frac_set11 placeholder
0x00000804 affe_lms_frac_set12 placeholder
0x00000808 affe_lms_frac_set13 placeholder
0x0000080c affe_lms_frac_set14 placeholder
0x00000810 affe_lms_frac_set15 placeholder
0x00000814 saturation_status_0 placeholder
0x00000818 saturation_status_1 placeholder
0x0000081c 0x0000081f (Not allocated)
0x00000820 saturation_status_3 placeholder
0x00000824 zeroavg_status_0 placeholder
0x00000828 zeroavg_status_1 placeholder
0x0000082c 0x0000082f (Not allocated)
0x00000830 zeroavg_status_3 placeholder
0x00000834 adcofc_control_0 placeholder
0x00000838 adcofc_control_1 placeholder
0x0000083c adcofc_control_2 placeholder
0x00000840 adcofc_control_3 placeholder
0x00000844 adcofc_status_0 placeholder
0x00000848 edg_slice_control_0 placeholder
0x0000084c edg_slicer_level_set0_control placeholder
0x00000850 edg_slicer_level_set1_control placeholder
0x00000854 edg_slicer_level_set2_control placeholder
0x00000858 edg_slicer_level_set3_control placeholder
0x0000085c edg_slicer_level_set4_control placeholder
0x00000860 edg_slicer_level_set5_control placeholder
0x00000864 edg_slicer_level_set6_control placeholder
0x00000868 edg_slicer_level_set7_control placeholder
0x0000086c edgvref_control_1 placeholder
0x00000870 edgvref_control_2 placeholder
0x00000874 edgvref_control_3 placeholder
0x00000878 edgvref_control_4 placeholder
0x0000087c edgvref_control_5 placeholder
0x00000880 edgvref_control_6 placeholder
0x00000884 edgvref_frac_set0 placeholder
0x00000888 edgvref_frac_set1 placeholder
0x0000088c edgvref_frac_set2 placeholder
0x00000890 edgvref_frac_set3 placeholder
0x00000894 edgvref_frac_set4 placeholder
0x00000898 edgvref_frac_set5 placeholder
0x0000089c edgvref_frac_set6 placeholder
0x000008a0 edgvref_frac_set7 placeholder
0x000008a4 jpp_control_0 placeholder
0x000008a8 dfe_lms_control_0 placeholder
0x000008ac dfe_lms_control_1 placeholder
0x000008b0 dfe_lms_control_2 placeholder
0x000008b4 dfe_lms_control_3 placeholder
0x000008b8 dfe_lms_status_0 placeholder
0x000008bc dfe_lms_set0to3 placeholder
0x000008c0 dfe_lms_set4to7 placeholder
0x000008c4 dfe_lms_set8to11 placeholder
0x000008c8 dfe_lms_set12to15 placeholder
0x000008cc dfe_lms_frac_set0to3 placeholder
0x000008d0 dfe_lms_frac_set4to7 placeholder
0x000008d4 dfe_lms_frac_set8to11 placeholder
0x000008d8 dfe_lms_frac_set12to15 placeholder
0x000008dc dfe_control_0 placeholder
0x000008e0 rx_sararray_valid_0 Rx SAR Array valid
0x000008e4 rx_sararray_valid_1 Rx SAR Array valid
0x000008e8 cdr_ffe_pre1_set0to3 Rx SAR Array valid
0x000008ec cdr_ffe_pre1_set4to7 Rx SAR Array valid
0x000008f0 cdr_ffe_pre1_set8to11 Rx SAR Array valid
0x000008f4 cdr_ffe_pre1_set12to15 Rx SAR Array valid
0x000008f8 cdr_ffe_slicer_level_set0_control placeholder
0x000008fc cdr_ffe_slicer_level_set1_control placeholder
0x00000900 cdr_ffe_slicer_level_set2_control placeholder
0x00000904 cdr_ffe_slicer_level_set3_control placeholder
0x00000908 0x0000090b (Not allocated)
0x0000090c cdr_ffe_slicer_level_set4_control placeholder
0x00000910 cdr_ffe_slicer_level_set5_control placeholder
0x00000914 cdr_ffe_slicer_level_set6_control placeholder
0x00000918 cdr_ffe_slicer_level_set7_control placeholder
0x0000091c cdr_ffe_slicer_level_set8_control placeholder
0x00000920 cdr_ffe_slicer_level_set9_control placeholder
0x00000924 cdr_ffe_slicer_level_set10_control placeholder
0x00000928 cdr_ffe_slicer_level_set11_control placeholder
0x0000092c cdr_ffe_slicer_level_set12_control placeholder
0x00000930 cdr_ffe_slicer_level_set13_control placeholder
0x00000934 cdr_ffe_slicer_level_set14_control placeholder
0x00000938 cdr_ffe_slicer_level_set15_control placeholder
0x0000093c 0x0000093f (Not allocated)
0x00000940 cdr_ffe_err_level_m1m3_set0 placeholder
0x00000944 cdr_ffe_err_level_p1p3_set0 placeholder
0x00000948 cdr_ffe_err_level_m1m3_set1 placeholder
0x0000094c cdr_ffe_err_level_p1p3_set1 placeholder
0x00000950 cdr_ffe_err_level_m1m3_set2 placeholder
0x00000954 cdr_ffe_err_level_p1p3_set2 placeholder
0x00000958 cdr_ffe_err_level_m1m3_set3 placeholder
0x0000095c cdr_ffe_err_level_p1p3_set3 placeholder
0x00000960 cdr_ffe_err_level_m1m3_set4 placeholder
0x00000964 cdr_ffe_err_level_p1p3_set4 placeholder
0x00000968 cdr_ffe_err_level_m1m3_set5 placeholder
0x0000096c cdr_ffe_err_level_p1p3_set5 placeholder
0x00000970 cdr_ffe_err_level_m1m3_set6 placeholder
0x00000974 cdr_ffe_err_level_p1p3_set6 placeholder
0x00000978 cdr_ffe_err_level_m1m3_set7 placeholder
0x0000097c cdr_ffe_err_level_p1p3_set7 placeholder
0x00000980 cdr_ffe_err_level_m1m3_set8 placeholder
0x00000984 cdr_ffe_err_level_p1p3_set8 placeholder
0x00000988 cdr_ffe_err_level_m1m3_set9 placeholder
0x0000098c cdr_ffe_err_level_p1p3_set9 placeholder
0x00000990 cdr_ffe_err_level_m1m3_set10 placeholder
0x00000994 cdr_ffe_err_level_p1p3_set10 placeholder
0x00000998 cdr_ffe_err_level_m1m3_set11 placeholder
0x0000099c cdr_ffe_err_level_p1p3_set11 placeholder
0x000009a0 cdr_ffe_err_level_m1m3_set12 placeholder
0x000009a4 cdr_ffe_err_level_p1p3_set12 placeholder
0x000009a8 cdr_ffe_err_level_m1m3_set13 placeholder
0x000009ac cdr_ffe_err_level_p1p3_set13 placeholder
0x000009b0 cdr_ffe_err_level_m1m3_set14 placeholder
0x000009b4 cdr_ffe_err_level_p1p3_set14 placeholder
0x000009b8 cdr_ffe_err_level_m1m3_set15 placeholder
0x000009bc 0x000009bf (Not allocated)
0x000009c0 cdr_ffe_err_level_p1p3_set15 placeholder
0x000009c4 0x000009c7 (Not allocated)
0x000009c8 cdr_ffe_post1_set0to3 Rx SAR Array valid
0x000009cc cdr_ffe_post1_set4to7 Rx SAR Array valid
0x000009d0 cdr_ffe_post1_set8to11 Rx SAR Array valid
0x000009d4 cdr_ffe_post1_set12to15 Rx SAR Array valid
0x000009d8 cdr_ffe_control_0 placeholder
0x000009dc cdr_ffe_control_1 placeholder
0x000009e0 cdr_ffe_control_2 placeholder
0x000009e4 lms_avg_updn_status_0 placeholder
0x000009e8 cdr_ffe_vref_control_1 placeholder
0x000009ec cdr_ffe_vref_control_2 placeholder
0x000009f0 cdr_ffe_vref_control_3 placeholder
0x000009f4 cdr_ffe_vref_control_4 placeholder
0x000009f8 cdr_ffe_vref_control_5 placeholder
0x000009fc cdr_ffe_vref_control_6 placeholder
0x00000a00 0x00000a03 (Not allocated)
0x00000a04 cdr_ffe_ofc_control_0 placeholder
0x00000a08 cdr_ffe_ofc_control_1a placeholder
0x00000a0c cdr_ffe_ofc_control_1b placeholder
0x00000a10 cdr_ffe_ofc_control_2 placeholder
0x00000a14 cdr_ffe_ofc_control_3 placeholder
0x00000a18 cdr_ffe_ofc_status_0 placeholder
0x00000a1c cdr_ffe_pre1_set0to3_frac Rx SAR Array valid
0x00000a20 cdr_ffe_pre1_set4to7_frac Rx SAR Array valid
0x00000a24 cdr_ffe_pre1_set8to11_frac Rx SAR Array valid
0x00000a28 cdr_ffe_pre1_set12to15_frac Rx SAR Array valid
0x00000a2c cdr_ffe_post1_set0to3_frac Rx SAR Array valid
0x00000a30 cdr_ffe_post1_set4to7_frac Rx SAR Array valid
0x00000a34 cdr_ffe_post1_set8to11_frac Rx SAR Array valid
0x00000a38 cdr_ffe_post1_set12to15_frac Rx SAR Array valid
0x00000a3c cdr_ffe_err_level_frac_set0_0 placeholder
0x00000a40 cdr_ffe_err_level_frac_set1_0 placeholder
0x00000a44 cdr_ffe_err_level_frac_set2_0 placeholder
0x00000a48 cdr_ffe_err_level_frac_set3_0 placeholder
0x00000a4c cdr_ffe_err_level_frac_set4_0 placeholder
0x00000a50 cdr_ffe_err_level_frac_set5_0 placeholder
0x00000a54 cdr_ffe_err_level_frac_set6_0 placeholder
0x00000a58 cdr_ffe_err_level_frac_set7_0 placeholder
0x00000a5c cdr_ffe_err_level_frac_set8_0 placeholder
0x00000a60 cdr_ffe_err_level_frac_set9_0 placeholder
0x00000a64 cdr_ffe_err_level_frac_set10_0 placeholder
0x00000a68 cdr_ffe_err_level_frac_set11_0 placeholder
0x00000a6c cdr_ffe_err_level_frac_set12_0 placeholder
0x00000a70 cdr_ffe_err_level_frac_set13_0 placeholder
0x00000a74 cdr_ffe_err_level_frac_set14_0 placeholder
0x00000a78 cdr_ffe_err_level_frac_set15_0 placeholder
0x00000a7c cdr_ffe_control_3 placeholder
0x00000a80 cdr_ffe_pre3_set0to3 Rx SAR Array valid
0x00000a84 cdr_ffe_pre3_set4to7 Rx SAR Array valid
0x00000a88 cdr_ffe_pre3_set8to11 Rx SAR Array valid
0x00000a8c cdr_ffe_pre3_set12to15 Rx SAR Array valid
0x00000a90 cdr_ffe_pre2_set0to3 Rx SAR Array valid
0x00000a94 cdr_ffe_pre2_set4to7 Rx SAR Array valid
0x00000a98 cdr_ffe_pre2_set8to11 Rx SAR Array valid
0x00000a9c cdr_ffe_pre2_set12to15 Rx SAR Array valid
0x00000aa0 cdr_ffe_post2_set0to3 Rx SAR Array valid
0x00000aa4 cdr_ffe_post2_set4to7 Rx SAR Array valid
0x00000aa8 cdr_ffe_post2_set8to11 Rx SAR Array valid
0x00000aac cdr_ffe_post2_set12to15 Rx SAR Array valid
0x00000ab0 cdr_ffe_post3_set0to3 Rx SAR Array valid
0x00000ab4 cdr_ffe_post3_set4to7 Rx SAR Array valid
0x00000ab8 cdr_ffe_post3_set8to11 Rx SAR Array valid
0x00000abc cdr_ffe_post3_set12to15 Rx SAR Array valid
0x00000ac0 cdr_ffe_post4_set0to3 Rx SAR Array valid
0x00000ac4 cdr_ffe_post4_set4to7 Rx SAR Array valid
0x00000ac8 cdr_ffe_post4_set8to11 Rx SAR Array valid
0x00000acc cdr_ffe_post4_set12to15 Rx SAR Array valid
0x00000ad0 cdr_ffe_pre3_set0to3_frac Rx SAR Array valid
0x00000ad4 cdr_ffe_pre3_set4to7_frac Rx SAR Array valid
0x00000ad8 cdr_ffe_pre3_set8to11_frac Rx SAR Array valid
0x00000adc cdr_ffe_pre3_set12to15_frac Rx SAR Array valid
0x00000ae0 cdr_ffe_pre2_set0to3_frac Rx SAR Array valid
0x00000ae4 cdr_ffe_pre2_set4to7_frac Rx SAR Array valid
0x00000ae8 cdr_ffe_pre2_set8to11_frac Rx SAR Array valid
0x00000aec cdr_ffe_pre2_set12to15_frac Rx SAR Array valid
0x00000af0 cdr_ffe_post2_set0to3_frac Rx SAR Array valid
0x00000af4 cdr_ffe_post2_set4to7_frac Rx SAR Array valid
0x00000af8 cdr_ffe_post2_set8to11_frac Rx SAR Array valid
0x00000afc cdr_ffe_post2_set12to15_frac Rx SAR Array valid
0x00000b00 cdr_ffe_post3_set0to3_frac Rx SAR Array valid
0x00000b04 cdr_ffe_post3_set4to7_frac Rx SAR Array valid
0x00000b08 cdr_ffe_post3_set8to11_frac Rx SAR Array valid
0x00000b0c cdr_ffe_post3_set12to15_frac Rx SAR Array valid
0x00000b10 cdr_ffe_post4_set0to3_frac Rx SAR Array valid
0x00000b14 cdr_ffe_post4_set4to7_frac Rx SAR Array valid
0x00000b18 cdr_ffe_post4_set8to11_frac Rx SAR Array valid
0x00000b1c cdr_ffe_post4_set12to15_frac Rx SAR Array valid
0x00000b20 saturation_status_4 placeholder
0x00000b24 affe_if_control_0 placeholder
0x00000b28 ops_taps_b0_sar_0to3 placeholder
0x00000b2c ops_taps_b0_sar_4to7 placeholder
0x00000b30 ops_taps_b0_sar_8to11 placeholder
0x00000b34 ops_taps_b0_sar_12to15 placeholder
0x00000b38 ops_taps_b0_sar_16to19 placeholder
0x00000b3c ops_taps_b0_sar_20to23 placeholder
0x00000b40 ops_taps_b0_sar_24to27 placeholder
0x00000b44 ops_taps_b0_sar_28to31 placeholder
0x00000b48 ops_taps_b0_sar_32to35 placeholder
0x00000b4c ops_taps_b0_sar_36to39 placeholder
0x00000b50 ops_taps_b0_sar_40to43 placeholder
0x00000b54 ops_taps_b0_sar_44to47 placeholder
0x00000b58 ops_taps_b0_sar_48to51 placeholder
0x00000b5c ops_taps_b0_sar_52to55 placeholder
0x00000b60 ops_taps_b0_sar_56to59 placeholder
0x00000b64 ops_taps_b0_sar_60to63 placeholder
0x00000b68 ops_taps_b1_sar_0to3 placeholder
0x00000b6c ops_taps_b1_sar_4to7 placeholder
0x00000b70 ops_taps_b1_sar_8to11 placeholder
0x00000b74 ops_taps_b1_sar_12to15 placeholder
0x00000b78 ops_taps_b1_sar_16to19 placeholder
0x00000b7c ops_taps_b1_sar_20to23 placeholder
0x00000b80 ops_taps_b1_sar_24to27 placeholder
0x00000b84 ops_taps_b1_sar_28to31 placeholder
0x00000b88 ops_taps_b1_sar_32to35 placeholder
0x00000b8c ops_taps_b1_sar_36to39 placeholder
0x00000b90 ops_taps_b1_sar_40to43 placeholder
0x00000b94 ops_taps_b1_sar_44to47 placeholder
0x00000b98 ops_taps_b1_sar_48to51 placeholder
0x00000b9c ops_taps_b1_sar_52to55 placeholder
0x00000ba0 ops_taps_b1_sar_56to59 placeholder
0x00000ba4 ops_taps_b1_sar_60to63 placeholder
0x00000ba8 ops_taps_b2_sar_0to3 placeholder
0x00000bac ops_taps_b2_sar_4to7 placeholder
0x00000bb0 ops_taps_b2_sar_8to11 placeholder
0x00000bb4 ops_taps_b2_sar_12to15 placeholder
0x00000bb8 ops_taps_b2_sar_16to19 placeholder
0x00000bbc ops_taps_b2_sar_20to23 placeholder
0x00000bc0 ops_taps_b2_sar_24to27 placeholder
0x00000bc4 ops_taps_b2_sar_28to31 placeholder
0x00000bc8 ops_taps_b2_sar_32to35 placeholder
0x00000bcc ops_taps_b2_sar_36to39 placeholder
0x00000bd0 ops_taps_b2_sar_40to43 placeholder
0x00000bd4 ops_taps_b2_sar_44to47 placeholder
0x00000bd8 ops_taps_b2_sar_48to51 placeholder
0x00000bdc ops_taps_b2_sar_52to55 placeholder
0x00000be0 ops_taps_b2_sar_56to59 placeholder
0x00000be4 ops_taps_b2_sar_60to63 placeholder
0x00000be8 ops_taps_b3_sar_0to3 placeholder
0x00000bec ops_taps_b3_sar_4to7 placeholder
0x00000bf0 ops_taps_b3_sar_8to11 placeholder
0x00000bf4 ops_taps_b3_sar_12to15 placeholder
0x00000bf8 ops_taps_b3_sar_16to19 placeholder
0x00000bfc ops_taps_b3_sar_20to23 placeholder
0x00000c00 ops_taps_b3_sar_24to27 placeholder
0x00000c04 ops_taps_b3_sar_28to31 placeholder
0x00000c08 ops_taps_b3_sar_32to35 placeholder
0x00000c0c ops_taps_b3_sar_36to39 placeholder
0x00000c10 ops_taps_b3_sar_40to43 placeholder
0x00000c14 ops_taps_b3_sar_44to47 placeholder
0x00000c18 ops_taps_b3_sar_48to51 placeholder
0x00000c1c ops_taps_b3_sar_52to55 placeholder
0x00000c20 ops_taps_b3_sar_56to59 placeholder
0x00000c24 ops_taps_b3_sar_60to63 placeholder
0x00000c28 ops_taps_b4_sar_0to3 placeholder
0x00000c2c ops_taps_b4_sar_4to7 placeholder
0x00000c30 ops_taps_b4_sar_8to11 placeholder
0x00000c34 ops_taps_b4_sar_12to15 placeholder
0x00000c38 ops_taps_b4_sar_16to19 placeholder
0x00000c3c ops_taps_b4_sar_20to23 placeholder
0x00000c40 ops_taps_b4_sar_24to27 placeholder
0x00000c44 ops_taps_b4_sar_28to31 placeholder
0x00000c48 ops_taps_b4_sar_32to35 placeholder
0x00000c4c ops_taps_b4_sar_36to39 placeholder
0x00000c50 ops_taps_b4_sar_40to43 placeholder
0x00000c54 ops_taps_b4_sar_44to47 placeholder
0x00000c58 ops_taps_b4_sar_48to51 placeholder
0x00000c5c ops_taps_b4_sar_52to55 placeholder
0x00000c60 ops_taps_b4_sar_56to59 placeholder
0x00000c64 ops_taps_b4_sar_60to63 placeholder
0x00000c68 ops_taps_b5_sar_0to3 placeholder
0x00000c6c ops_taps_b5_sar_4to7 placeholder
0x00000c70 ops_taps_b5_sar_8to11 placeholder
0x00000c74 ops_taps_b5_sar_12to15 placeholder
0x00000c78 ops_taps_b5_sar_16to19 placeholder
0x00000c7c ops_taps_b5_sar_20to23 placeholder
0x00000c80 ops_taps_b5_sar_24to27 placeholder
0x00000c84 ops_taps_b5_sar_28to31 placeholder
0x00000c88 ops_taps_b5_sar_32to35 placeholder
0x00000c8c ops_taps_b5_sar_36to39 placeholder
0x00000c90 ops_taps_b5_sar_40to43 placeholder
0x00000c94 ops_taps_b5_sar_44to47 placeholder
0x00000c98 ops_taps_b5_sar_48to51 placeholder
0x00000c9c ops_taps_b5_sar_52to55 placeholder
0x00000ca0 ops_taps_b5_sar_56to59 placeholder
0x00000ca4 ops_taps_b5_sar_60to63 placeholder
0x00000ca8 ops_taps_fra_b0_sar_0to3 placeholder
0x00000cac ops_taps_fra_b0_sar_4to7 placeholder
0x00000cb0 ops_taps_fra_b0_sar_8to11 placeholder
0x00000cb4 ops_taps_fra_b0_sar_12to15 placeholder
0x00000cb8 ops_taps_fra_b0_sar_16to19 placeholder
0x00000cbc ops_taps_fra_b0_sar_20to23 placeholder
0x00000cc0 ops_taps_fra_b0_sar_24to27 placeholder
0x00000cc4 ops_taps_fra_b0_sar_28to31 placeholder
0x00000cc8 ops_taps_fra_b0_sar_32to35 placeholder
0x00000ccc ops_taps_fra_b0_sar_36to39 placeholder
0x00000cd0 ops_taps_fra_b0_sar_40to43 placeholder
0x00000cd4 ops_taps_fra_b0_sar_44to47 placeholder
0x00000cd8 ops_taps_fra_b0_sar_48to51 placeholder
0x00000cdc ops_taps_fra_b0_sar_52to55 placeholder
0x00000ce0 ops_taps_fra_b0_sar_56to59 placeholder
0x00000ce4 ops_taps_fra_b0_sar_60to63 placeholder
0x00000ce8 ops_taps_fra_b1_sar_0to3 placeholder
0x00000cec ops_taps_fra_b1_sar_4to7 placeholder
0x00000cf0 ops_taps_fra_b1_sar_8to11 placeholder
0x00000cf4 ops_taps_fra_b1_sar_12to15 placeholder
0x00000cf8 ops_taps_fra_b1_sar_16to19 placeholder
0x00000cfc ops_taps_fra_b1_sar_20to23 placeholder
0x00000d00 ops_taps_fra_b1_sar_24to27 placeholder
0x00000d04 ops_taps_fra_b1_sar_28to31 placeholder
0x00000d08 ops_taps_fra_b1_sar_32to35 placeholder
0x00000d0c ops_taps_fra_b1_sar_36to39 placeholder
0x00000d10 ops_taps_fra_b1_sar_40to43 placeholder
0x00000d14 ops_taps_fra_b1_sar_44to47 placeholder
0x00000d18 ops_taps_fra_b1_sar_48to51 placeholder
0x00000d1c ops_taps_fra_b1_sar_52to55 placeholder
0x00000d20 ops_taps_fra_b1_sar_56to59 placeholder
0x00000d24 ops_taps_fra_b1_sar_60to63 placeholder
0x00000d28 ops_taps_fra_b2_sar_0to3 placeholder
0x00000d2c ops_taps_fra_b2_sar_4to7 placeholder
0x00000d30 ops_taps_fra_b2_sar_8to11 placeholder
0x00000d34 ops_taps_fra_b2_sar_12to15 placeholder
0x00000d38 ops_taps_fra_b2_sar_16to19 placeholder
0x00000d3c ops_taps_fra_b2_sar_20to23 placeholder
0x00000d40 ops_taps_fra_b2_sar_24to27 placeholder
0x00000d44 ops_taps_fra_b2_sar_28to31 placeholder
0x00000d48 ops_taps_fra_b2_sar_32to35 placeholder
0x00000d4c ops_taps_fra_b2_sar_36to39 placeholder
0x00000d50 ops_taps_fra_b2_sar_40to43 placeholder
0x00000d54 ops_taps_fra_b2_sar_44to47 placeholder
0x00000d58 ops_taps_fra_b2_sar_48to51 placeholder
0x00000d5c ops_taps_fra_b2_sar_52to55 placeholder
0x00000d60 ops_taps_fra_b2_sar_56to59 placeholder
0x00000d64 ops_taps_fra_b2_sar_60to63 placeholder
0x00000d68 ops_taps_fra_b3_sar_0to3 placeholder
0x00000d6c ops_taps_fra_b3_sar_4to7 placeholder
0x00000d70 ops_taps_fra_b3_sar_8to11 placeholder
0x00000d74 ops_taps_fra_b3_sar_12to15 placeholder
0x00000d78 ops_taps_fra_b3_sar_16to19 placeholder
0x00000d7c ops_taps_fra_b3_sar_20to23 placeholder
0x00000d80 ops_taps_fra_b3_sar_24to27 placeholder
0x00000d84 ops_taps_fra_b3_sar_28to31 placeholder
0x00000d88 ops_taps_fra_b3_sar_32to35 placeholder
0x00000d8c ops_taps_fra_b3_sar_36to39 placeholder
0x00000d90 ops_taps_fra_b3_sar_40to43 placeholder
0x00000d94 ops_taps_fra_b3_sar_44to47 placeholder
0x00000d98 ops_taps_fra_b3_sar_48to51 placeholder
0x00000d9c ops_taps_fra_b3_sar_52to55 placeholder
0x00000da0 ops_taps_fra_b3_sar_56to59 placeholder
0x00000da4 ops_taps_fra_b3_sar_60to63 placeholder
0x00000da8 ops_taps_fra_b4_sar_0to3 placeholder
0x00000dac ops_taps_fra_b4_sar_4to7 placeholder
0x00000db0 ops_taps_fra_b4_sar_8to11 placeholder
0x00000db4 ops_taps_fra_b4_sar_12to15 placeholder
0x00000db8 ops_taps_fra_b4_sar_16to19 placeholder
0x00000dbc ops_taps_fra_b4_sar_20to23 placeholder
0x00000dc0 ops_taps_fra_b4_sar_24to27 placeholder
0x00000dc4 ops_taps_fra_b4_sar_28to31 placeholder
0x00000dc8 ops_taps_fra_b4_sar_32to35 placeholder
0x00000dcc ops_taps_fra_b4_sar_36to39 placeholder
0x00000dd0 ops_taps_fra_b4_sar_40to43 placeholder
0x00000dd4 ops_taps_fra_b4_sar_44to47 placeholder
0x00000dd8 ops_taps_fra_b4_sar_48to51 placeholder
0x00000ddc ops_taps_fra_b4_sar_52to55 placeholder
0x00000de0 ops_taps_fra_b4_sar_56to59 placeholder
0x00000de4 ops_taps_fra_b4_sar_60to63 placeholder
0x00000de8 ops_taps_fra_b5_sar_0to3 placeholder
0x00000dec ops_taps_fra_b5_sar_4to7 placeholder
0x00000df0 ops_taps_fra_b5_sar_8to11 placeholder
0x00000df4 ops_taps_fra_b5_sar_12to15 placeholder
0x00000df8 ops_taps_fra_b5_sar_16to19 placeholder
0x00000dfc ops_taps_fra_b5_sar_20to23 placeholder
0x00000e00 ops_taps_fra_b5_sar_24to27 placeholder
0x00000e04 ops_taps_fra_b5_sar_28to31 placeholder
0x00000e08 ops_taps_fra_b5_sar_32to35 placeholder
0x00000e0c ops_taps_fra_b5_sar_36to39 placeholder
0x00000e10 ops_taps_fra_b5_sar_40to43 placeholder
0x00000e14 ops_taps_fra_b5_sar_44to47 placeholder
0x00000e18 ops_taps_fra_b5_sar_48to51 placeholder
0x00000e1c ops_taps_fra_b5_sar_52to55 placeholder
0x00000e20 ops_taps_fra_b5_sar_56to59 placeholder
0x00000e24 ops_taps_fra_b5_sar_60to63 placeholder
0x00000e28 ofc_control_4 placeholder
0x00000e2c ofc_control_5 placeholder
0x00000e30 ofc_control_6 placeholder
0x00000e34 ofc_control_7 placeholder
0x00000e38 cdr_ffe_ofc_control_4 placeholder
0x00000e3c cdr_ffe_ofc_control_5 placeholder
0x00000e40 cdr_ffe_ofc_control_6 placeholder
0x00000e44 cdr_ffe_ofc_control_7 placeholder
0x00000e48 adcofc_control_4 placeholder
0x00000e4c adcofc_control_5 placeholder
0x00000e50 adcofc_control_6 placeholder
0x00000e54 adcofc_control_7 placeholder
0x00000e58 0x00000ef7 (Not allocated)
0x00000ef8 rx_sigdet_venv_ctrl1 placeholder
0x00000efc rx_sigdet_venv_ctrl2 placeholder
0x00000f00 rx_sigdet_venv_ctrl3 placeholder
0x00000f04 rx_sigdet_venv_status placeholder
0x00000f08 rx_sigdet_venv_status_clr placeholder
0x00000f0c 0x00000fd7 (Not allocated)
0x00000fd8 rxword_rw_spare_0 Spare RW register
0x00000fdc rxword_rw_spare_1 Spare RW register
0x00000fe0 rxword_rw_spare_2 Spare RW register
0x00000fe4 rxword_rw_spare_3 Spare RW register
0x00000fe8 rxword_ro_spare_0 Spare RO register
0x00000fec rxword_ro_spare_1 Spare RO register

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Register Details for AddressMap abc_soc_top/dlnk/jesdabc2/pipe_phy_1x4lane_map/pipe_phy_VERSA/versa_PMA0/PMA_RXWORD_Q0/PMA_RXWORD_regs

Note: AddressOffsets before register name are offsets inside AddressMap (that is what the "+" means)

+0x00000000 Register(32 bit) ffe_coeff_set0_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a000 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set0_coeff_post1 ffe_coeff_set0_coeff_pre1 - ffe_coeff_set0_coeff_pre2 - ffe_coeff_set0_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set0_coeff_post1
ffe_coeff_set0_coeff_post1[31:24]
set0 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set0_coeff_pre1
ffe_coeff_set0_coeff_pre1[23:16]
set0 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set0_coeff_pre2
ffe_coeff_set0_coeff_pre2[13:8]
set0 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set0_coeff_pre3
ffe_coeff_set0_coeff_pre3[5:0]
set0 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000004 Register(32 bit) ffe_coeff_set0_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a004 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set0_coeff_post5 - ffe_coeff_set0_coeff_post4 - ffe_coeff_set0_coeff_post3 ffe_coeff_set0_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set0_coeff_post5
ffe_coeff_set0_coeff_post5[29:24]
set0 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set0_coeff_post4
ffe_coeff_set0_coeff_post4[21:16]
set0 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set0_coeff_post3
ffe_coeff_set0_coeff_post3[13:8]
set0 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set0_coeff_post2
ffe_coeff_set0_coeff_post2[7:0]
set0 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000008 Register(32 bit) ffe_coeff_set0_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a008 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set0_coeff_post10 ffe_coeff_set0_coeff_post9 - ffe_coeff_set0_coeff_post8 - ffe_coeff_set0_coeff_post7 - ffe_coeff_set0_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set0_coeff_post10
ffe_coeff_set0_coeff_post10[31:28]
set0 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set0_coeff_post9
ffe_coeff_set0_coeff_post9[27:24]
set0 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set0_coeff_post8
ffe_coeff_set0_coeff_post8[21:16]
set0 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set0_coeff_post7
ffe_coeff_set0_coeff_post7[13:8]
set0 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set0_coeff_post6
ffe_coeff_set0_coeff_post6[5:0]
set0 ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000000c Register(32 bit) ffe_coeff_set0_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a00c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set0_bankB_float3 ffe_coeff_set0_bankB_float2 ffe_coeff_set0_bankB_float1 ffe_coeff_set0_bankA_float3 ffe_coeff_set0_bankA_float2 ffe_coeff_set0_bankA_float1 ffe_coeff_set0_coeff_post12 ffe_coeff_set0_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set0_bankB_float3
ffe_coeff_set0_bankB_float3[31:28]
set0 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set0_bankB_float2
ffe_coeff_set0_bankB_float2[27:24]
set0 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set0_bankB_float1
ffe_coeff_set0_bankB_float1[23:20]
set0 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set0_bankA_float3
ffe_coeff_set0_bankA_float3[19:16]
set0 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set0_bankA_float2
ffe_coeff_set0_bankA_float2[15:12]
set0 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set0_bankA_float1
ffe_coeff_set0_bankA_float1[11:8]
set0 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set0_coeff_post12
ffe_coeff_set0_coeff_post12[7:4]
set0 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set0_coeff_post11
ffe_coeff_set0_coeff_post11[3:0]
set0 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000010 Register(32 bit) ffe_coeff_set0_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a010 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set0_bankC_float3 ffe_coeff_set0_bankC_float2 ffe_coeff_set0_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set0_bankC_float3
ffe_coeff_set0_bankC_float3[11:8]
set0 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set0_bankC_float2
ffe_coeff_set0_bankC_float2[7:4]
set0 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set0_bankC_float1
ffe_coeff_set0_bankC_float1[3:0]
set0 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000014 Register(32 bit) ffe_coeff_set1_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a014 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set1_coeff_post1 ffe_coeff_set1_coeff_pre1 - ffe_coeff_set1_coeff_pre2 - ffe_coeff_set1_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set1_coeff_post1
ffe_coeff_set1_coeff_post1[31:24]
set1 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set1_coeff_pre1
ffe_coeff_set1_coeff_pre1[23:16]
set1 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set1_coeff_pre2
ffe_coeff_set1_coeff_pre2[13:8]
set1 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set1_coeff_pre3
ffe_coeff_set1_coeff_pre3[5:0]
set1 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000018 Register(32 bit) ffe_coeff_set1_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a018 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set1_coeff_post5 - ffe_coeff_set1_coeff_post4 - ffe_coeff_set1_coeff_post3 ffe_coeff_set1_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set1_coeff_post5
ffe_coeff_set1_coeff_post5[29:24]
set1 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set1_coeff_post4
ffe_coeff_set1_coeff_post4[21:16]
set1 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set1_coeff_post3
ffe_coeff_set1_coeff_post3[13:8]
set1 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set1_coeff_post2
ffe_coeff_set1_coeff_post2[7:0]
set1 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000001c Register(32 bit) ffe_coeff_set1_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a01c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set1_coeff_post10 ffe_coeff_set1_coeff_post9 - ffe_coeff_set1_coeff_post8 - ffe_coeff_set1_coeff_post7 - ffe_coeff_set1_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set1_coeff_post10
ffe_coeff_set1_coeff_post10[31:28]
set1 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set1_coeff_post9
ffe_coeff_set1_coeff_post9[27:24]
set1 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set1_coeff_post8
ffe_coeff_set1_coeff_post8[21:16]
set1 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set1_coeff_post7
ffe_coeff_set1_coeff_post7[13:8]
set1 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set1_coeff_post6
ffe_coeff_set1_coeff_post6[5:0]
set1 ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000020 Register(32 bit) ffe_coeff_set1_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a020 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set1_bankB_float3 ffe_coeff_set1_bankB_float2 ffe_coeff_set1_bankB_float1 ffe_coeff_set1_bankA_float3 ffe_coeff_set1_bankA_float2 ffe_coeff_set1_bankA_float1 ffe_coeff_set1_coeff_post12 ffe_coeff_set1_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set1_bankB_float3
ffe_coeff_set1_bankB_float3[31:28]
set1 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set1_bankB_float2
ffe_coeff_set1_bankB_float2[27:24]
set1 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set1_bankB_float1
ffe_coeff_set1_bankB_float1[23:20]
set1 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set1_bankA_float3
ffe_coeff_set1_bankA_float3[19:16]
set1 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set1_bankA_float2
ffe_coeff_set1_bankA_float2[15:12]
set1 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set1_bankA_float1
ffe_coeff_set1_bankA_float1[11:8]
set1 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set1_coeff_post12
ffe_coeff_set1_coeff_post12[7:4]
set1 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set1_coeff_post11
ffe_coeff_set1_coeff_post11[3:0]
set1 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000024 Register(32 bit) ffe_coeff_set1_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a024 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set1_bankC_float3 ffe_coeff_set1_bankC_float2 ffe_coeff_set1_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set1_bankC_float3
ffe_coeff_set1_bankC_float3[11:8]
set1 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set1_bankC_float2
ffe_coeff_set1_bankC_float2[7:4]
set1 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set1_bankC_float1
ffe_coeff_set1_bankC_float1[3:0]
set1 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000028 Register(32 bit) ffe_coeff_set2_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a028 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set2_coeff_post1 ffe_coeff_set2_coeff_pre1 - ffe_coeff_set2_coeff_pre2 - ffe_coeff_set2_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set2_coeff_post1
ffe_coeff_set2_coeff_post1[31:24]
set2 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set2_coeff_pre1
ffe_coeff_set2_coeff_pre1[23:16]
set2 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set2_coeff_pre2
ffe_coeff_set2_coeff_pre2[13:8]
set2 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set2_coeff_pre3
ffe_coeff_set2_coeff_pre3[5:0]
set2 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000002c Register(32 bit) ffe_coeff_set2_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a02c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set2_coeff_post5 - ffe_coeff_set2_coeff_post4 - ffe_coeff_set2_coeff_post3 ffe_coeff_set2_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set2_coeff_post5
ffe_coeff_set2_coeff_post5[29:24]
set2 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set2_coeff_post4
ffe_coeff_set2_coeff_post4[21:16]
set2 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set2_coeff_post3
ffe_coeff_set2_coeff_post3[13:8]
set2 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set2_coeff_post2
ffe_coeff_set2_coeff_post2[7:0]
set2 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000030 Register(32 bit) ffe_coeff_set2_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a030 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set2_coeff_post10 ffe_coeff_set2_coeff_post9 - ffe_coeff_set2_coeff_post8 - ffe_coeff_set2_coeff_post7 - ffe_coeff_set2_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set2_coeff_post10
ffe_coeff_set2_coeff_post10[31:28]
set2 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set2_coeff_post9
ffe_coeff_set2_coeff_post9[27:24]
set2 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set2_coeff_post8
ffe_coeff_set2_coeff_post8[21:16]
set2 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set2_coeff_post7
ffe_coeff_set2_coeff_post7[13:8]
set2 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set2_coeff_post6
ffe_coeff_set2_coeff_post6[5:0]
set2 ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000034 Register(32 bit) ffe_coeff_set2_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a034 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set2_bankB_float3 ffe_coeff_set2_bankB_float2 ffe_coeff_set2_bankB_float1 ffe_coeff_set2_bankA_float3 ffe_coeff_set2_bankA_float2 ffe_coeff_set2_bankA_float1 ffe_coeff_set2_coeff_post12 ffe_coeff_set2_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set2_bankB_float3
ffe_coeff_set2_bankB_float3[31:28]
set2 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set2_bankB_float2
ffe_coeff_set2_bankB_float2[27:24]
set2 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set2_bankB_float1
ffe_coeff_set2_bankB_float1[23:20]
set2 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set2_bankA_float3
ffe_coeff_set2_bankA_float3[19:16]
set2 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set2_bankA_float2
ffe_coeff_set2_bankA_float2[15:12]
set2 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set2_bankA_float1
ffe_coeff_set2_bankA_float1[11:8]
set2 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set2_coeff_post12
ffe_coeff_set2_coeff_post12[7:4]
set2 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set2_coeff_post11
ffe_coeff_set2_coeff_post11[3:0]
set2 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000038 Register(32 bit) ffe_coeff_set2_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a038 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set2_bankC_float3 ffe_coeff_set2_bankC_float2 ffe_coeff_set2_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set2_bankC_float3
ffe_coeff_set2_bankC_float3[11:8]
set2 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set2_bankC_float2
ffe_coeff_set2_bankC_float2[7:4]
set2 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set2_bankC_float1
ffe_coeff_set2_bankC_float1[3:0]
set2 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x0000003c Register(32 bit) ffe_coeff_set3_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a03c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set3_coeff_post1 ffe_coeff_set3_coeff_pre1 - ffe_coeff_set3_coeff_pre2 - ffe_coeff_set3_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set3_coeff_post1
ffe_coeff_set3_coeff_post1[31:24]
set3 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set3_coeff_pre1
ffe_coeff_set3_coeff_pre1[23:16]
set3 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set3_coeff_pre2
ffe_coeff_set3_coeff_pre2[13:8]
set3 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set3_coeff_pre3
ffe_coeff_set3_coeff_pre3[5:0]
set3 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000040 Register(32 bit) ffe_coeff_set3_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a040 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set3_coeff_post5 - ffe_coeff_set3_coeff_post4 - ffe_coeff_set3_coeff_post3 ffe_coeff_set3_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set3_coeff_post5
ffe_coeff_set3_coeff_post5[29:24]
set3 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set3_coeff_post4
ffe_coeff_set3_coeff_post4[21:16]
set3 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set3_coeff_post3
ffe_coeff_set3_coeff_post3[13:8]
set3 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set3_coeff_post2
ffe_coeff_set3_coeff_post2[7:0]
set3 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000044 Register(32 bit) ffe_coeff_set3_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a044 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set3_coeff_post10 ffe_coeff_set3_coeff_post9 - ffe_coeff_set3_coeff_post8 - ffe_coeff_set3_coeff_post7 - ffe_coeff_set3_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set3_coeff_post10
ffe_coeff_set3_coeff_post10[31:28]
set3 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set3_coeff_post9
ffe_coeff_set3_coeff_post9[27:24]
set3 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set3_coeff_post8
ffe_coeff_set3_coeff_post8[21:16]
set3 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set3_coeff_post7
ffe_coeff_set3_coeff_post7[13:8]
set3 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set3_coeff_post6
ffe_coeff_set3_coeff_post6[5:0]
set3 ffe post cursor 6 coeff

Reset: hex:0x00;

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+0x00000048 Register(32 bit) ffe_coeff_set3_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a048 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set3_bankB_float3 ffe_coeff_set3_bankB_float2 ffe_coeff_set3_bankB_float1 ffe_coeff_set3_bankA_float3 ffe_coeff_set3_bankA_float2 ffe_coeff_set3_bankA_float1 ffe_coeff_set3_coeff_post12 ffe_coeff_set3_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set3_bankB_float3
ffe_coeff_set3_bankB_float3[31:28]
set3 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set3_bankB_float2
ffe_coeff_set3_bankB_float2[27:24]
set3 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set3_bankB_float1
ffe_coeff_set3_bankB_float1[23:20]
set3 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set3_bankA_float3
ffe_coeff_set3_bankA_float3[19:16]
set3 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set3_bankA_float2
ffe_coeff_set3_bankA_float2[15:12]
set3 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set3_bankA_float1
ffe_coeff_set3_bankA_float1[11:8]
set3 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set3_coeff_post12
ffe_coeff_set3_coeff_post12[7:4]
set3 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set3_coeff_post11
ffe_coeff_set3_coeff_post11[3:0]
set3 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x0000004c Register(32 bit) ffe_coeff_set3_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a04c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set3_bankC_float3 ffe_coeff_set3_bankC_float2 ffe_coeff_set3_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set3_bankC_float3
ffe_coeff_set3_bankC_float3[11:8]
set3 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set3_bankC_float2
ffe_coeff_set3_bankC_float2[7:4]
set3 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set3_bankC_float1
ffe_coeff_set3_bankC_float1[3:0]
set3 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000050 Register(32 bit) ffe_coeff_set4_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a050 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set4_coeff_post1 ffe_coeff_set4_coeff_pre1 - ffe_coeff_set4_coeff_pre2 - ffe_coeff_set4_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set4_coeff_post1
ffe_coeff_set4_coeff_post1[31:24]
set4 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set4_coeff_pre1
ffe_coeff_set4_coeff_pre1[23:16]
set4 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set4_coeff_pre2
ffe_coeff_set4_coeff_pre2[13:8]
set4 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set4_coeff_pre3
ffe_coeff_set4_coeff_pre3[5:0]
set4 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000054 Register(32 bit) ffe_coeff_set4_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a054 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set4_coeff_post5 - ffe_coeff_set4_coeff_post4 - ffe_coeff_set4_coeff_post3 ffe_coeff_set4_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set4_coeff_post5
ffe_coeff_set4_coeff_post5[29:24]
set4 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set4_coeff_post4
ffe_coeff_set4_coeff_post4[21:16]
set4 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set4_coeff_post3
ffe_coeff_set4_coeff_post3[13:8]
set4 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set4_coeff_post2
ffe_coeff_set4_coeff_post2[7:0]
set4 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000058 Register(32 bit) ffe_coeff_set4_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a058 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set4_coeff_post10 ffe_coeff_set4_coeff_post9 - ffe_coeff_set4_coeff_post8 - ffe_coeff_set4_coeff_post7 - ffe_coeff_set4_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set4_coeff_post10
ffe_coeff_set4_coeff_post10[31:28]
set4 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set4_coeff_post9
ffe_coeff_set4_coeff_post9[27:24]
set4 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set4_coeff_post8
ffe_coeff_set4_coeff_post8[21:16]
set4 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set4_coeff_post7
ffe_coeff_set4_coeff_post7[13:8]
set4 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set4_coeff_post6
ffe_coeff_set4_coeff_post6[5:0]
set4 ffe post cursor 6 coeff

Reset: hex:0x00;

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+0x0000005c Register(32 bit) ffe_coeff_set4_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a05c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set4_bankB_float3 ffe_coeff_set4_bankB_float2 ffe_coeff_set4_bankB_float1 ffe_coeff_set4_bankA_float3 ffe_coeff_set4_bankA_float2 ffe_coeff_set4_bankA_float1 ffe_coeff_set4_coeff_post12 ffe_coeff_set4_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set4_bankB_float3
ffe_coeff_set4_bankB_float3[31:28]
set4 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set4_bankB_float2
ffe_coeff_set4_bankB_float2[27:24]
set4 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set4_bankB_float1
ffe_coeff_set4_bankB_float1[23:20]
set4 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set4_bankA_float3
ffe_coeff_set4_bankA_float3[19:16]
set4 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set4_bankA_float2
ffe_coeff_set4_bankA_float2[15:12]
set4 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set4_bankA_float1
ffe_coeff_set4_bankA_float1[11:8]
set4 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set4_coeff_post12
ffe_coeff_set4_coeff_post12[7:4]
set4 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set4_coeff_post11
ffe_coeff_set4_coeff_post11[3:0]
set4 ffe post cursor 11 coeff

Reset: hex:0x0;

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+0x00000060 Register(32 bit) ffe_coeff_set4_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a060 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set4_bankC_float3 ffe_coeff_set4_bankC_float2 ffe_coeff_set4_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set4_bankC_float3
ffe_coeff_set4_bankC_float3[11:8]
set4 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set4_bankC_float2
ffe_coeff_set4_bankC_float2[7:4]
set4 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set4_bankC_float1
ffe_coeff_set4_bankC_float1[3:0]
set4 ffe bankC floating 1 coeff

Reset: hex:0x0;

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+0x00000064 Register(32 bit) ffe_coeff_set5_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a064 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set5_coeff_post1 ffe_coeff_set5_coeff_pre1 - ffe_coeff_set5_coeff_pre2 - ffe_coeff_set5_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set5_coeff_post1
ffe_coeff_set5_coeff_post1[31:24]
set5 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set5_coeff_pre1
ffe_coeff_set5_coeff_pre1[23:16]
set5 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set5_coeff_pre2
ffe_coeff_set5_coeff_pre2[13:8]
set5 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set5_coeff_pre3
ffe_coeff_set5_coeff_pre3[5:0]
set5 ffe pre cursor 3 coeff

Reset: hex:0x00;

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+0x00000068 Register(32 bit) ffe_coeff_set5_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a068 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set5_coeff_post5 - ffe_coeff_set5_coeff_post4 - ffe_coeff_set5_coeff_post3 ffe_coeff_set5_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set5_coeff_post5
ffe_coeff_set5_coeff_post5[29:24]
set5 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set5_coeff_post4
ffe_coeff_set5_coeff_post4[21:16]
set5 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set5_coeff_post3
ffe_coeff_set5_coeff_post3[13:8]
set5 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set5_coeff_post2
ffe_coeff_set5_coeff_post2[7:0]
set5 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000006c Register(32 bit) ffe_coeff_set5_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a06c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set5_coeff_post10 ffe_coeff_set5_coeff_post9 - ffe_coeff_set5_coeff_post8 - ffe_coeff_set5_coeff_post7 - ffe_coeff_set5_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set5_coeff_post10
ffe_coeff_set5_coeff_post10[31:28]
set5 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set5_coeff_post9
ffe_coeff_set5_coeff_post9[27:24]
set5 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set5_coeff_post8
ffe_coeff_set5_coeff_post8[21:16]
set5 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set5_coeff_post7
ffe_coeff_set5_coeff_post7[13:8]
set5 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set5_coeff_post6
ffe_coeff_set5_coeff_post6[5:0]
set5 ffe post cursor 6 coeff

Reset: hex:0x00;

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+0x00000070 Register(32 bit) ffe_coeff_set5_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a070 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set5_bankB_float3 ffe_coeff_set5_bankB_float2 ffe_coeff_set5_bankB_float1 ffe_coeff_set5_bankA_float3 ffe_coeff_set5_bankA_float2 ffe_coeff_set5_bankA_float1 ffe_coeff_set5_coeff_post12 ffe_coeff_set5_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set5_bankB_float3
ffe_coeff_set5_bankB_float3[31:28]
set5 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set5_bankB_float2
ffe_coeff_set5_bankB_float2[27:24]
set5 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set5_bankB_float1
ffe_coeff_set5_bankB_float1[23:20]
set5 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set5_bankA_float3
ffe_coeff_set5_bankA_float3[19:16]
set5 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set5_bankA_float2
ffe_coeff_set5_bankA_float2[15:12]
set5 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set5_bankA_float1
ffe_coeff_set5_bankA_float1[11:8]
set5 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set5_coeff_post12
ffe_coeff_set5_coeff_post12[7:4]
set5 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set5_coeff_post11
ffe_coeff_set5_coeff_post11[3:0]
set5 ffe post cursor 11 coeff

Reset: hex:0x0;

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+0x00000074 Register(32 bit) ffe_coeff_set5_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a074 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set5_bankC_float3 ffe_coeff_set5_bankC_float2 ffe_coeff_set5_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set5_bankC_float3
ffe_coeff_set5_bankC_float3[11:8]
set5 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set5_bankC_float2
ffe_coeff_set5_bankC_float2[7:4]
set5 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set5_bankC_float1
ffe_coeff_set5_bankC_float1[3:0]
set5 ffe bankC floating 1 coeff

Reset: hex:0x0;

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+0x00000078 Register(32 bit) ffe_coeff_set6_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a078 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set6_coeff_post1 ffe_coeff_set6_coeff_pre1 - ffe_coeff_set6_coeff_pre2 - ffe_coeff_set6_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set6_coeff_post1
ffe_coeff_set6_coeff_post1[31:24]
set6 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set6_coeff_pre1
ffe_coeff_set6_coeff_pre1[23:16]
set6 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set6_coeff_pre2
ffe_coeff_set6_coeff_pre2[13:8]
set6 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set6_coeff_pre3
ffe_coeff_set6_coeff_pre3[5:0]
set6 ffe pre cursor 3 coeff

Reset: hex:0x00;

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+0x0000007c Register(32 bit) ffe_coeff_set6_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a07c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set6_coeff_post5 - ffe_coeff_set6_coeff_post4 - ffe_coeff_set6_coeff_post3 ffe_coeff_set6_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set6_coeff_post5
ffe_coeff_set6_coeff_post5[29:24]
set6 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set6_coeff_post4
ffe_coeff_set6_coeff_post4[21:16]
set6 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set6_coeff_post3
ffe_coeff_set6_coeff_post3[13:8]
set6 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set6_coeff_post2
ffe_coeff_set6_coeff_post2[7:0]
set6 ffe post cursor 2 coeff

Reset: hex:0x00;

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+0x00000080 Register(32 bit) ffe_coeff_set6_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a080 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set6_coeff_post10 ffe_coeff_set6_coeff_post9 - ffe_coeff_set6_coeff_post8 - ffe_coeff_set6_coeff_post7 - ffe_coeff_set6_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set6_coeff_post10
ffe_coeff_set6_coeff_post10[31:28]
set6 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set6_coeff_post9
ffe_coeff_set6_coeff_post9[27:24]
set6 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set6_coeff_post8
ffe_coeff_set6_coeff_post8[21:16]
set6 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set6_coeff_post7
ffe_coeff_set6_coeff_post7[13:8]
set6 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set6_coeff_post6
ffe_coeff_set6_coeff_post6[5:0]
set6 ffe post cursor 6 coeff

Reset: hex:0x00;

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+0x00000084 Register(32 bit) ffe_coeff_set6_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a084 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set6_bankB_float3 ffe_coeff_set6_bankB_float2 ffe_coeff_set6_bankB_float1 ffe_coeff_set6_bankA_float3 ffe_coeff_set6_bankA_float2 ffe_coeff_set6_bankA_float1 ffe_coeff_set6_coeff_post12 ffe_coeff_set6_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set6_bankB_float3
ffe_coeff_set6_bankB_float3[31:28]
set6 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set6_bankB_float2
ffe_coeff_set6_bankB_float2[27:24]
set6 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set6_bankB_float1
ffe_coeff_set6_bankB_float1[23:20]
set6 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set6_bankA_float3
ffe_coeff_set6_bankA_float3[19:16]
set6 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set6_bankA_float2
ffe_coeff_set6_bankA_float2[15:12]
set6 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set6_bankA_float1
ffe_coeff_set6_bankA_float1[11:8]
set6 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set6_coeff_post12
ffe_coeff_set6_coeff_post12[7:4]
set6 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set6_coeff_post11
ffe_coeff_set6_coeff_post11[3:0]
set6 ffe post cursor 11 coeff

Reset: hex:0x0;

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+0x00000088 Register(32 bit) ffe_coeff_set6_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a088 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set6_bankC_float3 ffe_coeff_set6_bankC_float2 ffe_coeff_set6_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set6_bankC_float3
ffe_coeff_set6_bankC_float3[11:8]
set6 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set6_bankC_float2
ffe_coeff_set6_bankC_float2[7:4]
set6 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set6_bankC_float1
ffe_coeff_set6_bankC_float1[3:0]
set6 ffe bankC floating 1 coeff

Reset: hex:0x0;

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+0x0000008c Register(32 bit) ffe_coeff_set7_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a08c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set7_coeff_post1 ffe_coeff_set7_coeff_pre1 - ffe_coeff_set7_coeff_pre2 - ffe_coeff_set7_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set7_coeff_post1
ffe_coeff_set7_coeff_post1[31:24]
set7 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set7_coeff_pre1
ffe_coeff_set7_coeff_pre1[23:16]
set7 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set7_coeff_pre2
ffe_coeff_set7_coeff_pre2[13:8]
set7 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set7_coeff_pre3
ffe_coeff_set7_coeff_pre3[5:0]
set7 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000090 Register(32 bit) ffe_coeff_set7_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a090 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set7_coeff_post5 - ffe_coeff_set7_coeff_post4 - ffe_coeff_set7_coeff_post3 ffe_coeff_set7_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set7_coeff_post5
ffe_coeff_set7_coeff_post5[29:24]
set7 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set7_coeff_post4
ffe_coeff_set7_coeff_post4[21:16]
set7 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set7_coeff_post3
ffe_coeff_set7_coeff_post3[13:8]
set7 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set7_coeff_post2
ffe_coeff_set7_coeff_post2[7:0]
set7 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000094 Register(32 bit) ffe_coeff_set7_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a094 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set7_coeff_post10 ffe_coeff_set7_coeff_post9 - ffe_coeff_set7_coeff_post8 - ffe_coeff_set7_coeff_post7 - ffe_coeff_set7_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set7_coeff_post10
ffe_coeff_set7_coeff_post10[31:28]
set7 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set7_coeff_post9
ffe_coeff_set7_coeff_post9[27:24]
set7 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set7_coeff_post8
ffe_coeff_set7_coeff_post8[21:16]
set7 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set7_coeff_post7
ffe_coeff_set7_coeff_post7[13:8]
set7 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set7_coeff_post6
ffe_coeff_set7_coeff_post6[5:0]
set7 ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000098 Register(32 bit) ffe_coeff_set7_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a098 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set7_bankB_float3 ffe_coeff_set7_bankB_float2 ffe_coeff_set7_bankB_float1 ffe_coeff_set7_bankA_float3 ffe_coeff_set7_bankA_float2 ffe_coeff_set7_bankA_float1 ffe_coeff_set7_coeff_post12 ffe_coeff_set7_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set7_bankB_float3
ffe_coeff_set7_bankB_float3[31:28]
set7 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set7_bankB_float2
ffe_coeff_set7_bankB_float2[27:24]
set7 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set7_bankB_float1
ffe_coeff_set7_bankB_float1[23:20]
set7 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set7_bankA_float3
ffe_coeff_set7_bankA_float3[19:16]
set7 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set7_bankA_float2
ffe_coeff_set7_bankA_float2[15:12]
set7 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set7_bankA_float1
ffe_coeff_set7_bankA_float1[11:8]
set7 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set7_coeff_post12
ffe_coeff_set7_coeff_post12[7:4]
set7 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set7_coeff_post11
ffe_coeff_set7_coeff_post11[3:0]
set7 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x0000009c Register(32 bit) ffe_coeff_set7_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a09c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set7_bankC_float3 ffe_coeff_set7_bankC_float2 ffe_coeff_set7_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set7_bankC_float3
ffe_coeff_set7_bankC_float3[11:8]
set7 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set7_bankC_float2
ffe_coeff_set7_bankC_float2[7:4]
set7 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set7_bankC_float1
ffe_coeff_set7_bankC_float1[3:0]
set7 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x000000a0 Register(32 bit) ffe_coeff_set8_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0a0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set8_coeff_post1 ffe_coeff_set8_coeff_pre1 - ffe_coeff_set8_coeff_pre2 - ffe_coeff_set8_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set8_coeff_post1
ffe_coeff_set8_coeff_post1[31:24]
set8 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set8_coeff_pre1
ffe_coeff_set8_coeff_pre1[23:16]
set8 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set8_coeff_pre2
ffe_coeff_set8_coeff_pre2[13:8]
set8 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set8_coeff_pre3
ffe_coeff_set8_coeff_pre3[5:0]
set8 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000a4 Register(32 bit) ffe_coeff_set8_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0a4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set8_coeff_post5 - ffe_coeff_set8_coeff_post4 - ffe_coeff_set8_coeff_post3 ffe_coeff_set8_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set8_coeff_post5
ffe_coeff_set8_coeff_post5[29:24]
set8 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set8_coeff_post4
ffe_coeff_set8_coeff_post4[21:16]
set8 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set8_coeff_post3
ffe_coeff_set8_coeff_post3[13:8]
set8 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set8_coeff_post2
ffe_coeff_set8_coeff_post2[7:0]
set8 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000a8 Register(32 bit) ffe_coeff_set8_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0a8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set8_coeff_post10 ffe_coeff_set8_coeff_post9 - ffe_coeff_set8_coeff_post8 - ffe_coeff_set8_coeff_post7 - ffe_coeff_set8_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set8_coeff_post10
ffe_coeff_set8_coeff_post10[31:28]
set8 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set8_coeff_post9
ffe_coeff_set8_coeff_post9[27:24]
set8 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set8_coeff_post8
ffe_coeff_set8_coeff_post8[21:16]
set8 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set8_coeff_post7
ffe_coeff_set8_coeff_post7[13:8]
set8 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set8_coeff_post6
ffe_coeff_set8_coeff_post6[5:0]
set8 ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000ac Register(32 bit) ffe_coeff_set8_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0ac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set8_bankB_float3 ffe_coeff_set8_bankB_float2 ffe_coeff_set8_bankB_float1 ffe_coeff_set8_bankA_float3 ffe_coeff_set8_bankA_float2 ffe_coeff_set8_bankA_float1 ffe_coeff_set8_coeff_post12 ffe_coeff_set8_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set8_bankB_float3
ffe_coeff_set8_bankB_float3[31:28]
set8 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set8_bankB_float2
ffe_coeff_set8_bankB_float2[27:24]
set8 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set8_bankB_float1
ffe_coeff_set8_bankB_float1[23:20]
set8 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set8_bankA_float3
ffe_coeff_set8_bankA_float3[19:16]
set8 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set8_bankA_float2
ffe_coeff_set8_bankA_float2[15:12]
set8 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set8_bankA_float1
ffe_coeff_set8_bankA_float1[11:8]
set8 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set8_coeff_post12
ffe_coeff_set8_coeff_post12[7:4]
set8 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set8_coeff_post11
ffe_coeff_set8_coeff_post11[3:0]
set8 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x000000b0 Register(32 bit) ffe_coeff_set8_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0b0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set8_bankC_float3 ffe_coeff_set8_bankC_float2 ffe_coeff_set8_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set8_bankC_float3
ffe_coeff_set8_bankC_float3[11:8]
set8 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set8_bankC_float2
ffe_coeff_set8_bankC_float2[7:4]
set8 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set8_bankC_float1
ffe_coeff_set8_bankC_float1[3:0]
set8 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x000000b4 Register(32 bit) ffe_coeff_set9_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0b4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set9_coeff_post1 ffe_coeff_set9_coeff_pre1 - ffe_coeff_set9_coeff_pre2 - ffe_coeff_set9_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set9_coeff_post1
ffe_coeff_set9_coeff_post1[31:24]
set9 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set9_coeff_pre1
ffe_coeff_set9_coeff_pre1[23:16]
set9 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set9_coeff_pre2
ffe_coeff_set9_coeff_pre2[13:8]
set9 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set9_coeff_pre3
ffe_coeff_set9_coeff_pre3[5:0]
set9 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000b8 Register(32 bit) ffe_coeff_set9_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0b8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set9_coeff_post5 - ffe_coeff_set9_coeff_post4 - ffe_coeff_set9_coeff_post3 ffe_coeff_set9_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set9_coeff_post5
ffe_coeff_set9_coeff_post5[29:24]
set9 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set9_coeff_post4
ffe_coeff_set9_coeff_post4[21:16]
set9 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set9_coeff_post3
ffe_coeff_set9_coeff_post3[13:8]
set9 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set9_coeff_post2
ffe_coeff_set9_coeff_post2[7:0]
set9 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000bc Register(32 bit) ffe_coeff_set9_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0bc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set9_coeff_post10 ffe_coeff_set9_coeff_post9 - ffe_coeff_set9_coeff_post8 - ffe_coeff_set9_coeff_post7 - ffe_coeff_set9_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set9_coeff_post10
ffe_coeff_set9_coeff_post10[31:28]
set9 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set9_coeff_post9
ffe_coeff_set9_coeff_post9[27:24]
set9 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set9_coeff_post8
ffe_coeff_set9_coeff_post8[21:16]
set9 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set9_coeff_post7
ffe_coeff_set9_coeff_post7[13:8]
set9 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set9_coeff_post6
ffe_coeff_set9_coeff_post6[5:0]
set9 ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000c0 Register(32 bit) ffe_coeff_set9_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0c0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set9_bankB_float3 ffe_coeff_set9_bankB_float2 ffe_coeff_set9_bankB_float1 ffe_coeff_set9_bankA_float3 ffe_coeff_set9_bankA_float2 ffe_coeff_set9_bankA_float1 ffe_coeff_set9_coeff_post12 ffe_coeff_set9_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set9_bankB_float3
ffe_coeff_set9_bankB_float3[31:28]
set9 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set9_bankB_float2
ffe_coeff_set9_bankB_float2[27:24]
set9 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set9_bankB_float1
ffe_coeff_set9_bankB_float1[23:20]
set9 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set9_bankA_float3
ffe_coeff_set9_bankA_float3[19:16]
set9 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set9_bankA_float2
ffe_coeff_set9_bankA_float2[15:12]
set9 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set9_bankA_float1
ffe_coeff_set9_bankA_float1[11:8]
set9 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set9_coeff_post12
ffe_coeff_set9_coeff_post12[7:4]
set9 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set9_coeff_post11
ffe_coeff_set9_coeff_post11[3:0]
set9 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x000000c4 Register(32 bit) ffe_coeff_set9_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0c4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set9_bankC_float3 ffe_coeff_set9_bankC_float2 ffe_coeff_set9_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set9_bankC_float3
ffe_coeff_set9_bankC_float3[11:8]
set9 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set9_bankC_float2
ffe_coeff_set9_bankC_float2[7:4]
set9 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set9_bankC_float1
ffe_coeff_set9_bankC_float1[3:0]
set9 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x000000cc Register(32 bit) ffe_coeff_set10_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0cc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set10_coeff_post1 ffe_coeff_set10_coeff_pre1 - ffe_coeff_set10_coeff_pre2 - ffe_coeff_set10_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set10_coeff_post1
ffe_coeff_set10_coeff_post1[31:24]
set10 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set10_coeff_pre1
ffe_coeff_set10_coeff_pre1[23:16]
set10 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set10_coeff_pre2
ffe_coeff_set10_coeff_pre2[13:8]
set10 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set10_coeff_pre3
ffe_coeff_set10_coeff_pre3[5:0]
set10 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000d0 Register(32 bit) ffe_coeff_set10_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0d0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set10_coeff_post5 - ffe_coeff_set10_coeff_post4 - ffe_coeff_set10_coeff_post3 ffe_coeff_set10_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set10_coeff_post5
ffe_coeff_set10_coeff_post5[29:24]
set10 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set10_coeff_post4
ffe_coeff_set10_coeff_post4[21:16]
set10 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set10_coeff_post3
ffe_coeff_set10_coeff_post3[13:8]
set10 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set10_coeff_post2
ffe_coeff_set10_coeff_post2[7:0]
set10 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000d4 Register(32 bit) ffe_coeff_set10_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0d4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set10_coeff_post10 ffe_coeff_set10_coeff_post9 - ffe_coeff_set10_coeff_post8 - ffe_coeff_set10_coeff_post7 - ffe_coeff_set10_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set10_coeff_post10
ffe_coeff_set10_coeff_post10[31:28]
set10 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set10_coeff_post9
ffe_coeff_set10_coeff_post9[27:24]
set10 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set10_coeff_post8
ffe_coeff_set10_coeff_post8[21:16]
set10 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set10_coeff_post7
ffe_coeff_set10_coeff_post7[13:8]
set10 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set10_coeff_post6
ffe_coeff_set10_coeff_post6[5:0]
set10 ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000d8 Register(32 bit) ffe_coeff_set10_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0d8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set10_bankB_float3 ffe_coeff_set10_bankB_float2 ffe_coeff_set10_bankB_float1 ffe_coeff_set10_bankA_float3 ffe_coeff_set10_bankA_float2 ffe_coeff_set10_bankA_float1 ffe_coeff_set10_coeff_post12 ffe_coeff_set10_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set10_bankB_float3
ffe_coeff_set10_bankB_float3[31:28]
set10 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set10_bankB_float2
ffe_coeff_set10_bankB_float2[27:24]
set10 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set10_bankB_float1
ffe_coeff_set10_bankB_float1[23:20]
set10 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set10_bankA_float3
ffe_coeff_set10_bankA_float3[19:16]
set10 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set10_bankA_float2
ffe_coeff_set10_bankA_float2[15:12]
set10 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set10_bankA_float1
ffe_coeff_set10_bankA_float1[11:8]
set10 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set10_coeff_post12
ffe_coeff_set10_coeff_post12[7:4]
set10 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set10_coeff_post11
ffe_coeff_set10_coeff_post11[3:0]
set10 ffe post cursor 11 coeff

Reset: hex:0x0;

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+0x000000dc Register(32 bit) ffe_coeff_set10_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0dc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set10_bankC_float3 ffe_coeff_set10_bankC_float2 ffe_coeff_set10_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set10_bankC_float3
ffe_coeff_set10_bankC_float3[11:8]
set10 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set10_bankC_float2
ffe_coeff_set10_bankC_float2[7:4]
set10 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set10_bankC_float1
ffe_coeff_set10_bankC_float1[3:0]
set10 ffe bankC floating 1 coeff

Reset: hex:0x0;

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+0x000000e0 Register(32 bit) ffe_coeff_set11_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0e0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set11_coeff_post1 ffe_coeff_set11_coeff_pre1 - ffe_coeff_set11_coeff_pre2 - ffe_coeff_set11_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set11_coeff_post1
ffe_coeff_set11_coeff_post1[31:24]
set11 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set11_coeff_pre1
ffe_coeff_set11_coeff_pre1[23:16]
set11 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set11_coeff_pre2
ffe_coeff_set11_coeff_pre2[13:8]
set11 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set11_coeff_pre3
ffe_coeff_set11_coeff_pre3[5:0]
set11 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000e4 Register(32 bit) ffe_coeff_set11_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0e4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set11_coeff_post5 - ffe_coeff_set11_coeff_post4 - ffe_coeff_set11_coeff_post3 ffe_coeff_set11_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set11_coeff_post5
ffe_coeff_set11_coeff_post5[29:24]
set11 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set11_coeff_post4
ffe_coeff_set11_coeff_post4[21:16]
set11 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set11_coeff_post3
ffe_coeff_set11_coeff_post3[13:8]
set11 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set11_coeff_post2
ffe_coeff_set11_coeff_post2[7:0]
set11 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000e8 Register(32 bit) ffe_coeff_set11_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0e8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set11_coeff_post10 ffe_coeff_set11_coeff_post9 - ffe_coeff_set11_coeff_post8 - ffe_coeff_set11_coeff_post7 - ffe_coeff_set11_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set11_coeff_post10
ffe_coeff_set11_coeff_post10[31:28]
set11 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set11_coeff_post9
ffe_coeff_set11_coeff_post9[27:24]
set11 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set11_coeff_post8
ffe_coeff_set11_coeff_post8[21:16]
set11 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set11_coeff_post7
ffe_coeff_set11_coeff_post7[13:8]
set11 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set11_coeff_post6
ffe_coeff_set11_coeff_post6[5:0]
set11 ffe post cursor 6 coeff

Reset: hex:0x00;

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+0x000000ec Register(32 bit) ffe_coeff_set11_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0ec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set11_bankB_float3 ffe_coeff_set11_bankB_float2 ffe_coeff_set11_bankB_float1 ffe_coeff_set11_bankA_float3 ffe_coeff_set11_bankA_float2 ffe_coeff_set11_bankA_float1 ffe_coeff_set11_coeff_post12 ffe_coeff_set11_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set11_bankB_float3
ffe_coeff_set11_bankB_float3[31:28]
set11 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set11_bankB_float2
ffe_coeff_set11_bankB_float2[27:24]
set11 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set11_bankB_float1
ffe_coeff_set11_bankB_float1[23:20]
set11 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set11_bankA_float3
ffe_coeff_set11_bankA_float3[19:16]
set11 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set11_bankA_float2
ffe_coeff_set11_bankA_float2[15:12]
set11 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set11_bankA_float1
ffe_coeff_set11_bankA_float1[11:8]
set11 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set11_coeff_post12
ffe_coeff_set11_coeff_post12[7:4]
set11 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set11_coeff_post11
ffe_coeff_set11_coeff_post11[3:0]
set11 ffe post cursor 11 coeff

Reset: hex:0x0;

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+0x000000f0 Register(32 bit) ffe_coeff_set11_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0f0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set11_bankC_float3 ffe_coeff_set11_bankC_float2 ffe_coeff_set11_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set11_bankC_float3
ffe_coeff_set11_bankC_float3[11:8]
set11 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set11_bankC_float2
ffe_coeff_set11_bankC_float2[7:4]
set11 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set11_bankC_float1
ffe_coeff_set11_bankC_float1[3:0]
set11 ffe bankC floating 1 coeff

Reset: hex:0x0;

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+0x000000f4 Register(32 bit) ffe_coeff_set12_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0f4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set12_coeff_post1 ffe_coeff_set12_coeff_pre1 - ffe_coeff_set12_coeff_pre2 - ffe_coeff_set12_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set12_coeff_post1
ffe_coeff_set12_coeff_post1[31:24]
set12 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set12_coeff_pre1
ffe_coeff_set12_coeff_pre1[23:16]
set12 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set12_coeff_pre2
ffe_coeff_set12_coeff_pre2[13:8]
set12 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set12_coeff_pre3
ffe_coeff_set12_coeff_pre3[5:0]
set12 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000f8 Register(32 bit) ffe_coeff_set12_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0f8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set12_coeff_post5 - ffe_coeff_set12_coeff_post4 - ffe_coeff_set12_coeff_post3 ffe_coeff_set12_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set12_coeff_post5
ffe_coeff_set12_coeff_post5[29:24]
set12 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set12_coeff_post4
ffe_coeff_set12_coeff_post4[21:16]
set12 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set12_coeff_post3
ffe_coeff_set12_coeff_post3[13:8]
set12 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set12_coeff_post2
ffe_coeff_set12_coeff_post2[7:0]
set12 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000000fc Register(32 bit) ffe_coeff_set12_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a0fc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set12_coeff_post10 ffe_coeff_set12_coeff_post9 - ffe_coeff_set12_coeff_post8 - ffe_coeff_set12_coeff_post7 - ffe_coeff_set12_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set12_coeff_post10
ffe_coeff_set12_coeff_post10[31:28]
set12 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set12_coeff_post9
ffe_coeff_set12_coeff_post9[27:24]
set12 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set12_coeff_post8
ffe_coeff_set12_coeff_post8[21:16]
set12 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set12_coeff_post7
ffe_coeff_set12_coeff_post7[13:8]
set12 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set12_coeff_post6
ffe_coeff_set12_coeff_post6[5:0]
set12 ffe post cursor 6 coeff

Reset: hex:0x00;

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+0x00000100 Register(32 bit) ffe_coeff_set12_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a100 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set12_bankB_float3 ffe_coeff_set12_bankB_float2 ffe_coeff_set12_bankB_float1 ffe_coeff_set12_bankA_float3 ffe_coeff_set12_bankA_float2 ffe_coeff_set12_bankA_float1 ffe_coeff_set12_coeff_post12 ffe_coeff_set12_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set12_bankB_float3
ffe_coeff_set12_bankB_float3[31:28]
set12 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set12_bankB_float2
ffe_coeff_set12_bankB_float2[27:24]
set12 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set12_bankB_float1
ffe_coeff_set12_bankB_float1[23:20]
set12 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set12_bankA_float3
ffe_coeff_set12_bankA_float3[19:16]
set12 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set12_bankA_float2
ffe_coeff_set12_bankA_float2[15:12]
set12 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set12_bankA_float1
ffe_coeff_set12_bankA_float1[11:8]
set12 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set12_coeff_post12
ffe_coeff_set12_coeff_post12[7:4]
set12 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set12_coeff_post11
ffe_coeff_set12_coeff_post11[3:0]
set12 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000104 Register(32 bit) ffe_coeff_set12_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a104 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set12_bankC_float3 ffe_coeff_set12_bankC_float2 ffe_coeff_set12_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set12_bankC_float3
ffe_coeff_set12_bankC_float3[11:8]
set12 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set12_bankC_float2
ffe_coeff_set12_bankC_float2[7:4]
set12 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set12_bankC_float1
ffe_coeff_set12_bankC_float1[3:0]
set12 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000108 Register(32 bit) ffe_coeff_set13_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a108 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set13_coeff_post1 ffe_coeff_set13_coeff_pre1 - ffe_coeff_set13_coeff_pre2 - ffe_coeff_set13_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set13_coeff_post1
ffe_coeff_set13_coeff_post1[31:24]
set13 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set13_coeff_pre1
ffe_coeff_set13_coeff_pre1[23:16]
set13 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set13_coeff_pre2
ffe_coeff_set13_coeff_pre2[13:8]
set13 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set13_coeff_pre3
ffe_coeff_set13_coeff_pre3[5:0]
set13 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000010c Register(32 bit) ffe_coeff_set13_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a10c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set13_coeff_post5 - ffe_coeff_set13_coeff_post4 - ffe_coeff_set13_coeff_post3 ffe_coeff_set13_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set13_coeff_post5
ffe_coeff_set13_coeff_post5[29:24]
set13 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set13_coeff_post4
ffe_coeff_set13_coeff_post4[21:16]
set13 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set13_coeff_post3
ffe_coeff_set13_coeff_post3[13:8]
set13 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set13_coeff_post2
ffe_coeff_set13_coeff_post2[7:0]
set13 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000110 Register(32 bit) ffe_coeff_set13_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a110 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set13_coeff_post10 ffe_coeff_set13_coeff_post9 - ffe_coeff_set13_coeff_post8 - ffe_coeff_set13_coeff_post7 - ffe_coeff_set13_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set13_coeff_post10
ffe_coeff_set13_coeff_post10[31:28]
set13 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set13_coeff_post9
ffe_coeff_set13_coeff_post9[27:24]
set13 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set13_coeff_post8
ffe_coeff_set13_coeff_post8[21:16]
set13 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set13_coeff_post7
ffe_coeff_set13_coeff_post7[13:8]
set13 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set13_coeff_post6
ffe_coeff_set13_coeff_post6[5:0]
set13 ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000114 Register(32 bit) ffe_coeff_set13_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a114 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set13_bankB_float3 ffe_coeff_set13_bankB_float2 ffe_coeff_set13_bankB_float1 ffe_coeff_set13_bankA_float3 ffe_coeff_set13_bankA_float2 ffe_coeff_set13_bankA_float1 ffe_coeff_set13_coeff_post12 ffe_coeff_set13_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set13_bankB_float3
ffe_coeff_set13_bankB_float3[31:28]
set13 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set13_bankB_float2
ffe_coeff_set13_bankB_float2[27:24]
set13 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set13_bankB_float1
ffe_coeff_set13_bankB_float1[23:20]
set13 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set13_bankA_float3
ffe_coeff_set13_bankA_float3[19:16]
set13 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set13_bankA_float2
ffe_coeff_set13_bankA_float2[15:12]
set13 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set13_bankA_float1
ffe_coeff_set13_bankA_float1[11:8]
set13 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set13_coeff_post12
ffe_coeff_set13_coeff_post12[7:4]
set13 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set13_coeff_post11
ffe_coeff_set13_coeff_post11[3:0]
set13 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000118 Register(32 bit) ffe_coeff_set13_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a118 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set13_bankC_float3 ffe_coeff_set13_bankC_float2 ffe_coeff_set13_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set13_bankC_float3
ffe_coeff_set13_bankC_float3[11:8]
set13 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set13_bankC_float2
ffe_coeff_set13_bankC_float2[7:4]
set13 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set13_bankC_float1
ffe_coeff_set13_bankC_float1[3:0]
set13 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x0000011c Register(32 bit) ffe_coeff_set14_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a11c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set14_coeff_post1 ffe_coeff_set14_coeff_pre1 - ffe_coeff_set14_coeff_pre2 - ffe_coeff_set14_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set14_coeff_post1
ffe_coeff_set14_coeff_post1[31:24]
set14 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set14_coeff_pre1
ffe_coeff_set14_coeff_pre1[23:16]
set14 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set14_coeff_pre2
ffe_coeff_set14_coeff_pre2[13:8]
set14 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set14_coeff_pre3
ffe_coeff_set14_coeff_pre3[5:0]
set14 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000120 Register(32 bit) ffe_coeff_set14_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a120 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set14_coeff_post5 - ffe_coeff_set14_coeff_post4 - ffe_coeff_set14_coeff_post3 ffe_coeff_set14_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set14_coeff_post5
ffe_coeff_set14_coeff_post5[29:24]
set14 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set14_coeff_post4
ffe_coeff_set14_coeff_post4[21:16]
set14 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set14_coeff_post3
ffe_coeff_set14_coeff_post3[13:8]
set14 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set14_coeff_post2
ffe_coeff_set14_coeff_post2[7:0]
set14 ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000124 Register(32 bit) ffe_coeff_set14_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a124 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set14_coeff_post10 ffe_coeff_set14_coeff_post9 - ffe_coeff_set14_coeff_post8 - ffe_coeff_set14_coeff_post7 - ffe_coeff_set14_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set14_coeff_post10
ffe_coeff_set14_coeff_post10[31:28]
set14 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set14_coeff_post9
ffe_coeff_set14_coeff_post9[27:24]
set14 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set14_coeff_post8
ffe_coeff_set14_coeff_post8[21:16]
set14 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set14_coeff_post7
ffe_coeff_set14_coeff_post7[13:8]
set14 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set14_coeff_post6
ffe_coeff_set14_coeff_post6[5:0]
set14 ffe post cursor 6 coeff

Reset: hex:0x00;

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+0x00000128 Register(32 bit) ffe_coeff_set14_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a128 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set14_bankB_float3 ffe_coeff_set14_bankB_float2 ffe_coeff_set14_bankB_float1 ffe_coeff_set14_bankA_float3 ffe_coeff_set14_bankA_float2 ffe_coeff_set14_bankA_float1 ffe_coeff_set14_coeff_post12 ffe_coeff_set14_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set14_bankB_float3
ffe_coeff_set14_bankB_float3[31:28]
set14 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set14_bankB_float2
ffe_coeff_set14_bankB_float2[27:24]
set14 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set14_bankB_float1
ffe_coeff_set14_bankB_float1[23:20]
set14 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set14_bankA_float3
ffe_coeff_set14_bankA_float3[19:16]
set14 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set14_bankA_float2
ffe_coeff_set14_bankA_float2[15:12]
set14 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set14_bankA_float1
ffe_coeff_set14_bankA_float1[11:8]
set14 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set14_coeff_post12
ffe_coeff_set14_coeff_post12[7:4]
set14 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set14_coeff_post11
ffe_coeff_set14_coeff_post11[3:0]
set14 ffe post cursor 11 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x0000012c Register(32 bit) ffe_coeff_set14_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a12c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set14_bankC_float3 ffe_coeff_set14_bankC_float2 ffe_coeff_set14_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set14_bankC_float3
ffe_coeff_set14_bankC_float3[11:8]
set14 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set14_bankC_float2
ffe_coeff_set14_bankC_float2[7:4]
set14 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set14_bankC_float1
ffe_coeff_set14_bankC_float1[3:0]
set14 ffe bankC floating 1 coeff

Reset: hex:0x0;

Back to AddressMap

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+0x00000130 Register(32 bit) ffe_coeff_set15_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a130 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x0000c0c0
Undefined 0x0000c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set15_coeff_post1 ffe_coeff_set15_coeff_pre1 - ffe_coeff_set15_coeff_pre2 - ffe_coeff_set15_coeff_pre3
Access RW/V RW/V - RW/V - RW/V

[31:24]
RW/V

ffe_coeff_set15_coeff_post1
ffe_coeff_set15_coeff_post1[31:24]
set15 ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set15_coeff_pre1
ffe_coeff_set15_coeff_pre1[23:16]
set15 ffe pre cursor 1 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set15_coeff_pre2
ffe_coeff_set15_coeff_pre2[13:8]
set15 ffe pre cursor 2 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set15_coeff_pre3
ffe_coeff_set15_coeff_pre3[5:0]
set15 ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000134 Register(32 bit) ffe_coeff_set15_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a134 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c000
Undefined 0xc0c0c000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set15_coeff_post5 - ffe_coeff_set15_coeff_post4 - ffe_coeff_set15_coeff_post3 ffe_coeff_set15_coeff_post2
Access - RW/V - RW/V - RW/V RW/V

[29:24]
RW/V

ffe_coeff_set15_coeff_post5
ffe_coeff_set15_coeff_post5[29:24]
set15 ffe post cursor 5 coeff

Reset: hex:0x00;

[21:16]
RW/V

ffe_coeff_set15_coeff_post4
ffe_coeff_set15_coeff_post4[21:16]
set15 ffe post cursor 4 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set15_coeff_post3
ffe_coeff_set15_coeff_post3[13:8]
set15 ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set15_coeff_post2
ffe_coeff_set15_coeff_post2[7:0]
set15 ffe post cursor 2 coeff

Reset: hex:0x00;

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+0x00000138 Register(32 bit) ffe_coeff_set15_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a138 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00c0c0c0
Undefined 0x00c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name ffe_coeff_set15_coeff_post10 ffe_coeff_set15_coeff_post9 - ffe_coeff_set15_coeff_post8 - ffe_coeff_set15_coeff_post7 - ffe_coeff_set15_coeff_post6
Access RW/V RW/V - RW/V - RW/V - RW/V

[31:28]
RW/V

ffe_coeff_set15_coeff_post10
ffe_coeff_set15_coeff_post10[31:28]
set15 ffe post cursor 10 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set15_coeff_post9
ffe_coeff_set15_coeff_post9[27:24]
set15 ffe post cursor 9 coeff

Reset: hex:0x0;

[21:16]
RW/V

ffe_coeff_set15_coeff_post8
ffe_coeff_set15_coeff_post8[21:16]
set15 ffe post cursor 8 coeff

Reset: hex:0x00;

[13:08]
RW/V

ffe_coeff_set15_coeff_post7
ffe_coeff_set15_coeff_post7[13:8]
set15 ffe post cursor 7 coeff

Reset: hex:0x00;

[05:00]
RW/V

ffe_coeff_set15_coeff_post6
ffe_coeff_set15_coeff_post6[5:0]
set15 ffe post cursor 6 coeff

Reset: hex:0x00;

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+0x0000013c Register(32 bit) ffe_coeff_set15_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a13c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set15_bankB_float3 ffe_coeff_set15_bankB_float2 ffe_coeff_set15_bankB_float1 ffe_coeff_set15_bankA_float3 ffe_coeff_set15_bankA_float2 ffe_coeff_set15_bankA_float1 ffe_coeff_set15_coeff_post12 ffe_coeff_set15_coeff_post11
Access RW/V RW/V RW/V RW/V RW/V RW/V RW/V RW/V

[31:28]
RW/V

ffe_coeff_set15_bankB_float3
ffe_coeff_set15_bankB_float3[31:28]
set15 ffe bankB floating 3 coeff

Reset: hex:0x0;

[27:24]
RW/V

ffe_coeff_set15_bankB_float2
ffe_coeff_set15_bankB_float2[27:24]
set15 ffe bankB floating 2 coeff

Reset: hex:0x0;

[23:20]
RW/V

ffe_coeff_set15_bankB_float1
ffe_coeff_set15_bankB_float1[23:20]
set15 ffe bankB floating 1 coeff

Reset: hex:0x0;

[19:16]
RW/V

ffe_coeff_set15_bankA_float3
ffe_coeff_set15_bankA_float3[19:16]
set15 ffe bankA floating 3 coeff

Reset: hex:0x0;

[15:12]
RW/V

ffe_coeff_set15_bankA_float2
ffe_coeff_set15_bankA_float2[15:12]
set15 ffe bankA floating 2 coeff

Reset: hex:0x0;

[11:08]
RW/V

ffe_coeff_set15_bankA_float1
ffe_coeff_set15_bankA_float1[11:8]
set15 ffe bankA floating 1 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set15_coeff_post12
ffe_coeff_set15_coeff_post12[7:4]
set15 ffe post cursor 12 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set15_coeff_post11
ffe_coeff_set15_coeff_post11[3:0]
set15 ffe post cursor 11 coeff

Reset: hex:0x0;

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+0x00000140 Register(32 bit) ffe_coeff_set15_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a140 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_coeff_set15_bankC_float3 ffe_coeff_set15_bankC_float2 ffe_coeff_set15_bankC_float1
Access - RW/V RW/V RW/V

[11:08]
RW/V

ffe_coeff_set15_bankC_float3
ffe_coeff_set15_bankC_float3[11:8]
set15 ffe bankC floating 3 coeff

Reset: hex:0x0;

[07:04]
RW/V

ffe_coeff_set15_bankC_float2
ffe_coeff_set15_bankC_float2[7:4]
set15 ffe bankC floating 2 coeff

Reset: hex:0x0;

[03:00]
RW/V

ffe_coeff_set15_bankC_float1
ffe_coeff_set15_bankC_float1[3:0]
set15 ffe bankC floating 1 coeff

Reset: hex:0x0;

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+0x00000148 Register(32 bit) ffe_slice_level_set0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a148 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set0_m1 ffe_slice_level_set0_0 ffe_slice_level_set0_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set0_m1
ffe_slice_level_set0_m1[29:20]
set0 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set0_0
ffe_slice_level_set0_0[19:10]
set0 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set0_p1
ffe_slice_level_set0_p1[9:0]
set0 of ffe +1 slicer level

Reset: hex:0x150;

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+0x0000014c Register(32 bit) ffe_slice_level_set1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a14c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set1_m1 ffe_slice_level_set1_0 ffe_slice_level_set1_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set1_m1
ffe_slice_level_set1_m1[29:20]
set1 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set1_0
ffe_slice_level_set1_0[19:10]
set1 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set1_p1
ffe_slice_level_set1_p1[9:0]
set1 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000150 Register(32 bit) ffe_slice_level_set2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a150 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set2_m1 ffe_slice_level_set2_0 ffe_slice_level_set2_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set2_m1
ffe_slice_level_set2_m1[29:20]
set2 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set2_0
ffe_slice_level_set2_0[19:10]
set2 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set2_p1
ffe_slice_level_set2_p1[9:0]
set2 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000154 Register(32 bit) ffe_slice_level_set3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a154 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set3_m1 ffe_slice_level_set3_0 ffe_slice_level_set3_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set3_m1
ffe_slice_level_set3_m1[29:20]
set3 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set3_0
ffe_slice_level_set3_0[19:10]
set3 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set3_p1
ffe_slice_level_set3_p1[9:0]
set3 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000158 Register(32 bit) ffe_slice_level_set4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a158 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set4_m1 ffe_slice_level_set4_0 ffe_slice_level_set4_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set4_m1
ffe_slice_level_set4_m1[29:20]
set4 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set4_0
ffe_slice_level_set4_0[19:10]
set4 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set4_p1
ffe_slice_level_set4_p1[9:0]
set4 of ffe +1 slicer level

Reset: hex:0x150;

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+0x0000015c Register(32 bit) ffe_slice_level_set5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a15c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set5_m1 ffe_slice_level_set5_0 ffe_slice_level_set5_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set5_m1
ffe_slice_level_set5_m1[29:20]
set5 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set5_0
ffe_slice_level_set5_0[19:10]
set5 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set5_p1
ffe_slice_level_set5_p1[9:0]
set5 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000160 Register(32 bit) ffe_slice_level_set6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a160 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set6_m1 ffe_slice_level_set6_0 ffe_slice_level_set6_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set6_m1
ffe_slice_level_set6_m1[29:20]
set6 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set6_0
ffe_slice_level_set6_0[19:10]
set6 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set6_p1
ffe_slice_level_set6_p1[9:0]
set6 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000164 Register(32 bit) ffe_slice_level_set7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a164 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set7_m1 ffe_slice_level_set7_0 ffe_slice_level_set7_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set7_m1
ffe_slice_level_set7_m1[29:20]
set7 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set7_0
ffe_slice_level_set7_0[19:10]
set7 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set7_p1
ffe_slice_level_set7_p1[9:0]
set7 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000168 Register(32 bit) ffe_slice_level_set8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a168 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set8_m1 ffe_slice_level_set8_0 ffe_slice_level_set8_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set8_m1
ffe_slice_level_set8_m1[29:20]
set8 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set8_0
ffe_slice_level_set8_0[19:10]
set8 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set8_p1
ffe_slice_level_set8_p1[9:0]
set8 of ffe +1 slicer level

Reset: hex:0x150;

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+0x0000016c Register(32 bit) ffe_slice_level_set9
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a16c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set9_m1 ffe_slice_level_set9_0 ffe_slice_level_set9_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set9_m1
ffe_slice_level_set9_m1[29:20]
set9 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set9_0
ffe_slice_level_set9_0[19:10]
set9 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set9_p1
ffe_slice_level_set9_p1[9:0]
set9 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000170 Register(32 bit) ffe_slice_level_set10
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a170 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set10_m1 ffe_slice_level_set10_0 ffe_slice_level_set10_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set10_m1
ffe_slice_level_set10_m1[29:20]
set10 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set10_0
ffe_slice_level_set10_0[19:10]
set10 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set10_p1
ffe_slice_level_set10_p1[9:0]
set10 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000174 Register(32 bit) ffe_slice_level_set11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a174 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set11_m1 ffe_slice_level_set11_0 ffe_slice_level_set11_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set11_m1
ffe_slice_level_set11_m1[29:20]
set11 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set11_0
ffe_slice_level_set11_0[19:10]
set11 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set11_p1
ffe_slice_level_set11_p1[9:0]
set11 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000178 Register(32 bit) ffe_slice_level_set12
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a178 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set12_m1 ffe_slice_level_set12_0 ffe_slice_level_set12_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set12_m1
ffe_slice_level_set12_m1[29:20]
set12 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set12_0
ffe_slice_level_set12_0[19:10]
set12 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set12_p1
ffe_slice_level_set12_p1[9:0]
set12 of ffe +1 slicer level

Reset: hex:0x150;

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+0x0000017c Register(32 bit) ffe_slice_level_set13
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a17c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set13_m1 ffe_slice_level_set13_0 ffe_slice_level_set13_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set13_m1
ffe_slice_level_set13_m1[29:20]
set13 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set13_0
ffe_slice_level_set13_0[19:10]
set13 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set13_p1
ffe_slice_level_set13_p1[9:0]
set13 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000180 Register(32 bit) ffe_slice_level_set14
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a180 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set14_m1 ffe_slice_level_set14_0 ffe_slice_level_set14_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set14_m1
ffe_slice_level_set14_m1[29:20]
set14 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set14_0
ffe_slice_level_set14_0[19:10]
set14 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set14_p1
ffe_slice_level_set14_p1[9:0]
set14 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000184 Register(32 bit) ffe_slice_level_set15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a184 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x2b000150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ffe_slice_level_set15_m1 ffe_slice_level_set15_0 ffe_slice_level_set15_p1
Access - RW/V RW/V RW/V

[29:20]
RW/V

ffe_slice_level_set15_m1
ffe_slice_level_set15_m1[29:20]
set15 of ffe -1 slicer level

Reset: hex:0x2b0;

[19:10]
RW/V

ffe_slice_level_set15_0
ffe_slice_level_set15_0[19:10]
set15 of ffe 0 slicer level

Reset: hex:0x000;

[09:00]
RW/V

ffe_slice_level_set15_p1
ffe_slice_level_set15_p1[9:0]
set15 of ffe +1 slicer level

Reset: hex:0x150;

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+0x00000188 Register(32 bit) ffe_err_level_m1m3_set0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a188 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set0_m3 ffe_err_level_set0_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set0_m3
ffe_err_level_set0_m3[19:10]
set0 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set0_m1
ffe_err_level_set0_m1[9:0]
set0 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x0000018c Register(32 bit) ffe_err_level_p1p3_set0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a18c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set0_p3 ffe_err_level_set0_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set0_p3
ffe_err_level_set0_p3[19:10]
set0 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set0_p1
ffe_err_level_set0_p1[9:0]
set0 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x00000190 Register(32 bit) ffe_err_level_m1m3_set1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a190 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set1_m3 ffe_err_level_set1_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set1_m3
ffe_err_level_set1_m3[19:10]
set1 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set1_m1
ffe_err_level_set1_m1[9:0]
set1 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x00000194 Register(32 bit) ffe_err_level_p1p3_set1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a194 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set1_p3 ffe_err_level_set1_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set1_p3
ffe_err_level_set1_p3[19:10]
set1 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set1_p1
ffe_err_level_set1_p1[9:0]
set1 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x00000198 Register(32 bit) ffe_err_level_m1m3_set2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a198 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set2_m3 ffe_err_level_set2_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set2_m3
ffe_err_level_set2_m3[19:10]
set2 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set2_m1
ffe_err_level_set2_m1[9:0]
set2 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x0000019c Register(32 bit) ffe_err_level_p1p3_set2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a19c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set2_p3 ffe_err_level_set2_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set2_p3
ffe_err_level_set2_p3[19:10]
set2 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set2_p1
ffe_err_level_set2_p1[9:0]
set2 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001a0 Register(32 bit) ffe_err_level_m1m3_set3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1a0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set3_m3 ffe_err_level_set3_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set3_m3
ffe_err_level_set3_m3[19:10]
set3 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set3_m1
ffe_err_level_set3_m1[9:0]
set3 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001a4 Register(32 bit) ffe_err_level_p1p3_set3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1a4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set3_p3 ffe_err_level_set3_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set3_p3
ffe_err_level_set3_p3[19:10]
set3 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set3_p1
ffe_err_level_set3_p1[9:0]
set3 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001a8 Register(32 bit) ffe_err_level_m1m3_set4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1a8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set4_m3 ffe_err_level_set4_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set4_m3
ffe_err_level_set4_m3[19:10]
set4 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set4_m1
ffe_err_level_set4_m1[9:0]
set4 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001ac Register(32 bit) ffe_err_level_p1p3_set4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1ac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set4_p3 ffe_err_level_set4_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set4_p3
ffe_err_level_set4_p3[19:10]
set4 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set4_p1
ffe_err_level_set4_p1[9:0]
set4 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001b0 Register(32 bit) ffe_err_level_m1m3_set5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1b0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set5_m3 ffe_err_level_set5_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set5_m3
ffe_err_level_set5_m3[19:10]
set5 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set5_m1
ffe_err_level_set5_m1[9:0]
set5 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001b4 Register(32 bit) ffe_err_level_p1p3_set5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1b4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set5_p3 ffe_err_level_set5_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set5_p3
ffe_err_level_set5_p3[19:10]
set5 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set5_p1
ffe_err_level_set5_p1[9:0]
set5 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001b8 Register(32 bit) ffe_err_level_m1m3_set6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1b8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set6_m3 ffe_err_level_set6_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set6_m3
ffe_err_level_set6_m3[19:10]
set6 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set6_m1
ffe_err_level_set6_m1[9:0]
set6 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001bc Register(32 bit) ffe_err_level_p1p3_set6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1bc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set6_p3 ffe_err_level_set6_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set6_p3
ffe_err_level_set6_p3[19:10]
set6 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set6_p1
ffe_err_level_set6_p1[9:0]
set6 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001c0 Register(32 bit) ffe_err_level_m1m3_set7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1c0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set7_m3 ffe_err_level_set7_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set7_m3
ffe_err_level_set7_m3[19:10]
set7 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set7_m1
ffe_err_level_set7_m1[9:0]
set7 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001c4 Register(32 bit) ffe_err_level_p1p3_set7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1c4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set7_p3 ffe_err_level_set7_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set7_p3
ffe_err_level_set7_p3[19:10]
set7 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set7_p1
ffe_err_level_set7_p1[9:0]
set7 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001c8 Register(32 bit) ffe_err_level_m1m3_set8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1c8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set8_m3 ffe_err_level_set8_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set8_m3
ffe_err_level_set8_m3[19:10]
set8 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set8_m1
ffe_err_level_set8_m1[9:0]
set8 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001cc Register(32 bit) ffe_err_level_p1p3_set8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1cc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set8_p3 ffe_err_level_set8_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set8_p3
ffe_err_level_set8_p3[19:10]
set8 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set8_p1
ffe_err_level_set8_p1[9:0]
set8 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001d0 Register(32 bit) ffe_err_level_m1m3_set9
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1d0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set9_m3 ffe_err_level_set9_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set9_m3
ffe_err_level_set9_m3[19:10]
set9 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set9_m1
ffe_err_level_set9_m1[9:0]
set9 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001d4 Register(32 bit) ffe_err_level_p1p3_set9
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1d4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set9_p3 ffe_err_level_set9_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set9_p3
ffe_err_level_set9_p3[19:10]
set9 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set9_p1
ffe_err_level_set9_p1[9:0]
set9 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001d8 Register(32 bit) ffe_err_level_m1m3_set10
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1d8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set10_m3 ffe_err_level_set10_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set10_m3
ffe_err_level_set10_m3[19:10]
set10 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set10_m1
ffe_err_level_set10_m1[9:0]
set10 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001dc Register(32 bit) ffe_err_level_p1p3_set10
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1dc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set10_p3 ffe_err_level_set10_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set10_p3
ffe_err_level_set10_p3[19:10]
set10 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set10_p1
ffe_err_level_set10_p1[9:0]
set10 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001e0 Register(32 bit) ffe_err_level_m1m3_set11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1e0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set11_m3 ffe_err_level_set11_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set11_m3
ffe_err_level_set11_m3[19:10]
set11 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set11_m1
ffe_err_level_set11_m1[9:0]
set11 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001e4 Register(32 bit) ffe_err_level_p1p3_set11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1e4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set11_p3 ffe_err_level_set11_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set11_p3
ffe_err_level_set11_p3[19:10]
set11 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set11_p1
ffe_err_level_set11_p1[9:0]
set11 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001e8 Register(32 bit) ffe_err_level_m1m3_set12
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1e8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set12_m3 ffe_err_level_set12_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set12_m3
ffe_err_level_set12_m3[19:10]
set12 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set12_m1
ffe_err_level_set12_m1[9:0]
set12 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001ec Register(32 bit) ffe_err_level_p1p3_set12
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1ec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set12_p3 ffe_err_level_set12_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set12_p3
ffe_err_level_set12_p3[19:10]
set12 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set12_p1
ffe_err_level_set12_p1[9:0]
set12 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001f0 Register(32 bit) ffe_err_level_m1m3_set13
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1f0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set13_m3 ffe_err_level_set13_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set13_m3
ffe_err_level_set13_m3[19:10]
set13 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set13_m1
ffe_err_level_set13_m1[9:0]
set13 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001f4 Register(32 bit) ffe_err_level_p1p3_set13
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1f4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set13_p3 ffe_err_level_set13_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set13_p3
ffe_err_level_set13_p3[19:10]
set13 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set13_p1
ffe_err_level_set13_p1[9:0]
set13 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x000001f8 Register(32 bit) ffe_err_level_m1m3_set14
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1f8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set14_m3 ffe_err_level_set14_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set14_m3
ffe_err_level_set14_m3[19:10]
set14 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set14_m1
ffe_err_level_set14_m1[9:0]
set14 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x000001fc Register(32 bit) ffe_err_level_p1p3_set14
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a1fc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set14_p3 ffe_err_level_set14_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set14_p3
ffe_err_level_set14_p3[19:10]
set14 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set14_p1
ffe_err_level_set14_p1[9:0]
set14 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x00000200 Register(32 bit) ffe_err_level_m1m3_set15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a200 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00082350
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 1 1 0 1 0 1 0 0 0 0
Name - ffe_err_level_set15_m3 ffe_err_level_set15_m1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set15_m3
ffe_err_level_set15_m3[19:10]
set15 of ffe error -3 slicer level

Reset: hex:0x208;

[09:00]
RW/V

ffe_err_level_set15_m1
ffe_err_level_set15_m1[9:0]
set15 of ffe error -1 slicer level

Reset: hex:0x350;

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+0x00000204 Register(32 bit) ffe_err_level_p1p3_set15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a204 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0007e0b0
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0 0
Name - ffe_err_level_set15_p3 ffe_err_level_set15_p1
Access - RW/V RW/V

[19:10]
RW/V

ffe_err_level_set15_p3
ffe_err_level_set15_p3[19:10]
set15 of ffe error +3 slicer level

Reset: hex:0x1f8;

[09:00]
RW/V

ffe_err_level_set15_p1
ffe_err_level_set15_p1[9:0]
set15 of ffe error +1 slicer level

Reset: hex:0x0b0;

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+0x00000208 Register(32 bit) rx_dump_mem_ctrl
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a208 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffffc0
Undefined 0xffffffc0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0
Name - dump_mem_src_sel adc_dump_wait_for_rx_rdy adc_dump_mem_en
Access - RW RW RW

[05:02]
RW

dump_mem_src_sel
dump_mem_src_sel[5:2]
0000-ADC out\n0001-FFE out pre slicer ( 64x6 MSB bits)\n0010 -FFE post slicer data and error (64x2bits data +64x1 error)\n0011-CDR FFE pre slicer (64x6 msb 8:3)\n0100-CDR ffe post slicer data+error (64x2bits data + 64x1bits error)\n0101 -DFE out data and error (64x2bits + 64x1bit) \n0110-CDR alexander PD data (64x2bits) \n0111 -CDR baud rate PD data and error ( 64x2bits +64x1 error )

Reset: hex:0x0;

[01:01]
RW

adc_dump_wait_for_rx_rdy
adc_dump_wait_for_rx_rdy[1:1]
default=0. When sets to 1 waits for rx_rdy to assert AND dump_en=1 before starting dump.

Reset: hex:0x0;

[00:00]
RW

adc_dump_mem_en
adc_dump_mem_en[0:0]
default=0. When sets to 1 enables the ADC data dump from lane0 to mem dump in cmn global enable for the feature

Reset: hex:0x0;

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+0x0000020c Register(32 bit) rx_dump_mem_apb_rd_data
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a20c at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rx_dump_mem_apb_rd_data
Access RO/V

[31:00]
RO/V

rx_dump_mem_apb_rd_data
rx_dump_mem_apb_rd_data[31:0]
Read data result from rx fifo 32bits based on src sel

Reset: hex:0x00000000;

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+0x00000210 Register(32 bit) rx_dump_mem_apb_rd_en
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a210 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffffe
Undefined 0xfffffffe

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0
Name - rx_dump_mem_apb_rd_en
Access - RW

[00:00]
RW

rx_dump_mem_apb_rd_en
rx_dump_mem_apb_rd_en[0:0]
default=0. When set to 1 Enables the read interface through RX APB and disables memory reads from cmn

Reset: hex:0x0;

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+0x00000214 Register(32 bit) rx_dump_mem_apb_en
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a214 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000018
Unaffected 0xffffffe0
Undefined 0xffffffe0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - 1 1 0 0 0
Name - rx_dump_mem_num_trans rx_dump_mem_apb_en
Access - RW RW

[04:01]
RW

rx_dump_mem_num_trans
rx_dump_mem_num_trans[4:1]
default=12. output 12x32 bits from each fifo address.

Reset: hex:0xc;

[00:00]
RW

rx_dump_mem_apb_en
rx_dump_mem_apb_en[0:0]
default=0. When set to 1 Enables the read interface through RX APB and disables memory reads from cmn

Reset: hex:0x0;

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+0x00000218 Register(32 bit) rx_data_path_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a218 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff001800
Undefined 0xff001800

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_vref_mu_boost cdr_vref_mu_boost adc_vref_mu_boost cdr_phdt_update_dis cdr_phdt_src_sel hist_cdr_voters_sel hist_src_sel - rx_adc_0_code_replace datapath_data_source_sel cdr_ffe_slice_inv_p_err cdr_ffe_slice_inv_n_err adc_slice_inv_p_err adc_slice_inv_n_err ffe_slice_inv_p_err ffe_slice_inv_n_err
Access - RW RW RW RW RW RW RW - RW RW RW RW RW RW RW RW

[23:22]
RW

ffe_vref_mu_boost
ffe_vref_mu_boost[23:22]
shift factor for ffe_vref_mu

Reset: hex:0x0;

[21:20]
RW

cdr_vref_mu_boost
cdr_vref_mu_boost[21:20]
shift factor for cdr_vref_mu

Reset: hex:0x0;

[19:18]
RW

adc_vref_mu_boost
adc_vref_mu_boost[19:18]
shift factor for adc_vref_mu

Reset: hex:0x0;

[17:17]
RW

cdr_phdt_update_dis
cdr_phdt_update_dis[17:17]
Disable updates on the interface with analog PD

Reset: hex:0x0;

[16:16]
RW

cdr_phdt_src_sel
cdr_phdt_src_sel[16:16]
Source for VREF levels selected to analog FHDT 0 ADC_VREF 1 CDR_FFE_VREF

Reset: hex:0x0;

[15:15]
RW

hist_cdr_voters_sel
hist_cdr_voters_sel[15:15]
Histogram wide bin counter selection CDR voters

Reset: hex:0x0;

[14:13]
RW

hist_src_sel
hist_src_sel[14:13]
Histogram engine source selection: 0-from ffe slicer, 1-from dfe slicer, 2-select adc slicer, 3-reserved

Reset: hex:0x0;

[10:08]
RW

rx_adc_0_code_replace
rx_adc_0_code_replace[10:8]
replace zero adc input with non-zero data:\n0 - repalce with 0x1\n1 - replace with 0x2\n2 - replace with 0x4\n3 - replace with 0x8\nothers - no replacement

Reset: hex:0x0;

[07:06]
RW

datapath_data_source_sel
datapath_data_source_sel[7:6]
Rx data path source selection: 0-select ffe slicer, 1-select dfe slicer, 2-select adc slicer

Reset: hex:0x0;

[05:05]
RW

cdr_ffe_slice_inv_p_err
cdr_ffe_slice_inv_p_err[5:5]
Invert cdr ffe slicer +1/+3 polarity

Reset: hex:0x0;

[04:04]
RW

cdr_ffe_slice_inv_n_err
cdr_ffe_slice_inv_n_err[4:4]
Invert cdr ffe slicer -1/-3 polarity

Reset: hex:0x0;

[03:03]
RW

adc_slice_inv_p_err
adc_slice_inv_p_err[3:3]
Invert adc slicer +1/+3 polarity

Reset: hex:0x0;

[02:02]
RW

adc_slice_inv_n_err
adc_slice_inv_n_err[2:2]
Invert adc slicer -1/-3 polarity

Reset: hex:0x0;

[01:01]
RW

ffe_slice_inv_p_err
ffe_slice_inv_p_err[1:1]
Invert ffe slicer +1/+3 polarity

Reset: hex:0x0;

[00:00]
RW

ffe_slice_inv_n_err
ffe_slice_inv_n_err[0:0]
Invert ffe slicer -1/-3 polarity

Reset: hex:0x0;

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+0x0000021c Register(32 bit) adp_msb_lsb_swap_ctrl
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a21c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000003
Unaffected 0xfc000010
Undefined 0xfc000010

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - 0 0 1 1
Name - hist_compr_swap ffe_filter_msb_inv_cb ffe_in_msb_inv_cb - cdr_ffe_in_msb_inv_cb lms_msb_inv_cb dp_src_sel_msb_newest_en fs_lsb_newest_en
Access - RW RW RW - RW RW RW RW

[25:07]
RW

hist_compr_swap
hist_compr_swap[25:7]
Swap bin counter comparators function. 0: (limit_lo>= and limit_hi<) 1:(limit_lo> and limit_hi=<)

Reset: hex:0x00000;

[06:06]
RW

ffe_filter_msb_inv_cb
ffe_filter_msb_inv_cb[6:6]
default=0. In case ffe filter input is msb newest, set this to 1 to swap them to lsb newest

Reset: hex:0x0;

[05:05]
RW

ffe_in_msb_inv_cb
ffe_in_msb_inv_cb[5:5]
default=0. In case ffe input is msb newest, set this to 1 to swap them to lsb newest

Reset: hex:0x0;

[03:03]
RW

cdr_ffe_in_msb_inv_cb
cdr_ffe_in_msb_inv_cb[3:3]
default=0. In case cdr ffe input is msb newest, set this to 1 to swap them to lsb newest

Reset: hex:0x0;

[02:02]
RW

lms_msb_inv_cb
lms_msb_inv_cb[2:2]
default=0. In case adp input is msb newest, set this to 1 to swap them to lsb newest

Reset: hex:0x0;

[01:01]
RW

dp_src_sel_msb_newest_en
dp_src_sel_msb_newest_en[1:1]
default=1. Make datapath source selection output msb newest before rx data post-processing

Reset: hex:0x1;

[00:00]
RW

fs_lsb_newest_en
fs_lsb_newest_en[0:0]
default =1. Make first sample output lsb newest before ffe input

Reset: hex:0x1;

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+0x00000220 Register(32 bit) ffe_float_tap_position1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a220 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x03020100
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 1 1 - - 0 0 0 0 1 0 - - 0 0 0 0 0 1 - - 0 0 0 0 0 0
Name - float_tap_3_position - float_tap_2_position - float_tap_1_position - float_tap_0_position
Access - RW - RW - RW - RW

[29:24]
RW

float_tap_3_position
float_tap_3_position[29:24]
ffe floating tap 0 position, range is [0, 48] , selecting index range [16:16+48], default is 3

Reset: hex:0x03;

[21:16]
RW

float_tap_2_position
float_tap_2_position[21:16]
ffe floating tap 0 position, range is [0, 48] , selecting index range [16:16+48], default is 2

Reset: hex:0x02;

[13:08]
RW

float_tap_1_position
float_tap_1_position[13:8]
ffe floating tap 0 position, range is [0, 48] , selecting index range [16:16+48], default is 1

Reset: hex:0x01;

[05:00]
RW

float_tap_0_position
float_tap_0_position[5:0]
ffe floating tap 0 position, range is [0, 48] , selecting index range [16:16+48], default is 0

Reset: hex:0x00;

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+0x00000224 Register(32 bit) ffe_float_tap_position2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a224 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x07060504
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 1 1 1 - - 0 0 0 1 1 0 - - 0 0 0 1 0 1 - - 0 0 0 1 0 0
Name - float_tap_7_position - float_tap_6_position - float_tap_5_position - float_tap_4_position
Access - RW - RW - RW - RW

[29:24]
RW

float_tap_7_position
float_tap_7_position[29:24]
ffe floating tap 0 position, range is [0, 48] , selecting index range [16:16+48], default is 7

Reset: hex:0x07;

[21:16]
RW

float_tap_6_position
float_tap_6_position[21:16]
ffe floating tap 0 position, range is [0, 48] , selecting index range [16:16+48], default is 6

Reset: hex:0x06;

[13:08]
RW

float_tap_5_position
float_tap_5_position[13:8]
ffe floating tap 0 position, range is [0, 48] , selecting index range [16:16+48], default is 5

Reset: hex:0x05;

[05:00]
RW

float_tap_4_position
float_tap_4_position[5:0]
ffe floating tap 0 position, range is [0, 48] , selecting index range [16:16+48], default is 4

Reset: hex:0x04;

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+0x00000228 Register(32 bit) ffe_float_tap_position3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a228 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000008
Unaffected 0xffffffc0
Undefined 0xffffffc0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 1 0 0 0
Name - float_tap_8_position
Access - RW

[05:00]
RW

float_tap_8_position
float_tap_8_position[5:0]
ffe floating tap 0 position, range is [0, 48] , selecting index range [16:16+48], default is 8

Reset: hex:0x08;

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+0x0000022c Register(32 bit) rxeq_clock_gating_ctrl_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a22c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_gated_0
Access RW

[31:00]
RW

ffe_gated_0
ffe_gated_0[31:0]
clock gating for ffe0 to ffe31, default is no clock gating

Reset: hex:0x00000000;

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+0x00000230 Register(32 bit) rxeq_clock_gating_ctrl_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a230 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_gated_1
Access RW

[31:00]
RW

ffe_gated_1
ffe_gated_1[31:0]
clock gating for ffe32 to ffe63, default is no clock gating

Reset: hex:0x00000000;

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+0x00000234 Register(32 bit) rxeq_clock_gating_ctrl_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a234 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_lms_gated
Access - RW

[23:00]
RW

ffe_lms_gated
ffe_lms_gated[23:0]
clock gating for 24 ffe lms engine (15 static + 9 floating), default is no clock gating

Reset: hex:0x000000;

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+0x00000238 Register(32 bit) rxeq_clock_gating_ctrl_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a238 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name dfe_windowing_gated dfe_lms_gated ofc_lms_gated adcofc_lms_gated vga_lms_gated hst_lms_gated affe_lms_gated adcvref_lms_gated dfe_64la_gated edgvref_lms_gated vref_lms_gated
Access RW RW RW RW RW RW RW RW RW RW RW

[31:31]
RW

dfe_windowing_gated
dfe_windowing_gated[31:31]
clock gating for Windowing dfe engine, default is no clock gating

Reset: hex:0x0;

[30:30]
RW

dfe_lms_gated
dfe_lms_gated[30:30]
clock gating for dfe lms engine, default is no clock gating

Reset: hex:0x0;

[29:24]
RW

ofc_lms_gated
ofc_lms_gated[29:24]
clock gating for 6 adcofc lms engine, default is no clock gating

Reset: hex:0x00;

[23:18]
RW

adcofc_lms_gated
adcofc_lms_gated[23:18]
clock gating for 6 ofc lms engine, default is no clock gating

Reset: hex:0x00;

[17:17]
RW

vga_lms_gated
vga_lms_gated[17:17]
clock gating for vga lms engine, default is no clock gating

Reset: hex:0x0;

[16:16]
RW

hst_lms_gated
hst_lms_gated[16:16]
clock gating for histgram lms engine, default is no clock gating

Reset: hex:0x0;

[15:12]
RW

affe_lms_gated
affe_lms_gated[15:12]
clock gating for 4 affe lms engine, default is no clock gating

Reset: hex:0x0;

[11:08]
RW

adcvref_lms_gated
adcvref_lms_gated[11:8]
clock gating for 4 adcvref lms engine, default is no clock gating

Reset: hex:0x0;

[07:07]
RW

dfe_64la_gated
dfe_64la_gated[7:7]
clock gating for 64LA dfe engine, default is no clock gating

Reset: hex:0x0;

[06:04]
RW

edgvref_lms_gated
edgvref_lms_gated[6:4]
clock gating for 3 edgvref lms engine, default is no clock gating

Reset: hex:0x0;

[03:00]
RW

vref_lms_gated
vref_lms_gated[3:0]
clock gating for 4 vref lms engine, default is no clock gating

Reset: hex:0x0;

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+0x0000023c Register(32 bit) rxeq_clock_gating_ctrl_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a23c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffff00
Undefined 0xffffff00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0
Name - ops_lms_gated
Access - RW

[07:00]
RW

ops_lms_gated
ops_lms_gated[7:0]
clock gating for ops 0 to 37 lms engine, default is no clock gating

Reset: hex:0x00;

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+0x00000240 Register(32 bit) rxeq_clock_gating_ctrl_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a240 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_gated_0
Access RW

[31:00]
RW

cdr_ffe_gated_0
cdr_ffe_gated_0[31:0]
clock gating for cdr_ffe 0 to cdr_ffe 31 , default is no clock gating

Reset: hex:0x00000000;

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+0x00000244 Register(32 bit) rxeq_clock_gating_ctrl_7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a244 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_gated_1
Access RW

[31:00]
RW

cdr_ffe_gated_1
cdr_ffe_gated_1[31:0]
clock gating for cdr_ffe 32 to cdr_ffe 63 , default is no clock gating

Reset: hex:0x00000000;

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+0x00000248 Register(32 bit) rxeq_clock_gating_ctrl_8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a248 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffc0080
Undefined 0xfffc0080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - cdr_ffe_vref_lms_gated cdr_ffe_ofc_lms_gated - cdr_ffe_lms_gated
Access - RW RW - RW

[17:14]
RW

cdr_ffe_vref_lms_gated
cdr_ffe_vref_lms_gated[17:14]
clock gating for cdr ffe vref lms

Reset: hex:0x0;

[13:08]
RW

cdr_ffe_ofc_lms_gated
cdr_ffe_ofc_lms_gated[13:8]
clock gating for cdr ffe ofc lms

Reset: hex:0x00;

[06:00]
RW

cdr_ffe_lms_gated
cdr_ffe_lms_gated[6:0]
clock gating for cdr ffe tap lms

Reset: hex:0x00;

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+0x0000028c Register(32 bit) adc_slicer_level_set0_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a28c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set0_m1 - adc_slice_level_set0_0 - adc_slice_level_set0_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set0_m1
adc_slice_level_set0_m1[21:16]
set0 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set0_0
adc_slice_level_set0_0[13:8]
set0 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set0_p1
adc_slice_level_set0_p1[5:0]
set0 of adc +1 slicer level

Reset: hex:0x15;

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+0x00000290 Register(32 bit) adc_slicer_level_set1_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a290 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set1_m1 - adc_slice_level_set1_0 - adc_slice_level_set1_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set1_m1
adc_slice_level_set1_m1[21:16]
set1 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set1_0
adc_slice_level_set1_0[13:8]
set1 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set1_p1
adc_slice_level_set1_p1[5:0]
set1 of adc +1 slicer level

Reset: hex:0x15;

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+0x00000294 Register(32 bit) adc_slicer_level_set2_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a294 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set2_m1 - adc_slice_level_set2_0 - adc_slice_level_set2_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set2_m1
adc_slice_level_set2_m1[21:16]
set2 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set2_0
adc_slice_level_set2_0[13:8]
set2 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set2_p1
adc_slice_level_set2_p1[5:0]
set2 of adc +1 slicer level

Reset: hex:0x15;

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+0x00000298 Register(32 bit) adc_slicer_level_set3_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a298 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set3_m1 - adc_slice_level_set3_0 - adc_slice_level_set3_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set3_m1
adc_slice_level_set3_m1[21:16]
set3 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set3_0
adc_slice_level_set3_0[13:8]
set3 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set3_p1
adc_slice_level_set3_p1[5:0]
set3 of adc +1 slicer level

Reset: hex:0x15;

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+0x0000029c Register(32 bit) adc_slicer_level_set4_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a29c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set4_m1 - adc_slice_level_set4_0 - adc_slice_level_set4_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set4_m1
adc_slice_level_set4_m1[21:16]
set4 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set4_0
adc_slice_level_set4_0[13:8]
set4 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set4_p1
adc_slice_level_set4_p1[5:0]
set4 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002a0 Register(32 bit) adc_slicer_level_set5_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2a0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set5_m1 - adc_slice_level_set5_0 - adc_slice_level_set5_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set5_m1
adc_slice_level_set5_m1[21:16]
set5 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set5_0
adc_slice_level_set5_0[13:8]
set5 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set5_p1
adc_slice_level_set5_p1[5:0]
set5 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002a4 Register(32 bit) adc_slicer_level_set6_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2a4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set6_m1 - adc_slice_level_set6_0 - adc_slice_level_set6_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set6_m1
adc_slice_level_set6_m1[21:16]
set6 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set6_0
adc_slice_level_set6_0[13:8]
set6 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set6_p1
adc_slice_level_set6_p1[5:0]
set6 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002a8 Register(32 bit) adc_slicer_level_set7_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2a8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set7_m1 - adc_slice_level_set7_0 - adc_slice_level_set7_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set7_m1
adc_slice_level_set7_m1[21:16]
set7 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set7_0
adc_slice_level_set7_0[13:8]
set7 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set7_p1
adc_slice_level_set7_p1[5:0]
set7 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002ac Register(32 bit) adc_slicer_level_set8_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2ac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set8_m1 - adc_slice_level_set8_0 - adc_slice_level_set8_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set8_m1
adc_slice_level_set8_m1[21:16]
set8 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set8_0
adc_slice_level_set8_0[13:8]
set8 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set8_p1
adc_slice_level_set8_p1[5:0]
set8 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002b0 Register(32 bit) adc_slicer_level_set9_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2b0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set9_m1 - adc_slice_level_set9_0 - adc_slice_level_set9_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set9_m1
adc_slice_level_set9_m1[21:16]
set9 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set9_0
adc_slice_level_set9_0[13:8]
set9 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set9_p1
adc_slice_level_set9_p1[5:0]
set9 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002b4 Register(32 bit) adc_slicer_level_set10_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2b4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set10_m1 - adc_slice_level_set10_0 - adc_slice_level_set10_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set10_m1
adc_slice_level_set10_m1[21:16]
set10 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set10_0
adc_slice_level_set10_0[13:8]
set10 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set10_p1
adc_slice_level_set10_p1[5:0]
set10 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002b8 Register(32 bit) adc_slicer_level_set11_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2b8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set11_m1 - adc_slice_level_set11_0 - adc_slice_level_set11_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set11_m1
adc_slice_level_set11_m1[21:16]
set11 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set11_0
adc_slice_level_set11_0[13:8]
set11 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set11_p1
adc_slice_level_set11_p1[5:0]
set11 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002bc Register(32 bit) adc_slicer_level_set12_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2bc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set12_m1 - adc_slice_level_set12_0 - adc_slice_level_set12_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set12_m1
adc_slice_level_set12_m1[21:16]
set12 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set12_0
adc_slice_level_set12_0[13:8]
set12 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set12_p1
adc_slice_level_set12_p1[5:0]
set12 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002c0 Register(32 bit) adc_slicer_level_set13_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2c0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set13_m1 - adc_slice_level_set13_0 - adc_slice_level_set13_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set13_m1
adc_slice_level_set13_m1[21:16]
set13 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set13_0
adc_slice_level_set13_0[13:8]
set13 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set13_p1
adc_slice_level_set13_p1[5:0]
set13 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002c4 Register(32 bit) adc_slicer_level_set14_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2c4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set14_m1 - adc_slice_level_set14_0 - adc_slice_level_set14_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set14_m1
adc_slice_level_set14_m1[21:16]
set14 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set14_0
adc_slice_level_set14_0[13:8]
set14 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set14_p1
adc_slice_level_set14_p1[5:0]
set14 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002c8 Register(32 bit) adc_slicer_level_set15_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2c8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x002b0015
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 0 1 0 1 1 - - 0 0 0 0 0 0 - - 0 1 0 1 0 1
Name - adc_slice_level_set15_m1 - adc_slice_level_set15_0 - adc_slice_level_set15_p1
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adc_slice_level_set15_m1
adc_slice_level_set15_m1[21:16]
set15 of adc -1 slicer level

Reset: hex:0x2b;

[13:08]
RW/V

adc_slice_level_set15_0
adc_slice_level_set15_0[13:8]
set15 of adc 0 slicer level

Reset: hex:0x00;

[05:00]
RW/V

adc_slice_level_set15_p1
adc_slice_level_set15_p1[5:0]
set15 of adc +1 slicer level

Reset: hex:0x15;

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+0x000002cc Register(32 bit) adc_err_level_set0_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2cc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set0_m3 - adc_err_level_set0_m1 - adc_err_level_set0_p1 - adc_err_level_set0_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set0_m3
adc_err_level_set0_m3[29:24]
set0 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set0_m1
adc_err_level_set0_m1[21:16]
set0 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set0_p1
adc_err_level_set0_p1[13:8]
set0 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set0_p3
adc_err_level_set0_p3[5:0]
set0 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x000002d0 Register(32 bit) adc_err_level_set1_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2d0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set1_m3 - adc_err_level_set1_m1 - adc_err_level_set1_p1 - adc_err_level_set1_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set1_m3
adc_err_level_set1_m3[29:24]
set1 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set1_m1
adc_err_level_set1_m1[21:16]
set1 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set1_p1
adc_err_level_set1_p1[13:8]
set1 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set1_p3
adc_err_level_set1_p3[5:0]
set1 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x000002d4 Register(32 bit) adc_err_level_set2_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2d4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set2_m3 - adc_err_level_set2_m1 - adc_err_level_set2_p1 - adc_err_level_set2_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set2_m3
adc_err_level_set2_m3[29:24]
set2 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set2_m1
adc_err_level_set2_m1[21:16]
set2 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set2_p1
adc_err_level_set2_p1[13:8]
set2 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set2_p3
adc_err_level_set2_p3[5:0]
set2 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x000002d8 Register(32 bit) adc_err_level_set3_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2d8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set3_m3 - adc_err_level_set3_m1 - adc_err_level_set3_p1 - adc_err_level_set3_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set3_m3
adc_err_level_set3_m3[29:24]
set3 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set3_m1
adc_err_level_set3_m1[21:16]
set3 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set3_p1
adc_err_level_set3_p1[13:8]
set3 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set3_p3
adc_err_level_set3_p3[5:0]
set3 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x000002dc Register(32 bit) adc_err_level_set4_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2dc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set4_m3 - adc_err_level_set4_m1 - adc_err_level_set4_p1 - adc_err_level_set4_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set4_m3
adc_err_level_set4_m3[29:24]
set4 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set4_m1
adc_err_level_set4_m1[21:16]
set4 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set4_p1
adc_err_level_set4_p1[13:8]
set4 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set4_p3
adc_err_level_set4_p3[5:0]
set4 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x000002e0 Register(32 bit) adc_err_level_set5_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2e0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set5_m3 - adc_err_level_set5_m1 - adc_err_level_set5_p1 - adc_err_level_set5_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set5_m3
adc_err_level_set5_m3[29:24]
set5 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set5_m1
adc_err_level_set5_m1[21:16]
set5 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set5_p1
adc_err_level_set5_p1[13:8]
set5 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set5_p3
adc_err_level_set5_p3[5:0]
set5 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x000002e4 Register(32 bit) adc_err_level_set6_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2e4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set6_m3 - adc_err_level_set6_m1 - adc_err_level_set6_p1 - adc_err_level_set6_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set6_m3
adc_err_level_set6_m3[29:24]
set6 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set6_m1
adc_err_level_set6_m1[21:16]
set6 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set6_p1
adc_err_level_set6_p1[13:8]
set6 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set6_p3
adc_err_level_set6_p3[5:0]
set6 of adc +3 slicer err level

Reset: hex:0x1f;

Back to AddressMap

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+0x000002e8 Register(32 bit) adc_err_level_set7_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2e8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set7_m3 - adc_err_level_set7_m1 - adc_err_level_set7_p1 - adc_err_level_set7_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set7_m3
adc_err_level_set7_m3[29:24]
set7 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set7_m1
adc_err_level_set7_m1[21:16]
set7 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set7_p1
adc_err_level_set7_p1[13:8]
set7 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set7_p3
adc_err_level_set7_p3[5:0]
set7 of adc +3 slicer err level

Reset: hex:0x1f;

Back to AddressMap

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+0x000002ec Register(32 bit) adc_err_level_set8_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2ec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set8_m3 - adc_err_level_set8_m1 - adc_err_level_set8_p1 - adc_err_level_set8_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set8_m3
adc_err_level_set8_m3[29:24]
set8 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set8_m1
adc_err_level_set8_m1[21:16]
set8 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set8_p1
adc_err_level_set8_p1[13:8]
set8 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set8_p3
adc_err_level_set8_p3[5:0]
set8 of adc +3 slicer err level

Reset: hex:0x1f;

Back to AddressMap

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+0x000002f0 Register(32 bit) adc_err_level_set9_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2f0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set9_m3 - adc_err_level_set9_m1 - adc_err_level_set9_p1 - adc_err_level_set9_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set9_m3
adc_err_level_set9_m3[29:24]
set9 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set9_m1
adc_err_level_set9_m1[21:16]
set9 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set9_p1
adc_err_level_set9_p1[13:8]
set9 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set9_p3
adc_err_level_set9_p3[5:0]
set9 of adc +3 slicer err level

Reset: hex:0x1f;

Back to AddressMap

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+0x000002f4 Register(32 bit) adc_err_level_set10_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2f4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set10_m3 - adc_err_level_set10_m1 - adc_err_level_set10_p1 - adc_err_level_set10_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set10_m3
adc_err_level_set10_m3[29:24]
set10 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set10_m1
adc_err_level_set10_m1[21:16]
set10 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set10_p1
adc_err_level_set10_p1[13:8]
set10 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set10_p3
adc_err_level_set10_p3[5:0]
set10 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x000002f8 Register(32 bit) adc_err_level_set11_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2f8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set11_m3 - adc_err_level_set11_m1 - adc_err_level_set11_p1 - adc_err_level_set11_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set11_m3
adc_err_level_set11_m3[29:24]
set11 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set11_m1
adc_err_level_set11_m1[21:16]
set11 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set11_p1
adc_err_level_set11_p1[13:8]
set11 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set11_p3
adc_err_level_set11_p3[5:0]
set11 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x000002fc Register(32 bit) adc_err_level_set12_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a2fc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set12_m3 - adc_err_level_set12_m1 - adc_err_level_set12_p1 - adc_err_level_set12_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set12_m3
adc_err_level_set12_m3[29:24]
set12 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set12_m1
adc_err_level_set12_m1[21:16]
set12 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set12_p1
adc_err_level_set12_p1[13:8]
set12 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set12_p3
adc_err_level_set12_p3[5:0]
set12 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x00000300 Register(32 bit) adc_err_level_set13_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a300 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set13_m3 - adc_err_level_set13_m1 - adc_err_level_set13_p1 - adc_err_level_set13_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set13_m3
adc_err_level_set13_m3[29:24]
set13 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set13_m1
adc_err_level_set13_m1[21:16]
set13 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set13_p1
adc_err_level_set13_p1[13:8]
set13 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set13_p3
adc_err_level_set13_p3[5:0]
set13 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x00000304 Register(32 bit) adc_err_level_set14_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a304 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set14_m3 - adc_err_level_set14_m1 - adc_err_level_set14_p1 - adc_err_level_set14_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set14_m3
adc_err_level_set14_m3[29:24]
set14 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set14_m1
adc_err_level_set14_m1[21:16]
set14 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set14_p1
adc_err_level_set14_p1[13:8]
set14 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set14_p3
adc_err_level_set14_p3[5:0]
set14 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x00000308 Register(32 bit) adc_err_level_set15_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a308 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x20350b1f
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 0 0 0 0 0 - - 1 1 0 1 0 1 - - 0 0 1 0 1 1 - - 0 1 1 1 1 1
Name - adc_err_level_set15_m3 - adc_err_level_set15_m1 - adc_err_level_set15_p1 - adc_err_level_set15_p3
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

adc_err_level_set15_m3
adc_err_level_set15_m3[29:24]
set15 of adc -3 slicer err level

Reset: hex:0x20;

[21:16]
RW/V

adc_err_level_set15_m1
adc_err_level_set15_m1[21:16]
set15 of adc -1 slicer err level

Reset: hex:0x35;

[13:08]
RW/V

adc_err_level_set15_p1
adc_err_level_set15_p1[13:8]
set15 of adc +1 slicer err level

Reset: hex:0x0b;

[05:00]
RW/V

adc_err_level_set15_p3
adc_err_level_set15_p3[5:0]
set15 of adc +3 slicer err level

Reset: hex:0x1f;

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+0x0000030c Register(32 bit) rxsararray_valid_calassist_ctrl0
Rx SAR Array Valid Calibration Assistance Control
Rx SAR Array Valid Calibration Assistance Control

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a30c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffffe0
Undefined 0xffffffe0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0
Name - rxsararrayvalidcalassist_calmeas_req rxsararrayvalidcalassist_calmeas_timer_pow2
Access - RW RW

[04:04]
RW

rxsararrayvalidcalassist_calmeas_req
rxsararrayvalidcalassist_calmeas_req[4:4]
Rx SAR Array Valid hardware calibration assistance measuring request

Reset: hex:0x0;

[03:00]
RW

rxsararrayvalidcalassist_calmeas_timer_pow2
rxsararrayvalidcalassist_calmeas_timer_pow2[3:0]
Rx SAR Array Valid hardware calibration assistance measuring timer in power of 2

Reset: hex:0x0;

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+0x00000310 Register(32 bit) rxsararray_valid_calassist_ctrl1
Rx SAR Array Valid Calibration Assistance Control
Rx SAR Array Valid Calibration Assistance Control

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a310 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxsararrayvalidcalassist_calmeas_dat_mask_31to0
Access RW

[31:00]
RW

rxsararrayvalidcalassist_calmeas_dat_mask_31to0
rxsararrayvalidcalassist_calmeas_dat_mask_31to0[31:0]
Rx SAR Array Valid hardware calibration data bit mask. Setting to 1 causes bit[x] not to be evaluated

Reset: hex:0x00000000;

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+0x00000314 Register(32 bit) rxsararray_valid_calassist_ctrl2
Rx SAR Array Valid Calibration Assistance Control
Rx SAR Array Valid Calibration Assistance Control

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a314 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxsararrayvalidcalassist_calmeas_dat_mask_63to32
Access RW

[31:00]
RW

rxsararrayvalidcalassist_calmeas_dat_mask_63to32
rxsararrayvalidcalassist_calmeas_dat_mask_63to32[31:0]
Rx SAR Array Valid hardware calibration data bit mask. Setting to 1 causes bit[x] not to be evaluated

Reset: hex:0x00000000;

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+0x00000318 Register(32 bit) rxsararray_valid_calassist_status
Rx SAR Array Valid Calibration Assistance Status
Rx SAR Array Valid Calibration Assistance Status

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a318 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfe000000
Undefined 0xfe000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - rxsararrayvalidcalassist_calmeas_ack rxsararrayvalidcalassist_calmeas_acc
Access - RO/V RO/V

[24:24]
RO/V

rxsararrayvalidcalassist_calmeas_ack
rxsararrayvalidcalassist_calmeas_ack[24:24]
Rx SAR Array Valid hardware calibration assistance measuring ack

Reset: hex:0x0;

[23:00]
RO/V

rxsararrayvalidcalassist_calmeas_acc
rxsararrayvalidcalassist_calmeas_acc[23:0]
Rx SAR Array Valid hardware calibration assistance measuring accumulator

Reset: hex:0x000000;

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+0x0000031c Register(32 bit) rxsar_calassist_ctrl
Rx SAR Calibration Assistance Control
Rx SAR Calibration Assistance Control

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a31c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - rxsarcalassist_calmeas_req rxsarcalassist_calmeas_clr_count rxsarcalassist_calmeas_valid_count rxsarcalassist_calmeas_pow2count rxsarcalassist_calmeas_dlycount rxsarcalassist_rxdat_slicer_bit_sel rxsarcalassist_rxdat_slicer_sar_sel rxsarcalassist_rxdat_slicer_quartet_sel rxsarcalassist_rxdat_slicer_quad_sel
Access - RW RW RW RW RW RW RW RW RW

[29:29]
RW

rxsarcalassist_calmeas_req
rxsarcalassist_calmeas_req[29:29]
Rx SAR hardware calibration assitance - measuring request

Reset: hex:0x0;

[28:25]
RW

rxsarcalassist_calmeas_clr_count
rxsarcalassist_calmeas_clr_count[28:25]
Rx SAR hardware calibration assitance - measuring clear

Reset: hex:0x0;

[24:21]
RW

rxsarcalassist_calmeas_valid_count
rxsarcalassist_calmeas_valid_count[24:21]
Rx SAR hardware calibration assitance - measuring valid counter

Reset: hex:0x0;

[20:18]
RW

rxsarcalassist_calmeas_pow2count
rxsarcalassist_calmeas_pow2count[20:18]
Rx SAR hardware calibration assitance - measuring period in a power of 2

Reset: hex:0x0;

[17:09]
RW

rxsarcalassist_calmeas_dlycount
rxsarcalassist_calmeas_dlycount[17:9]
Rx SAR hardware calibration assitance - measuring delay counter

Reset: hex:0x000;

[08:06]
RW

rxsarcalassist_rxdat_slicer_bit_sel
rxsarcalassist_rxdat_slicer_bit_sel[8:6]
Rx SAR hardware calibration assitance - Bit selection - selection beween SAR0<>SAR1 withink the same quad, quartet, and same SAR

Reset: hex:0x0;

[05:04]
RW

rxsarcalassist_rxdat_slicer_sar_sel
rxsarcalassist_rxdat_slicer_sar_sel[5:4]
Rx SAR hardware calibration assitance - SAR selection - selection beween SAR0<>SAR1 withink the same quad and quartet

Reset: hex:0x0;

[03:02]
RW

rxsarcalassist_rxdat_slicer_quartet_sel
rxsarcalassist_rxdat_slicer_quartet_sel[3:2]
Rx SAR hardware calibration assitance - Quartet selection - selecting between Qut0 <> Qut3 within a quad

Reset: hex:0x0;

[01:00]
RW

rxsarcalassist_rxdat_slicer_quad_sel
rxsarcalassist_rxdat_slicer_quad_sel[1:0]
Rx SAR hardware calibration assitance - Quad selection - selecting between Q0 <> Q3

Reset: hex:0x0;

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+0x00000320 Register(32 bit) rxsar_calassist_status
Rx SAR Calibration Assistance Status
Rx SAR Calibration Assistance Status

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a320 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffffc
Undefined 0xfffffffc

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0
Name - rxsarcalassist_calmeas_ack rxsarcalassist_calmeasavg
Access - RO/V RO/V

[01:01]
RO/V

rxsarcalassist_calmeas_ack
rxsarcalassist_calmeas_ack[1:1]
Rx SAR hardware calibration assitance - measuring ack

Reset: hex:0x0;

[00:00]
RO/V

rxsarcalassist_calmeasavg
rxsarcalassist_calmeasavg[0:0]
Rx SAR hardware calibration assitance - measuring accumulation value

Reset: hex:0x0;

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+0x000003ec Register(32 bit) main_fsm_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a3ec at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffe000c
Undefined 0xfffe000c

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0
Name - rxeq_eyemeas_force_err rxeq_force_fom_en rxeq_force_fom - rxeq_eyemeas_done rxeq_adaptation_done
Access - RW RW RW - RW RW

[16:16]
RW

rxeq_eyemeas_force_err
rxeq_eyemeas_force_err[16:16]
Force eyemeas err bit

Reset: hex:0x0;

[15:15]
RW

rxeq_force_fom_en
rxeq_force_fom_en[15:15]
Enable FW force fom value for debug purpose

Reset: hex:0x0;

[14:04]
RW

rxeq_force_fom
rxeq_force_fom[14:4]
FW force fom value for debug purpose

Reset: hex:0x000;

[01:01]
RW

rxeq_eyemeas_done
rxeq_eyemeas_done[1:1]
FW set it to 1 after finish rxeq_eyemeas

Reset: hex:0x0;

[00:00]
RW

rxeq_adaptation_done
rxeq_adaptation_done[0:0]
FW set it to 1 after finish rxeq_adaptation

Reset: hex:0x0;

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+0x000003f0 Register(32 bit) main_fsm_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a3f0 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffffe
Undefined 0xfffffffe

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0
Name - main_fsm_start
Access - RW

[00:00]
RW

main_fsm_start
main_fsm_start[0:0]
Start handshake with main adaptation FSM

Reset: hex:0x0;

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+0x000003f4 Register(32 bit) main_fsm_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a3f4 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffff0
Undefined 0xfffffff0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0
Name - rxeq_eyemeas_start rxeq_eq_training_start rxeq_adaptation_start main_fsm_done
Access - RO/V RO/V RO/V RO/V

[03:03]
RO/V

rxeq_eyemeas_start
rxeq_eyemeas_start[3:3]
SOC ask eyemeas start

Reset: hex:0x0;

[02:02]
RO/V

rxeq_eq_training_start
rxeq_eq_training_start[2:2]
Controller ask eq_training start

Reset: hex:0x0;

[01:01]
RO/V

rxeq_adaptation_start
rxeq_adaptation_start[1:1]
Controller ask adaptation start

Reset: hex:0x0;

[00:00]
RO/V

main_fsm_done
main_fsm_done[0:0]
main FSM status complete

Reset: hex:0x0;

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+0x000003f8 Register(32 bit) main_fsm_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a3f8 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x04010020
Unaffected 0xf8000000
Undefined 0xf8000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
Name - main_fsm_preload_en main_fsm_contin_run main_fsm_single_run main_fsm_iter_max main_fsm_timer_max
Access - RW RW RW RW RW

[26:26]
RW

main_fsm_preload_en
main_fsm_preload_en[26:26]
Enable pre-load LMS accumulators in common mode

Reset: hex:0x1;

[25:25]
RW

main_fsm_contin_run
main_fsm_contin_run[25:25]
continuous run request

Reset: hex:0x0;

[24:24]
RW

main_fsm_single_run
main_fsm_single_run[24:24]
single run request

Reset: hex:0x0;

[23:08]
RW

main_fsm_iter_max
main_fsm_iter_max[23:8]
Main FSM iterations counter threshold

Reset: hex:0x0100;

[07:00]
RW

main_fsm_timer_max
main_fsm_timer_max[7:0]
Main FSM delay timer threshold

Reset: hex:0x20;

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+0x000003fc Register(32 bit) main_fsm_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a3fc at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00000001
Undefined 0x00000001

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
Name main_fsm_init_edgvref_off main_fsm_init_ffe_off main_fsm_init_vref_off -
Access RW RW RW -

[31:29]
RW

main_fsm_init_edgvref_off
main_fsm_init_edgvref_off[31:29]
select which edg VREF accumulators will be excluded

Reset: hex:0x0;

[28:05]
RW

main_fsm_init_ffe_off
main_fsm_init_ffe_off[28:5]
select which FFE accumulators will be excluded

Reset: hex:0x000000;

[04:01]
RW

main_fsm_init_vref_off
main_fsm_init_vref_off[4:1]
select which VRef accumulators will be excluded

Reset: hex:0x0;

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+0x00000400 Register(32 bit) main_fsm_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a400 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00800000
Unaffected 0xff008001
Undefined 0xff008001

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 1 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
Name - main_fsm_init_update_en main_fsm_init_cdr_ffe_off - main_fsm_cdr_ffe_ofc_en main_fsm_cdr_ffe_vref_en main_fsm_cdr_ffe_en main_fsm_dfe_en main_fsm_edgvref_en main_fsm_adcofc_en main_fsm_adcvref_en main_fsm_affe_en main_fsm_ofc_en main_fsm_ops_en main_fsm_ffe_en main_fsm_vref_en main_fsm_vga_en main_fsm_init_en -
Access - RW RW - RW RW RW RW RW RW RW RW RW RW RW RW RW RW -

[23:23]
RW

main_fsm_init_update_en
main_fsm_init_update_en[23:23]
Enable intial load with CRW register write

Reset: hex:0x1;

[22:16]
RW

main_fsm_init_cdr_ffe_off
main_fsm_init_cdr_ffe_off[22:16]
select which CDR FFE LMS accumulators will be excluded

Reset: hex:0x00;

[14:14]
RW

main_fsm_cdr_ffe_ofc_en
main_fsm_cdr_ffe_ofc_en[14:14]
Enable CDR FFE OFC adaptation

Reset: hex:0x0;

[13:13]
RW

main_fsm_cdr_ffe_vref_en
main_fsm_cdr_ffe_vref_en[13:13]
Enable CDR FFE VREF adaptation

Reset: hex:0x0;

[12:12]
RW

main_fsm_cdr_ffe_en
main_fsm_cdr_ffe_en[12:12]
Enable CDR FFE pre1 or post1 tap adaptation

Reset: hex:0x0;

[11:11]
RW

main_fsm_dfe_en
main_fsm_dfe_en[11:11]
Enable DFE taps adaptation

Reset: hex:0x0;

[10:10]
RW

main_fsm_edgvref_en
main_fsm_edgvref_en[10:10]
Enable edgVref taps adaptation

Reset: hex:0x0;

[09:09]
RW

main_fsm_adcofc_en
main_fsm_adcofc_en[9:9]
Enable ADCOFC taps adaptation

Reset: hex:0x0;

[08:08]
RW

main_fsm_adcvref_en
main_fsm_adcvref_en[8:8]
Enable ADCVREF taps adaptation

Reset: hex:0x0;

[07:07]
RW

main_fsm_affe_en
main_fsm_affe_en[7:7]
Enable AFFE taps adaptation

Reset: hex:0x0;

[06:06]
RW

main_fsm_ofc_en
main_fsm_ofc_en[6:6]
Enable OFC taps adaptation

Reset: hex:0x0;

[05:05]
RW

main_fsm_ops_en
main_fsm_ops_en[5:5]
Enable OPS taps adaptation

Reset: hex:0x0;

[04:04]
RW

main_fsm_ffe_en
main_fsm_ffe_en[4:4]
Enable FFE taps adaptation

Reset: hex:0x0;

[03:03]
RW

main_fsm_vref_en
main_fsm_vref_en[3:3]
Enable VRef adaptation

Reset: hex:0x0;

[02:02]
RW

main_fsm_vga_en
main_fsm_vga_en[2:2]
Enable VGA adaptation (unused)

Reset: hex:0x0;

[01:01]
RW

main_fsm_init_en
main_fsm_init_en[1:1]
generate init_load command

Reset: hex:0x0;

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+0x00000404 Register(32 bit) taps_set_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a404 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffff8780
Undefined 0xffff8780

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - 0 0 0 0 - - - - 0 0 0 0 0 0 0
Name - taps_set_update_dis taps_set_init_dis taps_set_fw_mode taps_set_mode - taps_set_sel cmod_smpl_sel cmod
Access - RW RW RW RW - RW RW RW

[14:14]
RW

taps_set_update_dis
taps_set_update_dis[14:14]
Prevent changing of ffe_taps_set_sel during FFE taps adaptation

Reset: hex:0x0;

[13:13]
RW

taps_set_init_dis
taps_set_init_dis[13:13]
Prevent loading of ffe_taps_set_sel from registers at the load_init command

Reset: hex:0x0;

[12:12]
RW

taps_set_fw_mode
taps_set_fw_mode[12:12]
Enables a hard FW override such that the taps set select is purely driven by FW without any hardware help. Effective tap value driven by taps_set_sel.

Reset: hex:0x0;

[11:11]
RW

taps_set_mode
taps_set_mode[11:11]
0-HW automatic Round Robin update 16 sets of taps\n 1-SW control ffe_taps_set_sel to select specified set of taps to update. Requires init pulses with fw_start for new value to propagate.

Reset: hex:0x0;

[06:03]
RW

taps_set_sel
taps_set_sel[6:3]
Select which set of samples used for FFE taps LMS

Reset: hex:0x0;

[02:01]
RW

cmod_smpl_sel
cmod_smpl_sel[2:1]
select which 16 samples out of 64 used in common mode of FFE adaptation

Reset: hex:0x0;

[00:00]
RW

cmod
cmod[0:0]
rx ffe common mode, all sets of ffe taps get update together

Reset: hex:0x0;

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+0x00000408 Register(32 bit) rx_gearbox_ctrl
Rx Gearbox Control
Rx Gearbox Control

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a408 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x73400000
Unaffected 0x0000fffc
Undefined 0x0000fffc

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 1 1 1 0 0 1 1 0 1 0 0 0 0 0 0 - - - - - - - - - - - - - - 0 0
Name rd_ptr_max rd_ptr_en_delay wr_ptr_max wr_ptr_en_delay - rx_gbovr_val rx_gbovr_en
Access RW RW RW RW - RW RW

[31:28]
RW

rd_ptr_max
rd_ptr_max[31:28]
The maximum value of RX gearbox read pointer:\n- Set to 7 for the optimized buffer depth (default).\n- Set to 15 for the maximum buffer depth.

Reset: hex:0x7;

[27:24]
RW

rd_ptr_en_delay
rd_ptr_en_delay[27:24]
The initial value of RX gearbox read pointer

Reset: hex:0x3;

[23:20]
RW

wr_ptr_max
wr_ptr_max[23:20]
The maximum value of RX gearbox write pointer:\n- Set to 4 for the optimized buffer depth (default).\n- Set to 9 for the maximum buffer depth.

Reset: hex:0x4;

[19:16]
RW

wr_ptr_en_delay
wr_ptr_en_delay[19:16]
The initial value of RX gearbox write pointer

Reset: hex:0x0;

[01:01]
RW

rx_gbovr_val
rx_gbovr_val[1:1]
Value for override after getting enabled

Reset: hex:0x0;

[00:00]
RW

rx_gbovr_en
rx_gbovr_en[0:0]
Enable override to set a value for RX gearbox enable.

Reset: hex:0x0;

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+0x0000040c Register(32 bit) main_fsm_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a40c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x00004000
Undefined 0x00004000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name main_fsm_init_cdr_ffe_vref_off main_fsm_init_cdr_ffe_ofc_off main_fsm_init_adcofc_off main_fsm_init_dfe_off - main_fsm_init_ofc_off main_fsm_init_adcvref_off main_fsm_init_affe_off
Access RW RW RW RW - RW RW RW

[31:28]
RW

main_fsm_init_cdr_ffe_vref_off
main_fsm_init_cdr_ffe_vref_off[31:28]
select which CDR FFE VREF accumulators will be excluded from initial value load

Reset: hex:0x0;

[27:22]
RW

main_fsm_init_cdr_ffe_ofc_off
main_fsm_init_cdr_ffe_ofc_off[27:22]
select which CDR FFE OFC accumulators will be excluded from initial value load

Reset: hex:0x00;

[21:16]
RW

main_fsm_init_adcofc_off
main_fsm_init_adcofc_off[21:16]
select which ADCOFC accumulators will be excluded from initial value load

Reset: hex:0x00;

[15:15]
RW

main_fsm_init_dfe_off
main_fsm_init_dfe_off[15:15]
select which DFE accumulators will be excluded from initial value load

Reset: hex:0x0;

[13:08]
RW

main_fsm_init_ofc_off
main_fsm_init_ofc_off[13:8]
select which OFC accumulators will be excluded from initial value load

Reset: hex:0x00;

[07:04]
RW

main_fsm_init_adcvref_off
main_fsm_init_adcvref_off[7:4]
select which ADCVREF accumulators will be excluded from initial value load

Reset: hex:0x0;

[03:00]
RW

main_fsm_init_affe_off
main_fsm_init_affe_off[3:0]
select which AFFE accumulators will be excluded from initial value load

Reset: hex:0x0;

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+0x00000410 Register(32 bit) main_fsm_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a410 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffff00
Undefined 0xffffff00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0
Name - main_fsm_init_ops_off
Access - RW

[07:00]
RW

main_fsm_init_ops_off
main_fsm_init_ops_off[7:0]
select which OPS accumulators will be excluded from initial value load

Reset: hex:0x00;

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+0x00000414 Register(32 bit) vref_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a414 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000040
Unaffected 0xfffff800
Undefined 0xfffff800

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 1 0 0 0 0 0 0
Name - vref_int_iter_max vref_int_iter_bypass vref_hold_en vref_pos_updn_inv_cb vref_neg_updn_inv_cb
Access - RW RW RW RW RW

[10:07]
RW

vref_int_iter_max
vref_int_iter_max[10:7]
VRef internal iterator max count. Actual number of iteration is N+1

Reset: hex:0x0;

[06:06]
RW

vref_int_iter_bypass
vref_int_iter_bypass[6:6]
VRef internal iterator bypass

Reset: hex:0x1;

[05:02]
RW

vref_hold_en
vref_hold_en[5:2]
VRef hold tap accumulator

Reset: hex:0x0;

[01:01]
RW

vref_pos_updn_inv_cb
vref_pos_updn_inv_cb[1:1]
VRef Pos chicken bit to invert up/down

Reset: hex:0x0;

[00:00]
RW

vref_neg_updn_inv_cb
vref_neg_updn_inv_cb[0:0]
VRef Neg chicken bit to invert up/down

Reset: hex:0x0;

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+0x00000418 Register(32 bit) vref_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a418 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x03600240
Unaffected 0xfc00fc00
Undefined 0xfc00fc00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - 1 1 0 1 1 0 0 0 0 0 - - - - - - 1 0 0 1 0 0 0 0 0 0
Name - vref_init_val_1 - vref_init_val_0
Access - RW - RW

[25:16]
RW

vref_init_val_1
vref_init_val_1[25:16]
VRef initial values for Vrefs

Reset: hex:0x360;

[09:00]
RW

vref_init_val_0
vref_init_val_0[9:0]
VRef initial values for Vrefs

Reset: hex:0x240;

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+0x0000041c Register(32 bit) vref_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a41c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x01c000a0
Unaffected 0xfc00fc00
Undefined 0xfc00fc00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - 0 1 1 1 0 0 0 0 0 0 - - - - - - 0 0 1 0 1 0 0 0 0 0
Name - vref_init_val_3 - vref_init_val_2
Access - RW - RW

[25:16]
RW

vref_init_val_3
vref_init_val_3[25:16]
VRef initial values for Vrefs

Reset: hex:0x1c0;

[09:00]
RW

vref_init_val_2
vref_init_val_2[9:0]
VRef initial values for Vrefs

Reset: hex:0x0a0;

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+0x00000420 Register(32 bit) vref_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a420 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00004008
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0
Name - vref_stats_max vref_timer_max
Access - RW RW

[17:08]
RW

vref_stats_max
vref_stats_max[17:8]
VRef stats counter

Reset: hex:0x040;

[07:00]
RW

vref_timer_max
vref_timer_max[7:0]
VRef delay timer

Reset: hex:0x08;

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+0x00000424 Register(32 bit) vref_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a424 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x020001ff
Unaffected 0xfc00fc00
Undefined 0xfc00fc00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - 1 0 0 0 0 0 0 0 0 0 - - - - - - 0 1 1 1 1 1 1 1 1 1
Name - vref_tap_min - vref_tap_max
Access - RW - RW

[25:16]
RW

vref_tap_min
vref_tap_min[25:16]
VRef update accum saturation

Reset: hex:0x200;

[09:00]
RW

vref_tap_max
vref_tap_max[9:0]
VRef update accum saturation

Reset: hex:0x1ff;

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+0x00000428 Register(32 bit) vref_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a428 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00001021
Unaffected 0xffec0200
Undefined 0xffec0200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - 0 - - 0 0 0 0 0 1 0 0 - 0 0 0 1 0 0 0 0 1
Name - vref_thrs_sel - vref_mu_fine - vref_mu_coarse vref_coarse_mu_en
Access - RW - RW - RW RW

[20:20]
RW

vref_thrs_sel
vref_thrs_sel[20:20]
Selection vref thrs from ofc adaptive lms or from average of vref taps. 0-default, from vref average taps; 1-from ofc average taps

Reset: hex:0x0;

[17:10]
RW

vref_mu_fine
vref_mu_fine[17:10]
VRef update gain value for fine run

Reset: hex:0x04;

[08:01]
RW

vref_mu_coarse
vref_mu_coarse[8:1]
VRef update gain value for coarse run

Reset: hex:0x10;

[00:00]
RW

vref_coarse_mu_en
vref_coarse_mu_en[0:0]
use coarse mu for vref

Reset: hex:0x1;

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+0x00000430 Register(32 bit) vref_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a430 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffff0
Undefined 0xfffffff0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0
Name - vref_avg_updn
Access - RO/V

[03:00]
RO/V

vref_avg_updn
vref_avg_updn[3:0]
Final sign of the VRef statistics can be used by FW single run

Reset: hex:0x0;

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+0x00000434 Register(32 bit) vga_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a434 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffff0000
Undefined 0xffff0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - vga_tap_frac vga_tap
Access - RW/V RW/V

[15:08]
RW/V

vga_tap_frac
vga_tap_frac[15:8]
VGA tap fractional value

Reset: hex:0x00;

[07:00]
RW/V

vga_tap
vga_tap[7:0]
VGA tap value

Reset: hex:0x00;

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+0x00000438 Register(32 bit) vga_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a438 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000800
Unaffected 0xfff00008
Undefined 0xfff00008

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 - 0 0 0
Name - vga_stats_iter_max - vga_single_run vga_contin_run vga_start
Access - RW - RW RW RW

[19:04]
RW

vga_stats_iter_max
vga_stats_iter_max[19:4]
In default VGA is in iteration run mode, set this iteration number to allow HW to run how many stats iterations

Reset: hex:0x0080;

[02:02]
RW

vga_single_run
vga_single_run[2:2]
Set single run mode for VGA adaptation, default is 0

Reset: hex:0x0;

[01:01]
RW

vga_contin_run
vga_contin_run[1:1]
Set continous run mode for VGA adaptation, default is 0

Reset: hex:0x0;

[00:00]
RW

vga_start
vga_start[0:0]
FW set this to 1 to start VGA adaptation

Reset: hex:0x0;

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+0x0000043c Register(32 bit) vga_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a43c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000807f
Unaffected 0xffff0000
Undefined 0xffff0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1
Name - vga_tap_min vga_tap_max
Access - RW RW

[15:08]
RW

vga_tap_min
vga_tap_min[15:8]
Min limit of the VGA tap

Reset: hex:0x80;

[07:00]
RW

vga_tap_max
vga_tap_max[7:0]
Max limit of the VGA tap

Reset: hex:0x7f;

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+0x00000440 Register(32 bit) vga_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a440 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x60004104
Unaffected 0x80000000
Undefined 0x80000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0
Name - vga_fsm_en vga_preld_en vga_init_en vga_init_val vga_mode vga_mu_fine vga_mu_coarse vga_coarse_mu_en vga_hold_en vga_updn_inv_cb
Access - RW RW RW RW RW RW RW RW RW RW

[30:30]
RW

vga_fsm_en
vga_fsm_en[30:30]
Enable VGA FSM

Reset: hex:0x1;

[29:29]
RW

vga_preld_en
vga_preld_en[29:29]
Enable preload VGA taps

Reset: hex:0x1;

[28:28]
RW

vga_init_en
vga_init_en[28:28]
Enable load Initial value for VGA tap

Reset: hex:0x0;

[27:20]
RW

vga_init_val
vga_init_val[27:20]
Initial value for VGA taps

Reset: hex:0x00;

[19:19]
RW

vga_mode
vga_mode[19:19]
Mode of VGA adaptation: 0 outer range persantage, 1: outer range VREF defined

Reset: hex:0x0;

[18:11]
RW

vga_mu_fine
vga_mu_fine[18:11]
Update gain with fine steps

Reset: hex:0x08;

[10:03]
RW

vga_mu_coarse
vga_mu_coarse[10:3]
Update gain with coarse steps

Reset: hex:0x20;

[02:02]
RW

vga_coarse_mu_en
vga_coarse_mu_en[2:2]
Select between coarse and fine update gains

Reset: hex:0x1;

[01:01]
RW

vga_hold_en
vga_hold_en[1:1]
Hold VGA tap accumulator

Reset: hex:0x0;

[00:00]
RW

vga_updn_inv_cb
vga_updn_inv_cb[0:0]
Chicken bit to invert up/down

Reset: hex:0x0;

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+0x00000444 Register(32 bit) vga_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a444 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00004080
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0
Name - vga_timer_max vga_stats_max
Access - RW RW

[17:10]
RW

vga_timer_max
vga_timer_max[17:10]
VGA delay timer threshold

Reset: hex:0x10;

[09:00]
RW

vga_stats_max
vga_stats_max[9:0]
VGA stats counter threshold

Reset: hex:0x080;

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+0x00000448 Register(32 bit) vga_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a448 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x3c013f04
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 1 1 1 1 0 0 - - 0 0 0 0 0 1 - - 1 1 1 1 1 1 - - 0 0 0 1 0 0
Name - vga_limit_low_1 - vga_limit_low_0 - vga_limit_high_1 - vga_limit_high_0
Access - RW - RW - RW - RW

[29:24]
RW

vga_limit_low_1
vga_limit_low_1[29:24]
Tap range limit low 1

Reset: hex:0x3c;

[21:16]
RW

vga_limit_low_0
vga_limit_low_0[21:16]
Tap range limit low 0

Reset: hex:0x01;

[13:08]
RW

vga_limit_high_1
vga_limit_high_1[13:8]
Tap range limit high 1

Reset: hex:0x3f;

[05:00]
RW

vga_limit_high_0
vga_limit_high_0[5:0]
Tap range limit high 0

Reset: hex:0x04;

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+0x0000044c Register(32 bit) vga_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a44c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000050
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0
Name - vga_smpl_sel vga_mask vga_threshold
Access - RW RW RW

[29:28]
RW

vga_smpl_sel
vga_smpl_sel[29:28]
select line of samples x16

Reset: hex:0x0;

[27:12]
RW

vga_mask
vga_mask[27:12]
Exclude desired masks from VGA stats calculation

Reset: hex:0x0000;

[11:00]
RW

vga_threshold
vga_threshold[11:0]
VGA bin accumulator threshold

Reset: hex:0x050;

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+0x00000450 Register(32 bit) vga_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a450 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffdfe
Undefined 0xfffffdfe

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - 0 - - - - - - - - 0
Name - vga_avg_updn - vga_done
Access - RO/V - RO/V

[09:09]
RO/V

vga_avg_updn
vga_avg_updn[9:9]
Up-Down decision

Reset: hex:0x0;

[00:00]
RO/V

vga_done
vga_done[0:0]
VGA done status, also serve as IRQ event

Reset: hex:0x0;

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+0x00000454 Register(32 bit) jpp_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a454 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000100
Unaffected 0xfffe8080
Undefined 0xfffe8080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 0 - 0 0 0 0 0 0 1 - 0 0 0 0 0 0 0
Name - jpp_affe_en - jpp_affe_gain - jpp_affe_offset
Access - RW - RW - RW

[16:16]
RW

jpp_affe_en
jpp_affe_en[16:16]
Enable aFFE JPP function

Reset: hex:0x0;

[14:08]
RW

jpp_affe_gain
jpp_affe_gain[14:8]
JPP aFFE gain

Reset: hex:0x01;

[06:00]
RW

jpp_affe_offset
jpp_affe_offset[6:0]
JPP aFFE offset

Reset: hex:0x00;

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+0x00000458 Register(32 bit) jpp_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a458 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000100
Unaffected 0xfffe0000
Undefined 0xfffe0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Name - jpp_cdr_ffe_en jpp_cdr_ffe_gain jpp_cdr_ffe_offset
Access - RW RW RW

[16:16]
RW

jpp_cdr_ffe_en
jpp_cdr_ffe_en[16:16]
Enable CDR_FFE JPP function

Reset: hex:0x0;

[15:08]
RW

jpp_cdr_ffe_gain
jpp_cdr_ffe_gain[15:8]
JPP CDR_FFE gain

Reset: hex:0x01;

[07:00]
RW

jpp_cdr_ffe_offset
jpp_cdr_ffe_offset[7:0]
JPP CDR_FFE offset

Reset: hex:0x00;

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+0x00000460 Register(32 bit) ffe_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a460 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010020
Unaffected 0xfff80000
Undefined 0xfff80000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
Name - ffe_stats_max ffe_timer_max ffe_updn_inv_cb
Access - RW RW RW

[18:09]
RW

ffe_stats_max
ffe_stats_max[18:9]
FFE stats counter threshold

Reset: hex:0x080;

[08:01]
RW

ffe_timer_max
ffe_timer_max[8:1]
FFE delay timer threshold

Reset: hex:0x10;

[00:00]
RW

ffe_updn_inv_cb
ffe_updn_inv_cb[0:0]
Chicken bit to invert up/down

Reset: hex:0x0;

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+0x00000464 Register(32 bit) ffe_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a464 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_float_hold_en ffe_static_hold_en
Access - RW RW

[23:15]
RW

ffe_float_hold_en
ffe_float_hold_en[23:15]
Hold floating taps accumulators

Reset: hex:0x000;

[14:00]
RW

ffe_static_hold_en
ffe_static_hold_en[14:0]
Hold static taps accumulators

Reset: hex:0x0000;

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+0x00000468 Register(32 bit) ffe_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a468 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010410
Unaffected 0xfffe0000
Undefined 0xfffe0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
Name - ffe_coarse_mu_en ffe_mu_fine ffe_mu_coarse
Access - RW RW RW

[16:16]
RW

ffe_coarse_mu_en
ffe_coarse_mu_en[16:16]
Select between coarse and fine update gains

Reset: hex:0x1;

[15:08]
RW

ffe_mu_fine
ffe_mu_fine[15:8]
Update gain fine value

Reset: hex:0x04;

[07:00]
RW

ffe_mu_coarse
ffe_mu_coarse[7:0]
Update gain coarse value

Reset: hex:0x10;

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+0x0000046c Register(32 bit) ffe_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a46c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0c03f81f
Unaffected 0xf0000000
Undefined 0xf0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1
Name - ffe_static_tap_min_w1 ffe_static_tap_max_w1 ffe_static_tap_min_w0 ffe_static_tap_max_w0
Access - RW RW RW RW

[27:20]
RW

ffe_static_tap_min_w1
ffe_static_tap_min_w1[27:20]
update accum saturation at min static width

Reset: hex:0xc0;

[19:12]
RW

ffe_static_tap_max_w1
ffe_static_tap_max_w1[19:12]
update accum saturation at max static width

Reset: hex:0x3f;

[11:06]
RW

ffe_static_tap_min_w0
ffe_static_tap_min_w0[11:6]
update accum saturation at min static width

Reset: hex:0x20;

[05:00]
RW

ffe_static_tap_max_w0
ffe_static_tap_max_w0[5:0]
update accum saturation at max static width

Reset: hex:0x1f;

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+0x00000470 Register(32 bit) ffe_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a470 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00008787
Unaffected 0xffff0000
Undefined 0xffff0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1
Name - ffe_floating_tap_min ffe_floating_tap_max ffe_static_tap_min_w2 ffe_static_tap_max_w2
Access - RW RW RW RW

[15:12]
RW

ffe_floating_tap_min
ffe_floating_tap_min[15:12]
update accum saturation at min floating

Reset: hex:0x8;

[11:08]
RW

ffe_floating_tap_max
ffe_floating_tap_max[11:8]
update accum saturation at max floating

Reset: hex:0x7;

[07:04]
RW

ffe_static_tap_min_w2
ffe_static_tap_min_w2[7:4]
update accum saturation at min static width

Reset: hex:0x8;

[03:00]
RW

ffe_static_tap_max_w2
ffe_static_tap_max_w2[3:0]
update accum saturation at max static width

Reset: hex:0x7;

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+0x00000474 Register(32 bit) ffe_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a474 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffc00000
Undefined 0xffc00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_init_val_floating ffe_init_val_static_w2 ffe_init_val_static_w1 ffe_init_val_static_w0
Access - RW RW RW RW

[21:18]
RW

ffe_init_val_floating
ffe_init_val_floating[21:18]
Initial value for the FFE Floating Coefficients

Reset: hex:0x0;

[17:14]
RW

ffe_init_val_static_w2
ffe_init_val_static_w2[17:14]
Initial value for the FFE Static Coefficients w2

Reset: hex:0x0;

[13:06]
RW

ffe_init_val_static_w1
ffe_init_val_static_w1[13:6]
Initial value for the FFE Static Coefficients w1

Reset: hex:0x00;

[05:00]
RW

ffe_init_val_static_w0
ffe_init_val_static_w0[5:0]
Initial value for the FFE Static Coefficients w0

Reset: hex:0x00;

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+0x0000047c Register(32 bit) ffe_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a47c at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ffe_avg_updn
Access - RO/V

[23:00]
RO/V

ffe_avg_updn
ffe_avg_updn[23:0]
Up-Down decisions per tap

Reset: hex:0x000000;

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+0x00000490 Register(32 bit) hist_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a490 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000fff
Unaffected 0x00018000
Undefined 0x00018000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - - 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
Name hist_slc_smpl_sel hist_adc_smpl_sel hist_timer_max hist_stream_sel hist_eng_start hist_min_en hist_min_clr hist_max_en hist_max_clr hist_filter_en - hist_ffesmpl_sel hist_calc_en hist_bin_max
Access RW RW RW RW RW RW RW RW RW RW - RW RW RW

[31:30]
RW

hist_slc_smpl_sel
hist_slc_smpl_sel[31:30]
Select Slicer samples for SNR calculation

Reset: hex:0x0;

[29:28]
RW

hist_adc_smpl_sel
hist_adc_smpl_sel[29:28]
Select ADC samples for histogram engine

Reset: hex:0x0;

[27:24]
RW

hist_timer_max
hist_timer_max[27:24]
Delay timer threshold for FSM

Reset: hex:0x0;

[23:23]
RW

hist_stream_sel
hist_stream_sel[23:23]
Select data to histogram collection

Reset: hex:0x0;

[22:22]
RW

hist_eng_start
hist_eng_start[22:22]
Start histogram engine request

Reset: hex:0x0;

[21:21]
RW

hist_min_en
hist_min_en[21:21]
Clear max values calculations

Reset: hex:0x0;

[20:20]
RW

hist_min_clr
hist_min_clr[20:20]
Enable max values calculations

Reset: hex:0x0;

[19:19]
RW

hist_max_en
hist_max_en[19:19]
Clear min values calculations

Reset: hex:0x0;

[18:18]
RW

hist_max_clr
hist_max_clr[18:18]
Enable min values calculations

Reset: hex:0x0;

[17:17]
RW

hist_filter_en
hist_filter_en[17:17]
Filter enabled (must be disabled for NRZ)

Reset: hex:0x0;

[14:13]
RW

hist_ffesmpl_sel
hist_ffesmpl_sel[14:13]
Select FFE hextet for the histogram

Reset: hex:0x0;

[12:12]
RW

hist_calc_en
hist_calc_en[12:12]
Enable calculations of Min, Max, FOM, SNR

Reset: hex:0x0;

[11:00]
RW

hist_bin_max
hist_bin_max[11:0]
Bin saturation limit

Reset: hex:0xfff;

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+0x00000494 Register(32 bit) hist_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a494 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name hist_ffe_smpl_sel hist_stats_max hist_ffe_limit_low hist_ffe_limit_high
Access RW RW RW RW

[31:28]
RW

hist_ffe_smpl_sel
hist_ffe_smpl_sel[31:28]
Select 9bits ffe output samples for histogram engine

Reset: hex:0x0;

[27:18]
RW

hist_stats_max
hist_stats_max[27:18]
Stats counter threshold for FSM

Reset: hex:0x000;

[17:09]
RW

hist_ffe_limit_low
hist_ffe_limit_low[17:9]
Bin range limits low for FFE histogram

Reset: hex:0x000;

[08:00]
RW

hist_ffe_limit_high
hist_ffe_limit_high[8:0]
Bin range limits high for FFE histogram

Reset: hex:0x000;

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+0x00000498 Register(32 bit) hist_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a498 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x02010100
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 1 0 - - 0 0 0 0 0 1 - - 0 0 0 0 0 1 - - 0 0 0 0 0 0
Name - hist_limit_high_1 - hist_limit_low_1 - hist_limit_high_0 - hist_limit_low_0
Access - RW - RW - RW - RW

[29:24]
RW

hist_limit_high_1
hist_limit_high_1[29:24]
Bin range limits high for 16 bins histogram - range 1

Reset: hex:0x02;

[21:16]
RW

hist_limit_low_1
hist_limit_low_1[21:16]
Bin range limits low for 16 bins histogram - range 1

Reset: hex:0x01;

[13:08]
RW

hist_limit_high_0
hist_limit_high_0[13:8]
Bin range limits high for 16 bins histogram - range 0

Reset: hex:0x01;

[05:00]
RW

hist_limit_low_0
hist_limit_low_0[5:0]
Bin range limits low for 16 bins histogram - range 0

Reset: hex:0x00;

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+0x0000049c Register(32 bit) hist_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a49c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x04030302
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 1 0 0 - - 0 0 0 0 1 1 - - 0 0 0 0 1 1 - - 0 0 0 0 1 0
Name - hist_limit_high_3 - hist_limit_low_3 - hist_limit_high_2 - hist_limit_low_2
Access - RW - RW - RW - RW

[29:24]
RW

hist_limit_high_3
hist_limit_high_3[29:24]
Bin range limits high for 16 bins histogram - range 3

Reset: hex:0x04;

[21:16]
RW

hist_limit_low_3
hist_limit_low_3[21:16]
Bin range limits low for 16 bins histogram - range 3

Reset: hex:0x03;

[13:08]
RW

hist_limit_high_2
hist_limit_high_2[13:8]
Bin range limits high for 16 bins histogram - range 2

Reset: hex:0x03;

[05:00]
RW

hist_limit_low_2
hist_limit_low_2[5:0]
Bin range limits low for 16 bins histogram - range 2

Reset: hex:0x02;

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+0x000004a0 Register(32 bit) hist_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4a0 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x06050504
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 1 1 0 - - 0 0 0 1 0 1 - - 0 0 0 1 0 1 - - 0 0 0 1 0 0
Name - hist_limit_high_5 - hist_limit_low_5 - hist_limit_high_4 - hist_limit_low_4
Access - RW - RW - RW - RW

[29:24]
RW

hist_limit_high_5
hist_limit_high_5[29:24]
Bin range limits high for 16 bins histogram - range 5

Reset: hex:0x06;

[21:16]
RW

hist_limit_low_5
hist_limit_low_5[21:16]
Bin range limits low for 16 bins histogram - range 5

Reset: hex:0x05;

[13:08]
RW

hist_limit_high_4
hist_limit_high_4[13:8]
Bin range limits high for 16 bins histogram - range 4

Reset: hex:0x05;

[05:00]
RW

hist_limit_low_4
hist_limit_low_4[5:0]
Bin range limits low for 16 bins histogram - range 4

Reset: hex:0x04;

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+0x000004a4 Register(32 bit) hist_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4a4 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x08070706
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 1 0 0 0 - - 0 0 0 1 1 1 - - 0 0 0 1 1 1 - - 0 0 0 1 1 0
Name - hist_limit_high_7 - hist_limit_low_7 - hist_limit_high_6 - hist_limit_low_6
Access - RW - RW - RW - RW

[29:24]
RW

hist_limit_high_7
hist_limit_high_7[29:24]
Bin range limits high for 16 bins histogram - range 7

Reset: hex:0x08;

[21:16]
RW

hist_limit_low_7
hist_limit_low_7[21:16]
Bin range limits low for 16 bins histogram - range 7

Reset: hex:0x07;

[13:08]
RW

hist_limit_high_6
hist_limit_high_6[13:8]
Bin range limits high for 16 bins histogram - range 6

Reset: hex:0x07;

[05:00]
RW

hist_limit_low_6
hist_limit_low_6[5:0]
Bin range limits low for 16 bins histogram - range 6

Reset: hex:0x06;

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+0x000004a8 Register(32 bit) hist_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4a8 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0a090908
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 1 0 1 0 - - 0 0 1 0 0 1 - - 0 0 1 0 0 1 - - 0 0 1 0 0 0
Name - hist_limit_high_9 - hist_limit_low_9 - hist_limit_high_8 - hist_limit_low_8
Access - RW - RW - RW - RW

[29:24]
RW

hist_limit_high_9
hist_limit_high_9[29:24]
Bin range limits high for 16 bins histogram - range 9

Reset: hex:0x0a;

[21:16]
RW

hist_limit_low_9
hist_limit_low_9[21:16]
Bin range limits low for 16 bins histogram - range 9

Reset: hex:0x09;

[13:08]
RW

hist_limit_high_8
hist_limit_high_8[13:8]
Bin range limits high for 16 bins histogram - range 8

Reset: hex:0x09;

[05:00]
RW

hist_limit_low_8
hist_limit_low_8[5:0]
Bin range limits low for 16 bins histogram - range 8

Reset: hex:0x08;

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+0x000004ac Register(32 bit) hist_control_7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4ac at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0c0b0b0a
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 1 1 0 0 - - 0 0 1 0 1 1 - - 0 0 1 0 1 1 - - 0 0 1 0 1 0
Name - hist_limit_high_11 - hist_limit_low_11 - hist_limit_high_10 - hist_limit_low_10
Access - RW - RW - RW - RW

[29:24]
RW

hist_limit_high_11
hist_limit_high_11[29:24]
Bin range limits high for 16 bins histogram - range 11

Reset: hex:0x0c;

[21:16]
RW

hist_limit_low_11
hist_limit_low_11[21:16]
Bin range limits low for 16 bins histogram - range 11

Reset: hex:0x0b;

[13:08]
RW

hist_limit_high_10
hist_limit_high_10[13:8]
Bin range limits high for 16 bins histogram - range 10

Reset: hex:0x0b;

[05:00]
RW

hist_limit_low_10
hist_limit_low_10[5:0]
Bin range limits low for 16 bins histogram - range 10

Reset: hex:0x0a;

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+0x000004b0 Register(32 bit) hist_control_8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4b0 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0e0d0d0c
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 1 1 1 0 - - 0 0 1 1 0 1 - - 0 0 1 1 0 1 - - 0 0 1 1 0 0
Name - hist_limit_high_13 - hist_limit_low_13 - hist_limit_high_12 - hist_limit_low_12
Access - RW - RW - RW - RW

[29:24]
RW

hist_limit_high_13
hist_limit_high_13[29:24]
Bin range limits high for 16 bins histogram - range 13

Reset: hex:0x0e;

[21:16]
RW

hist_limit_low_13
hist_limit_low_13[21:16]
Bin range limits low for 16 bins histogram - range 13

Reset: hex:0x0d;

[13:08]
RW

hist_limit_high_12
hist_limit_high_12[13:8]
Bin range limits high for 16 bins histogram - range 12

Reset: hex:0x0d;

[05:00]
RW

hist_limit_low_12
hist_limit_low_12[5:0]
Bin range limits low for 16 bins histogram - range 12

Reset: hex:0x0c;

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+0x000004b4 Register(32 bit) hist_control_9
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4b4 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x100f0f0e
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 1 0 0 0 0 - - 0 0 1 1 1 1 - - 0 0 1 1 1 1 - - 0 0 1 1 1 0
Name - hist_limit_high_15 - hist_limit_low_15 - hist_limit_high_14 - hist_limit_low_14
Access - RW - RW - RW - RW

[29:24]
RW

hist_limit_high_15
hist_limit_high_15[29:24]
Bin range limits high for 16 bins histogram - range 15

Reset: hex:0x10;

[21:16]
RW

hist_limit_low_15
hist_limit_low_15[21:16]
Bin range limits low for 16 bins histogram - range 15

Reset: hex:0x0f;

[13:08]
RW

hist_limit_high_14
hist_limit_high_14[13:8]
Bin range limits high for 16 bins histogram - range 14

Reset: hex:0x0f;

[05:00]
RW

hist_limit_low_14
hist_limit_low_14[5:0]
Bin range limits low for 16 bins histogram - range 14

Reset: hex:0x0e;

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+0x000004b8 Register(32 bit) hist_control_10
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4b8 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name hist_min_mask hist_max_mask
Access RW RW

[31:16]
RW

hist_min_mask
hist_min_mask[31:16]
Bin counters masks for maximum calculation

Reset: hex:0x0000;

[15:00]
RW

hist_max_mask
hist_max_mask[15:0]
Bin counters masks for minimum calculation

Reset: hex:0x0000;

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+0x000004bc Register(32 bit) hist_control_11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4bc at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name hist_snr_init_val hist_snr_sf_alpha hist_snr_iter_max hist_snr_init_en hist_snr_start
Access RW RW RW RW RW

[31:21]
RW

hist_snr_init_val
hist_snr_init_val[31:21]
Pre-load SNR value mostly intended for reset through registers file

Reset: hex:0x000;

[20:18]
RW

hist_snr_sf_alpha
hist_snr_sf_alpha[20:18]
Alpha parameter of smoothing filter

Reset: hex:0x0;

[17:02]
RW

hist_snr_iter_max
hist_snr_iter_max[17:2]
Number of iterations of SNR measurements

Reset: hex:0x0000;

[01:01]
RW

hist_snr_init_en
hist_snr_init_en[1:1]
Enable to preload SNR normally used for reset

Reset: hex:0x0;

[00:00]
RW

hist_snr_start
hist_snr_start[0:0]
Start SNR calculation request

Reset: hex:0x0;

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+0x000004c0 Register(32 bit) hist_control_12
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4c0 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_snr_smpl_mask hist_snr_prefilter_dis hist_snr_cont_mode
Access - RW RW RW

[17:02]
RW

hist_snr_smpl_mask
hist_snr_smpl_mask[17:2]
Disregard samples in SNR calculation

Reset: hex:0x0000;

[01:01]
RW

hist_snr_prefilter_dis
hist_snr_prefilter_dis[1:1]
Accept symbols 3(e+) and 0(e-)

Reset: hex:0x0;

[00:00]
RW

hist_snr_cont_mode
hist_snr_cont_mode[0:0]
SNR calculation doesn't stop as long as this bit high

Reset: hex:0x0;

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+0x000004c4 Register(32 bit) hist_control_13
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4c4 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000400

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
Name hist_smpl_mask hist_snr_stats_max
Access RW RW

[31:16]
RW

hist_smpl_mask
hist_smpl_mask[31:16]
Disregard samples at the input

Reset: hex:0x0000;

[15:00]
RW

hist_snr_stats_max
hist_snr_stats_max[15:0]
Number of cycles to collect stats (power of 2 only; 1-hot)

Reset: hex:0x0400;

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+0x000004c8 Register(32 bit) hist_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4c8 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffff8000
Undefined 0xffff8000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_fom hist_eng_done hist_snr_done
Access - RO/V RO/V RO/V

[14:02]
RO/V

hist_bin_fom
hist_bin_fom[14:2]
Current histogram based FOM

Reset: hex:0x0000;

[01:01]
RO/V

hist_eng_done
hist_eng_done[1:1]
Done response from histogram engine

Reset: hex:0x0;

[00:00]
RO/V

hist_snr_done
hist_snr_done[0:0]
Done response from SNR calculator

Reset: hex:0x0;

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+0x000004cc Register(32 bit) hist_status_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4cc at NOC.jesd__axi (Mem)

Access RO/C/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffff800
Undefined 0xfffff800

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0
Name - hist_snr_curr_val
Access - RO/C/V

[10:00]
RO/C/V

hist_snr_curr_val
hist_snr_curr_val[10:0]
Output FoM (N2NMR -> Noise 2 Noise Margin Ratio)

Reset: hex:0x000;

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+0x000004d0 Register(32 bit) hist_status_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4d0 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf0000000
Undefined 0xf0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_histsats hist_ffebin
Access - RO/V RO/V

[27:12]
RO/V

hist_histsats
hist_histsats[27:12]
Histogram bins saturated

Reset: hex:0x0000;

[11:00]
RO/V

hist_ffebin
hist_ffebin[11:0]
Histogram bin collected on full scale FFE sample

Reset: hex:0x000;

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+0x000004d4 Register(32 bit) hist_status_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4d4 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name hist_bin_min_idx_3 hist_bin_max_idx_3 hist_bin_min_idx_2 hist_bin_max_idx_2 hist_bin_min_idx_1 hist_bin_max_idx_1 hist_bin_min_idx_0 hist_bin_max_idx_0
Access RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V

[31:28]
RO/V

hist_bin_min_idx_3
hist_bin_min_idx_3[31:28]
Min index 3

Reset: hex:0x0;

[27:24]
RO/V

hist_bin_max_idx_3
hist_bin_max_idx_3[27:24]
Max index 3

Reset: hex:0x0;

[23:20]
RO/V

hist_bin_min_idx_2
hist_bin_min_idx_2[23:20]
Min index 2

Reset: hex:0x0;

[19:16]
RO/V

hist_bin_max_idx_2
hist_bin_max_idx_2[19:16]
Max index 2

Reset: hex:0x0;

[15:12]
RO/V

hist_bin_min_idx_1
hist_bin_min_idx_1[15:12]
Min index 1

Reset: hex:0x0;

[11:08]
RO/V

hist_bin_max_idx_1
hist_bin_max_idx_1[11:8]
Max index 1

Reset: hex:0x0;

[07:04]
RO/V

hist_bin_min_idx_0
hist_bin_min_idx_0[7:4]
Min index 0

Reset: hex:0x0;

[03:00]
RO/V

hist_bin_max_idx_0
hist_bin_max_idx_0[3:0]
Max index 0

Reset: hex:0x0;

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+0x000004d8 Register(32 bit) hist_status_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4d8 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_max_val_1 - hist_bin_max_val_0
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_max_val_1
hist_bin_max_val_1[27:16]
Max value 1

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_max_val_0
hist_bin_max_val_0[11:0]
Max value 0

Reset: hex:0x000;

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+0x000004e0 Register(32 bit) hist_status_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4e0 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_max_val_3 - hist_bin_max_val_2
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_max_val_3
hist_bin_max_val_3[27:16]
Max value 3

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_max_val_2
hist_bin_max_val_2[11:0]
Max value 2

Reset: hex:0x000;

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+0x000004e4 Register(32 bit) hist_status_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4e4 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_min_val_1 - hist_bin_min_val_0
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_min_val_1
hist_bin_min_val_1[27:16]
Min value 1

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_min_val_0
hist_bin_min_val_0[11:0]
Min value 0

Reset: hex:0x000;

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+0x000004e8 Register(32 bit) hist_status_7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4e8 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_min_val_3 - hist_bin_min_val_2
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_min_val_3
hist_bin_min_val_3[27:16]
Min value 3

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_min_val_2
hist_bin_min_val_2[11:0]
Min value 2

Reset: hex:0x000;

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+0x000004ec Register(32 bit) hist_status_8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4ec at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_cntr_1 - hist_bin_cntr_0
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_cntr_1
hist_bin_cntr_1[27:16]
Histogram bins provided to FW through the registers. Bin 1

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_cntr_0
hist_bin_cntr_0[11:0]
Histogram bins provided to FW through the registers. Bin 0

Reset: hex:0x000;

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+0x000004f0 Register(32 bit) hist_status_9
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4f0 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_cntr_3 - hist_bin_cntr_2
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_cntr_3
hist_bin_cntr_3[27:16]
Histogram bins provided to FW through the registers. Bin 3

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_cntr_2
hist_bin_cntr_2[11:0]
Histogram bins provided to FW through the registers. Bin 2

Reset: hex:0x000;

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+0x000004f4 Register(32 bit) hist_status_10
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4f4 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_cntr_5 - hist_bin_cntr_4
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_cntr_5
hist_bin_cntr_5[27:16]
Histogram bins provided to FW through the registers. Bin 5

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_cntr_4
hist_bin_cntr_4[11:0]
Histogram bins provided to FW through the registers. Bin 4

Reset: hex:0x000;

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+0x000004f8 Register(32 bit) hist_status_11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4f8 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_cntr_7 - hist_bin_cntr_6
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_cntr_7
hist_bin_cntr_7[27:16]
Histogram bins provided to FW through the registers. Bin 7

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_cntr_6
hist_bin_cntr_6[11:0]
Histogram bins provided to FW through the registers. Bin 6

Reset: hex:0x000;

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+0x000004fc Register(32 bit) hist_status_12
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a4fc at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_cntr_9 - hist_bin_cntr_8
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_cntr_9
hist_bin_cntr_9[27:16]
Histogram bins provided to FW through the registers. Bin 9

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_cntr_8
hist_bin_cntr_8[11:0]
Histogram bins provided to FW through the registers. Bin 8

Reset: hex:0x000;

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+0x00000500 Register(32 bit) hist_status_13
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a500 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_cntr_11 - hist_bin_cntr_10
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_cntr_11
hist_bin_cntr_11[27:16]
Histogram bins provided to FW through the registers. Bin 11

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_cntr_10
hist_bin_cntr_10[11:0]
Histogram bins provided to FW through the registers. Bin 10

Reset: hex:0x000;

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+0x00000510 Register(32 bit) hist_status_14
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a510 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_cntr_13 - hist_bin_cntr_12
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_cntr_13
hist_bin_cntr_13[27:16]
Histogram bins provided to FW through the registers. Bin 13

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_cntr_12
hist_bin_cntr_12[11:0]
Histogram bins provided to FW through the registers. Bin 12

Reset: hex:0x000;

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+0x00000514 Register(32 bit) hist_status_15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a514 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf000f000
Undefined 0xf000f000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 0 0 0 0
Name - hist_bin_cntr_15 - hist_bin_cntr_14
Access - RO/V - RO/V

[27:16]
RO/V

hist_bin_cntr_15
hist_bin_cntr_15[27:16]
Histogram bins provided to FW through the registers. Bin 15

Reset: hex:0x000;

[11:00]
RO/V

hist_bin_cntr_14
hist_bin_cntr_14[11:0]
Histogram bins provided to FW through the registers. Bin 14

Reset: hex:0x000;

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+0x00000518 Register(32 bit) ops_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a518 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000411

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 1
Name ops_grp_sel_fw_mode ops_grp_sel ops_bit_sel_load_en ops_bit_sel_load ops_bit_sel_fw_mode ops_bit_sel ops_updn_inv_cb ops_bit_inv_cb ops_hold_en ops_mu_fine ops_mu_coarse ops_coarse_mu_en
Access RW RW RW RW RW RW RW RW RW RW RW RW

[31:31]
RW

ops_grp_sel_fw_mode
ops_grp_sel_fw_mode[31:31]
FW fully control group selection through cfg_ops_grp_sel

Reset: hex:0x0;

[30:28]
RW

ops_grp_sel
ops_grp_sel[30:28]
Select group inside 64 symbols

Reset: hex:0x0;

[27:27]
RW

ops_bit_sel_load_en
ops_bit_sel_load_en[27:27]
Enable OPS bit selection initial load

Reset: hex:0x0;

[26:24]
RW

ops_bit_sel_load
ops_bit_sel_load[26:24]
OPS bit selection initial load value from 0 to 5

Reset: hex:0x0;

[23:23]
RW

ops_bit_sel_fw_mode
ops_bit_sel_fw_mode[23:23]
FW fully control bit selection through cfg_ops_bit_sel

Reset: hex:0x0;

[22:20]
RW

ops_bit_sel
ops_bit_sel[22:20]
Select bit inside a sample for OPS operations

Reset: hex:0x0;

[19:19]
RW

ops_updn_inv_cb
ops_updn_inv_cb[19:19]
Chicken bit to invert up/down

Reset: hex:0x0;

[18:18]
RW

ops_bit_inv_cb
ops_bit_inv_cb[18:18]
Chicken bit to invert bit polarity

Reset: hex:0x0;

[17:17]
RW

ops_hold_en
ops_hold_en[17:17]
Hold LMS accumulators update

Reset: hex:0x0;

[16:09]
RW

ops_mu_fine
ops_mu_fine[16:9]
Value of the fine mu

Reset: hex:0x02;

[08:01]
RW

ops_mu_coarse
ops_mu_coarse[8:1]
Value of the coarse mu

Reset: hex:0x08;

[00:00]
RW

ops_coarse_mu_en
ops_coarse_mu_en[0:0]
Select MU between fine and coarse

Reset: hex:0x1;

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+0x0000051c Register(32 bit) ops_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a51c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00002080
Unaffected 0xf0c00000
Undefined 0xf0c00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 - - 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0
Name - ops_grp_sel_load_en ops_grp_sel_load - ops_init_val ops_timer_max ops_stats_max
Access - RW RW - RW RW RW

[27:27]
RW

ops_grp_sel_load_en
ops_grp_sel_load_en[27:27]
Enable OPS group selection initial load

Reset: hex:0x0;

[26:24]
RW

ops_grp_sel_load
ops_grp_sel_load[26:24]
OPS group selection initial load value from 0 to 7, total 8 groups

Reset: hex:0x0;

[21:14]
RW

ops_init_val
ops_init_val[21:14]
Init OPS tap value per SAR

Reset: hex:0x00;

[13:10]
RW

ops_timer_max
ops_timer_max[13:10]
Delay timer counter threshold

Reset: hex:0x8;

[09:00]
RW

ops_stats_max
ops_stats_max[9:0]
Stats capture counter threhold

Reset: hex:0x080;

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+0x00000520 Register(32 bit) ops_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a520 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000807f
Unaffected 0xffc00000
Undefined 0xffc00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1
Name - dbg_ops_sel ops_tap_min ops_tap_max
Access - RW RW RW

[21:16]
RW

dbg_ops_sel
dbg_ops_sel[21:16]
Select OPS to read through debug RO register

Reset: hex:0x00;

[15:08]
RW

ops_tap_min
ops_tap_min[15:8]
Min limit of the SAR offset taps

Reset: hex:0x80;

[07:00]
RW

ops_tap_max
ops_tap_max[7:0]
Max limit of the SAR offset taps

Reset: hex:0x7f;

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+0x00000524 Register(32 bit) ops_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a524 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffff00
Undefined 0xffffff00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0
Name - ops_lms_mask
Access - RW

[07:00]
RW

ops_lms_mask
ops_lms_mask[7:0]
Mask bits: during functional run excludes bits form correlation 7.0

Reset: hex:0x00;

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+0x0000052c Register(32 bit) ops_status_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a52c at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffff00
Undefined 0xffffff00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0
Name - ops_updn
Access - RO/V

[07:00]
RO/V

ops_updn
ops_updn[7:0]
Intermediate averaging results 7..0

Reset: hex:0x00;

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+0x00000534 Register(32 bit) ops_status_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a534 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffff00
Undefined 0xffffff00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0
Name - dbg_ops_mux
Access - RO/V

[07:00]
RO/V

dbg_ops_mux
dbg_ops_mux[7:0]
selected by dbg_ops_sel reg OPS value for debug

Reset: hex:0x00;

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+0x00000538 Register(32 bit) adcvref_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a538 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000040
Unaffected 0xfffff800
Undefined 0xfffff800

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 1 0 0 0 0 0 0
Name - adcvref_int_iter_max adcvref_int_iter_bypass adcvref_hold_en adcvref_pos_updn_inv_cb adcvref_neg_updn_inv_cb
Access - RW RW RW RW RW

[10:07]
RW

adcvref_int_iter_max
adcvref_int_iter_max[10:7]
ADCVRef internal iterator max count. Actual number of iteration is N+1

Reset: hex:0x0;

[06:06]
RW

adcvref_int_iter_bypass
adcvref_int_iter_bypass[6:6]
ADCVRef internal iterator bypass

Reset: hex:0x1;

[05:02]
RW

adcvref_hold_en
adcvref_hold_en[5:2]
ADCVref hold tap accumulator

Reset: hex:0x0;

[01:01]
RW

adcvref_pos_updn_inv_cb
adcvref_pos_updn_inv_cb[1:1]
ADCVref positive chicken bit to invert up/down

Reset: hex:0x0;

[00:00]
RW

adcvref_neg_updn_inv_cb
adcvref_neg_updn_inv_cb[0:0]
ADCVref negative chicken bit to invert up/down

Reset: hex:0x0;

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+0x0000053c Register(32 bit) adcvref_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a53c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00003624
Unaffected 0xffffc0c0
Undefined 0xffffc0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - 1 1 0 1 1 0 - - 1 0 0 1 0 0
Name - adcvref_init_val_1 - adcvref_init_val_0
Access - RW - RW

[13:08]
RW

adcvref_init_val_1
adcvref_init_val_1[13:8]
ADCVref initial values for ADCVrefs

Reset: hex:0x36;

[05:00]
RW

adcvref_init_val_0
adcvref_init_val_0[5:0]
ADCVref initial values for ADCVrefs

Reset: hex:0x24;

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+0x00000540 Register(32 bit) adcvref_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a540 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00001c0a
Unaffected 0xffffc0c0
Undefined 0xffffc0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - 0 1 1 1 0 0 - - 0 0 1 0 1 0
Name - adcvref_init_val_3 - adcvref_init_val_2
Access - RW - RW

[13:08]
RW

adcvref_init_val_3
adcvref_init_val_3[13:8]
ADCVref initial values for ADCVrefs

Reset: hex:0x1c;

[05:00]
RW

adcvref_init_val_2
adcvref_init_val_2[5:0]
ADCVref initial values for ADCVrefs

Reset: hex:0x0a;

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+0x00000544 Register(32 bit) adcvref_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a544 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00004008
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0
Name - adcvref_stats_max adcvref_timer_max
Access - RW RW

[17:08]
RW

adcvref_stats_max
adcvref_stats_max[17:8]
ADCVref stats counter

Reset: hex:0x040;

[07:00]
RW

adcvref_timer_max
adcvref_timer_max[7:0]
ADCVref delay timer

Reset: hex:0x08;

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+0x00000548 Register(32 bit) adcvref_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a548 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000201f
Unaffected 0xffffc0c0
Undefined 0xffffc0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - 1 0 0 0 0 0 - - 0 1 1 1 1 1
Name - adcvref_tap_min - adcvref_tap_max
Access - RW - RW

[13:08]
RW

adcvref_tap_min
adcvref_tap_min[13:8]
ADCVref update accum saturation

Reset: hex:0x20;

[05:00]
RW

adcvref_tap_max
adcvref_tap_max[5:0]
ADCVref update accum saturation

Reset: hex:0x1f;

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+0x0000054c Register(32 bit) adcvref_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a54c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000811
Unaffected 0xffec0200
Undefined 0xffec0200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - 0 - - 0 0 0 0 0 0 1 0 - 0 0 0 0 1 0 0 0 1
Name - adcvref_thrs_sel - adcvref_mu_fine - adcvref_mu_coarse adcvref_coarse_mu_en
Access - RW - RW - RW RW

[20:20]
RW

adcvref_thrs_sel
adcvref_thrs_sel[20:20]
Selection adcvref thrs from adcofc taps or from adcvref taps average. 0-default, from adcvref average; 1-from adcofc average

Reset: hex:0x0;

[17:10]
RW

adcvref_mu_fine
adcvref_mu_fine[17:10]
ADCVref update gain value for fine run

Reset: hex:0x02;

[08:01]
RW

adcvref_mu_coarse
adcvref_mu_coarse[8:1]
ADCVref update gain value for coarse run

Reset: hex:0x08;

[00:00]
RW

adcvref_coarse_mu_en
adcvref_coarse_mu_en[0:0]
use coarse mu for ADCVref

Reset: hex:0x1;

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+0x00000550 Register(32 bit) adcvref_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a550 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffff0
Undefined 0xfffffff0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0
Name - adcvref_avg_updn
Access - RO/V

[03:00]
RO/V

adcvref_avg_updn
adcvref_avg_updn[3:0]
Final sign of the ADCVref statistics can be used by FW single run

Reset: hex:0x0;

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+0x00000560 Register(32 bit) affe_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a560 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010020
Unaffected 0xfff80000
Undefined 0xfff80000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
Name - affe_stats_max affe_timer_max affe_updn_inv_cb
Access - RW RW RW

[18:09]
RW

affe_stats_max
affe_stats_max[18:9]
affe stats counter threshold

Reset: hex:0x080;

[08:01]
RW

affe_timer_max
affe_timer_max[8:1]
affe delay timer threshold

Reset: hex:0x10;

[00:00]
RW

affe_updn_inv_cb
affe_updn_inv_cb[0:0]
Chicken bit to invert up/down

Reset: hex:0x0;

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+0x00000564 Register(32 bit) affe_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a564 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00016000
Unaffected 0xe0000800
Undefined 0xe0000800

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 - 0 0 0 0 0 0 0 0 0 0 0
Name - affe_tap_dis_value affe_tap_force_dis affe_taps_if_dis affe_taps_if_dis_hold_thr - affe_init_val affe_hold_en
Access - RW RW RW RW - RW RW

[28:22]
RW

affe_tap_dis_value
affe_tap_dis_value[28:22]
affe tap values when set affe taps to disable

Reset: hex:0x00;

[21:18]
RW

affe_tap_force_dis
affe_tap_force_dis[21:18]
Disable affe individual taps to APMA

Reset: hex:0x0;

[17:17]
RW

affe_taps_if_dis
affe_taps_if_dis[17:17]
Disable affe taps interface signals to APMA

Reset: hex:0x0;

[16:12]
RW

affe_taps_if_dis_hold_thr
affe_taps_if_dis_hold_thr[16:12]
Threshold for affe_taps_if_dis hold crossing from dpma to apma

Reset: hex:0x16;

[10:04]
RW

affe_init_val
affe_init_val[10:4]
Initial value for the affe coeff

Reset: hex:0x00;

[03:00]
RW

affe_hold_en
affe_hold_en[3:0]
Hold affe taps accumulators

Reset: hex:0x0;

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+0x00000568 Register(32 bit) affe_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a568 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010410
Unaffected 0xfffe0000
Undefined 0xfffe0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
Name - affe_coarse_mu_en affe_mu_fine affe_mu_coarse
Access - RW RW RW

[16:16]
RW

affe_coarse_mu_en
affe_coarse_mu_en[16:16]
Select between coarse and fine update gains

Reset: hex:0x1;

[15:08]
RW

affe_mu_fine
affe_mu_fine[15:8]
Update affe gain fine value

Reset: hex:0x04;

[07:00]
RW

affe_mu_coarse
affe_mu_coarse[7:0]
Update affe gain coarse value

Reset: hex:0x10;

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+0x0000056c Register(32 bit) affe_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a56c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000403f
Unaffected 0xffff8080
Undefined 0xffff8080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - 1 0 0 0 0 0 0 - 0 1 1 1 1 1 1
Name - affe_tap_min - affe_tap_max
Access - RW - RW

[14:08]
RW

affe_tap_min
affe_tap_min[14:8]
update affe accum saturation at min width

Reset: hex:0x40;

[06:00]
RW

affe_tap_max
affe_tap_max[6:0]
update affe accum saturation at max width

Reset: hex:0x3f;

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+0x00000570 Register(32 bit) affe_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a570 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffff0
Undefined 0xfffffff0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0
Name - affe_avg_updn
Access - RO/V

[03:00]
RO/V

affe_avg_updn
affe_avg_updn[3:0]
Up-Down decisions per tap

Reset: hex:0x0;

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+0x0000057c Register(32 bit) ofc_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a57c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010020
Unaffected 0xf0380000
Undefined 0xf0380000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 - - - 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
Name - ofc_hold_en - ofc_stats_max ofc_timer_max ofc_updn_inv_cb
Access - RW - RW RW RW

[27:22]
RW

ofc_hold_en
ofc_hold_en[27:22]
Hold ofc taps accumulators

Reset: hex:0x00;

[18:09]
RW

ofc_stats_max
ofc_stats_max[18:9]
ofc stats counter threshold

Reset: hex:0x080;

[08:01]
RW

ofc_timer_max
ofc_timer_max[8:1]
ofc delay timer threshold

Reset: hex:0x10;

[00:00]
RW

ofc_updn_inv_cb
ofc_updn_inv_cb[0:0]
Chicken bit to invert up/down

Reset: hex:0x0;

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+0x00000580 Register(32 bit) ofc_control_1a
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a580 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000b42d0
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 1 0 0 0 0 1 0 1 1 0 1 0 0 0 0
Name - ofc_init_val_2 ofc_init_val_1 ofc_init_val_0
Access - RW RW RW

[29:20]
RW

ofc_init_val_2
ofc_init_val_2[29:20]
Initial value for ofc_2 coeff

Reset: hex:0x000;

[19:10]
RW

ofc_init_val_1
ofc_init_val_1[19:10]
Initial value for ofc_1 coeff

Reset: hex:0x2d0;

[09:00]
RW

ofc_init_val_0
ofc_init_val_0[9:0]
Initial value for ofc_0 coeff

Reset: hex:0x2d0;

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+0x00000584 Register(32 bit) ofc_control_1b
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a584 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x1304c000
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 1 0 0 1 1 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ofc_init_val_5 ofc_init_val_4 ofc_init_val_3
Access - RW RW RW

[29:20]
RW

ofc_init_val_5
ofc_init_val_5[29:20]
Initial value for ofc_5 coeff

Reset: hex:0x130;

[19:10]
RW

ofc_init_val_4
ofc_init_val_4[19:10]
Initial value for ofc_4 coeff

Reset: hex:0x130;

[09:00]
RW

ofc_init_val_3
ofc_init_val_3[9:0]
Initial value for ofc_3 coeff

Reset: hex:0x000;

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+0x00000588 Register(32 bit) ofc_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a588 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010410
Unaffected 0xfffe0000
Undefined 0xfffe0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
Name - ofc_coarse_mu_en ofc_mu_fine ofc_mu_coarse
Access - RW RW RW

[16:16]
RW

ofc_coarse_mu_en
ofc_coarse_mu_en[16:16]
Select between coarse and fine update gains

Reset: hex:0x1;

[15:08]
RW

ofc_mu_fine
ofc_mu_fine[15:8]
Update ofc gain fine value

Reset: hex:0x04;

[07:00]
RW

ofc_mu_coarse
ofc_mu_coarse[7:0]
Update ofc vgain coarse value

Reset: hex:0x10;

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+0x0000058c Register(32 bit) ofc_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a58c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000801ff
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1
Name - ofc_tap_min ofc_tap_max
Access - RW RW

[19:10]
RW

ofc_tap_min
ofc_tap_min[19:10]
update ofc accum saturation at min width

Reset: hex:0x200;

[09:00]
RW

ofc_tap_max
ofc_tap_max[9:0]
update ofc accum saturation at max width

Reset: hex:0x1ff;

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+0x00000590 Register(32 bit) ofc_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a590 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000ac150
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0
Name - ofc_tap_zr ofc_tap_lo ofc_tap_hi
Access - RO/V RO/V RO/V

[29:20]
RO/V

ofc_tap_zr
ofc_tap_zr[29:20]
ofc tap_zero

Reset: hex:0x000;

[19:10]
RO/V

ofc_tap_lo
ofc_tap_lo[19:10]
ofc tap_low

Reset: hex:0x2b0;

[09:00]
RO/V

ofc_tap_hi
ofc_tap_hi[9:0]
ofc tap high

Reset: hex:0x150;

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+0x00000594 Register(32 bit) ffe_coeff_set0_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a594 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set0_frac_post1 ffe_coeff_set0_frac_pre1 ffe_coeff_set0_frac_pre2 ffe_coeff_set0_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set0_frac_post1
ffe_coeff_set0_frac_post1[31:24]
set0 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set0_frac_pre1
ffe_coeff_set0_frac_pre1[23:16]
set0 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set0_frac_pre2
ffe_coeff_set0_frac_pre2[15:8]
set0 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set0_frac_pre3
ffe_coeff_set0_frac_pre3[7:0]
set0 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

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+0x00000598 Register(32 bit) ffe_coeff_set0_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a598 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set0_frac_post5 ffe_coeff_set0_frac_post4 ffe_coeff_set0_frac_post3 ffe_coeff_set0_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set0_frac_post5
ffe_coeff_set0_frac_post5[31:24]
set0 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set0_frac_post4
ffe_coeff_set0_frac_post4[23:16]
set0 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set0_frac_post3
ffe_coeff_set0_frac_post3[15:8]
set0 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set0_frac_post2
ffe_coeff_set0_frac_post2[7:0]
set0 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

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+0x0000059c Register(32 bit) ffe_coeff_set0_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a59c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set0_frac_post9 ffe_coeff_set0_frac_post8 ffe_coeff_set0_frac_post7 ffe_coeff_set0_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set0_frac_post9
ffe_coeff_set0_frac_post9[31:24]
set0 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set0_frac_post8
ffe_coeff_set0_frac_post8[23:16]
set0 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set0_frac_post7
ffe_coeff_set0_frac_post7[15:8]
set0 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set0_frac_post6
ffe_coeff_set0_frac_post6[7:0]
set0 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

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+0x000005a0 Register(32 bit) ffe_coeff_set0_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5a0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set0_frac_bankA_float1 ffe_coeff_set0_frac_post12 ffe_coeff_set0_frac_post11 ffe_coeff_set0_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set0_frac_bankA_float1
ffe_coeff_set0_frac_bankA_float1[31:24]
set0 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set0_frac_post12
ffe_coeff_set0_frac_post12[23:16]
set0 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set0_frac_post11
ffe_coeff_set0_frac_post11[15:8]
set0 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set0_frac_post10
ffe_coeff_set0_frac_post10[7:0]
set0 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

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+0x000005a4 Register(32 bit) ffe_coeff_set0_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5a4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set0_frac_bankB_float2 ffe_coeff_set0_frac_bankB_float1 ffe_coeff_set0_frac_bankA_float3 ffe_coeff_set0_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set0_frac_bankB_float2
ffe_coeff_set0_frac_bankB_float2[31:24]
set0 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set0_frac_bankB_float1
ffe_coeff_set0_frac_bankB_float1[23:16]
set0 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set0_frac_bankA_float3
ffe_coeff_set0_frac_bankA_float3[15:8]
set0 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set0_frac_bankA_float2
ffe_coeff_set0_frac_bankA_float2[7:0]
set0 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

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+0x000005a8 Register(32 bit) ffe_coeff_set0_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5a8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set0_frac_bankC_float3 ffe_coeff_set0_frac_bankC_float2 ffe_coeff_set0_frac_bankC_float1 ffe_coeff_set0_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set0_frac_bankC_float3
ffe_coeff_set0_frac_bankC_float3[31:24]
set0 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set0_frac_bankC_float2
ffe_coeff_set0_frac_bankC_float2[23:16]
set0 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set0_frac_bankC_float1
ffe_coeff_set0_frac_bankC_float1[15:8]
set0 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set0_frac_bankB_float3
ffe_coeff_set0_frac_bankB_float3[7:0]
set0 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005ac Register(32 bit) ffe_coeff_set1_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5ac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set1_frac_post1 ffe_coeff_set1_frac_pre1 ffe_coeff_set1_frac_pre2 ffe_coeff_set1_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set1_frac_post1
ffe_coeff_set1_frac_post1[31:24]
set1 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set1_frac_pre1
ffe_coeff_set1_frac_pre1[23:16]
set1 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set1_frac_pre2
ffe_coeff_set1_frac_pre2[15:8]
set1 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set1_frac_pre3
ffe_coeff_set1_frac_pre3[7:0]
set1 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005b0 Register(32 bit) ffe_coeff_set1_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5b0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set1_frac_post5 ffe_coeff_set1_frac_post4 ffe_coeff_set1_frac_post3 ffe_coeff_set1_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set1_frac_post5
ffe_coeff_set1_frac_post5[31:24]
set1 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set1_frac_post4
ffe_coeff_set1_frac_post4[23:16]
set1 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set1_frac_post3
ffe_coeff_set1_frac_post3[15:8]
set1 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set1_frac_post2
ffe_coeff_set1_frac_post2[7:0]
set1 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005b4 Register(32 bit) ffe_coeff_set1_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5b4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set1_frac_post9 ffe_coeff_set1_frac_post8 ffe_coeff_set1_frac_post7 ffe_coeff_set1_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set1_frac_post9
ffe_coeff_set1_frac_post9[31:24]
set1 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set1_frac_post8
ffe_coeff_set1_frac_post8[23:16]
set1 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set1_frac_post7
ffe_coeff_set1_frac_post7[15:8]
set1 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set1_frac_post6
ffe_coeff_set1_frac_post6[7:0]
set1 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005b8 Register(32 bit) ffe_coeff_set1_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5b8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set1_frac_bankA_float1 ffe_coeff_set1_frac_post12 ffe_coeff_set1_frac_post11 ffe_coeff_set1_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set1_frac_bankA_float1
ffe_coeff_set1_frac_bankA_float1[31:24]
set1 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set1_frac_post12
ffe_coeff_set1_frac_post12[23:16]
set1 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set1_frac_post11
ffe_coeff_set1_frac_post11[15:8]
set1 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set1_frac_post10
ffe_coeff_set1_frac_post10[7:0]
set1 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005bc Register(32 bit) ffe_coeff_set1_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5bc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set1_frac_bankB_float2 ffe_coeff_set1_frac_bankB_float1 ffe_coeff_set1_frac_bankA_float3 ffe_coeff_set1_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set1_frac_bankB_float2
ffe_coeff_set1_frac_bankB_float2[31:24]
set1 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set1_frac_bankB_float1
ffe_coeff_set1_frac_bankB_float1[23:16]
set1 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set1_frac_bankA_float3
ffe_coeff_set1_frac_bankA_float3[15:8]
set1 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set1_frac_bankA_float2
ffe_coeff_set1_frac_bankA_float2[7:0]
set1 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005c0 Register(32 bit) ffe_coeff_set1_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5c0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set1_frac_bankC_float3 ffe_coeff_set1_frac_bankC_float2 ffe_coeff_set1_frac_bankC_float1 ffe_coeff_set1_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set1_frac_bankC_float3
ffe_coeff_set1_frac_bankC_float3[31:24]
set1 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set1_frac_bankC_float2
ffe_coeff_set1_frac_bankC_float2[23:16]
set1 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set1_frac_bankC_float1
ffe_coeff_set1_frac_bankC_float1[15:8]
set1 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set1_frac_bankB_float3
ffe_coeff_set1_frac_bankB_float3[7:0]
set1 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005c4 Register(32 bit) ffe_coeff_set2_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5c4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set2_frac_post1 ffe_coeff_set2_frac_pre1 ffe_coeff_set2_frac_pre2 ffe_coeff_set2_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set2_frac_post1
ffe_coeff_set2_frac_post1[31:24]
set2 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set2_frac_pre1
ffe_coeff_set2_frac_pre1[23:16]
set2 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set2_frac_pre2
ffe_coeff_set2_frac_pre2[15:8]
set2 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set2_frac_pre3
ffe_coeff_set2_frac_pre3[7:0]
set2 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005c8 Register(32 bit) ffe_coeff_set2_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5c8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set2_frac_post5 ffe_coeff_set2_frac_post4 ffe_coeff_set2_frac_post3 ffe_coeff_set2_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set2_frac_post5
ffe_coeff_set2_frac_post5[31:24]
set2 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set2_frac_post4
ffe_coeff_set2_frac_post4[23:16]
set2 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set2_frac_post3
ffe_coeff_set2_frac_post3[15:8]
set2 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set2_frac_post2
ffe_coeff_set2_frac_post2[7:0]
set2 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005cc Register(32 bit) ffe_coeff_set2_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5cc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set2_frac_post9 ffe_coeff_set2_frac_post8 ffe_coeff_set2_frac_post7 ffe_coeff_set2_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set2_frac_post9
ffe_coeff_set2_frac_post9[31:24]
set2 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set2_frac_post8
ffe_coeff_set2_frac_post8[23:16]
set2 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set2_frac_post7
ffe_coeff_set2_frac_post7[15:8]
set2 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set2_frac_post6
ffe_coeff_set2_frac_post6[7:0]
set2 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005d0 Register(32 bit) ffe_coeff_set2_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5d0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set2_frac_bankA_float1 ffe_coeff_set2_frac_post12 ffe_coeff_set2_frac_post11 ffe_coeff_set2_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set2_frac_bankA_float1
ffe_coeff_set2_frac_bankA_float1[31:24]
set2 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set2_frac_post12
ffe_coeff_set2_frac_post12[23:16]
set2 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set2_frac_post11
ffe_coeff_set2_frac_post11[15:8]
set2 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set2_frac_post10
ffe_coeff_set2_frac_post10[7:0]
set2 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005d4 Register(32 bit) ffe_coeff_set2_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5d4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set2_frac_bankB_float2 ffe_coeff_set2_frac_bankB_float1 ffe_coeff_set2_frac_bankA_float3 ffe_coeff_set2_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set2_frac_bankB_float2
ffe_coeff_set2_frac_bankB_float2[31:24]
set2 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set2_frac_bankB_float1
ffe_coeff_set2_frac_bankB_float1[23:16]
set2 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set2_frac_bankA_float3
ffe_coeff_set2_frac_bankA_float3[15:8]
set2 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set2_frac_bankA_float2
ffe_coeff_set2_frac_bankA_float2[7:0]
set2 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005d8 Register(32 bit) ffe_coeff_set2_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5d8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set2_frac_bankC_float3 ffe_coeff_set2_frac_bankC_float2 ffe_coeff_set2_frac_bankC_float1 ffe_coeff_set2_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set2_frac_bankC_float3
ffe_coeff_set2_frac_bankC_float3[31:24]
set2 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set2_frac_bankC_float2
ffe_coeff_set2_frac_bankC_float2[23:16]
set2 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set2_frac_bankC_float1
ffe_coeff_set2_frac_bankC_float1[15:8]
set2 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set2_frac_bankB_float3
ffe_coeff_set2_frac_bankB_float3[7:0]
set2 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005dc Register(32 bit) ffe_coeff_set3_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5dc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set3_frac_post1 ffe_coeff_set3_frac_pre1 ffe_coeff_set3_frac_pre2 ffe_coeff_set3_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set3_frac_post1
ffe_coeff_set3_frac_post1[31:24]
set3 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set3_frac_pre1
ffe_coeff_set3_frac_pre1[23:16]
set3 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set3_frac_pre2
ffe_coeff_set3_frac_pre2[15:8]
set3 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set3_frac_pre3
ffe_coeff_set3_frac_pre3[7:0]
set3 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005e0 Register(32 bit) ffe_coeff_set3_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5e0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set3_frac_post5 ffe_coeff_set3_frac_post4 ffe_coeff_set3_frac_post3 ffe_coeff_set3_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set3_frac_post5
ffe_coeff_set3_frac_post5[31:24]
set3 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set3_frac_post4
ffe_coeff_set3_frac_post4[23:16]
set3 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set3_frac_post3
ffe_coeff_set3_frac_post3[15:8]
set3 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set3_frac_post2
ffe_coeff_set3_frac_post2[7:0]
set3 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005e4 Register(32 bit) ffe_coeff_set3_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5e4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set3_frac_post9 ffe_coeff_set3_frac_post8 ffe_coeff_set3_frac_post7 ffe_coeff_set3_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set3_frac_post9
ffe_coeff_set3_frac_post9[31:24]
set3 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set3_frac_post8
ffe_coeff_set3_frac_post8[23:16]
set3 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set3_frac_post7
ffe_coeff_set3_frac_post7[15:8]
set3 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set3_frac_post6
ffe_coeff_set3_frac_post6[7:0]
set3 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005e8 Register(32 bit) ffe_coeff_set3_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5e8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set3_frac_bankA_float1 ffe_coeff_set3_frac_post12 ffe_coeff_set3_frac_post11 ffe_coeff_set3_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set3_frac_bankA_float1
ffe_coeff_set3_frac_bankA_float1[31:24]
set3 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set3_frac_post12
ffe_coeff_set3_frac_post12[23:16]
set3 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set3_frac_post11
ffe_coeff_set3_frac_post11[15:8]
set3 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set3_frac_post10
ffe_coeff_set3_frac_post10[7:0]
set3 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005ec Register(32 bit) ffe_coeff_set3_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5ec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set3_frac_bankB_float2 ffe_coeff_set3_frac_bankB_float1 ffe_coeff_set3_frac_bankA_float3 ffe_coeff_set3_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set3_frac_bankB_float2
ffe_coeff_set3_frac_bankB_float2[31:24]
set3 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set3_frac_bankB_float1
ffe_coeff_set3_frac_bankB_float1[23:16]
set3 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set3_frac_bankA_float3
ffe_coeff_set3_frac_bankA_float3[15:8]
set3 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set3_frac_bankA_float2
ffe_coeff_set3_frac_bankA_float2[7:0]
set3 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005f0 Register(32 bit) ffe_coeff_set3_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5f0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set3_frac_bankC_float3 ffe_coeff_set3_frac_bankC_float2 ffe_coeff_set3_frac_bankC_float1 ffe_coeff_set3_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set3_frac_bankC_float3
ffe_coeff_set3_frac_bankC_float3[31:24]
set3 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set3_frac_bankC_float2
ffe_coeff_set3_frac_bankC_float2[23:16]
set3 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set3_frac_bankC_float1
ffe_coeff_set3_frac_bankC_float1[15:8]
set3 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set3_frac_bankB_float3
ffe_coeff_set3_frac_bankB_float3[7:0]
set3 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005f4 Register(32 bit) ffe_coeff_set4_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5f4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set4_frac_post1 ffe_coeff_set4_frac_pre1 ffe_coeff_set4_frac_pre2 ffe_coeff_set4_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set4_frac_post1
ffe_coeff_set4_frac_post1[31:24]
set4 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set4_frac_pre1
ffe_coeff_set4_frac_pre1[23:16]
set4 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set4_frac_pre2
ffe_coeff_set4_frac_pre2[15:8]
set4 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set4_frac_pre3
ffe_coeff_set4_frac_pre3[7:0]
set4 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005f8 Register(32 bit) ffe_coeff_set4_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5f8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set4_frac_post5 ffe_coeff_set4_frac_post4 ffe_coeff_set4_frac_post3 ffe_coeff_set4_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set4_frac_post5
ffe_coeff_set4_frac_post5[31:24]
set4 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set4_frac_post4
ffe_coeff_set4_frac_post4[23:16]
set4 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set4_frac_post3
ffe_coeff_set4_frac_post3[15:8]
set4 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set4_frac_post2
ffe_coeff_set4_frac_post2[7:0]
set4 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000005fc Register(32 bit) ffe_coeff_set4_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a5fc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set4_frac_post9 ffe_coeff_set4_frac_post8 ffe_coeff_set4_frac_post7 ffe_coeff_set4_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set4_frac_post9
ffe_coeff_set4_frac_post9[31:24]
set4 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set4_frac_post8
ffe_coeff_set4_frac_post8[23:16]
set4 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set4_frac_post7
ffe_coeff_set4_frac_post7[15:8]
set4 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set4_frac_post6
ffe_coeff_set4_frac_post6[7:0]
set4 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000600 Register(32 bit) ffe_coeff_set4_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a600 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set4_frac_bankA_float1 ffe_coeff_set4_frac_post12 ffe_coeff_set4_frac_post11 ffe_coeff_set4_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set4_frac_bankA_float1
ffe_coeff_set4_frac_bankA_float1[31:24]
set4 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set4_frac_post12
ffe_coeff_set4_frac_post12[23:16]
set4 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set4_frac_post11
ffe_coeff_set4_frac_post11[15:8]
set4 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set4_frac_post10
ffe_coeff_set4_frac_post10[7:0]
set4 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000604 Register(32 bit) ffe_coeff_set4_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a604 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set4_frac_bankB_float2 ffe_coeff_set4_frac_bankB_float1 ffe_coeff_set4_frac_bankA_float3 ffe_coeff_set4_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set4_frac_bankB_float2
ffe_coeff_set4_frac_bankB_float2[31:24]
set4 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set4_frac_bankB_float1
ffe_coeff_set4_frac_bankB_float1[23:16]
set4 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set4_frac_bankA_float3
ffe_coeff_set4_frac_bankA_float3[15:8]
set4 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set4_frac_bankA_float2
ffe_coeff_set4_frac_bankA_float2[7:0]
set4 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000608 Register(32 bit) ffe_coeff_set4_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a608 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set4_frac_bankC_float3 ffe_coeff_set4_frac_bankC_float2 ffe_coeff_set4_frac_bankC_float1 ffe_coeff_set4_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set4_frac_bankC_float3
ffe_coeff_set4_frac_bankC_float3[31:24]
set4 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set4_frac_bankC_float2
ffe_coeff_set4_frac_bankC_float2[23:16]
set4 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set4_frac_bankC_float1
ffe_coeff_set4_frac_bankC_float1[15:8]
set4 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set4_frac_bankB_float3
ffe_coeff_set4_frac_bankB_float3[7:0]
set4 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000060c Register(32 bit) ffe_coeff_set5_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a60c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set5_frac_post1 ffe_coeff_set5_frac_pre1 ffe_coeff_set5_frac_pre2 ffe_coeff_set5_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set5_frac_post1
ffe_coeff_set5_frac_post1[31:24]
set5 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set5_frac_pre1
ffe_coeff_set5_frac_pre1[23:16]
set5 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set5_frac_pre2
ffe_coeff_set5_frac_pre2[15:8]
set5 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set5_frac_pre3
ffe_coeff_set5_frac_pre3[7:0]
set5 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000610 Register(32 bit) ffe_coeff_set5_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a610 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set5_frac_post5 ffe_coeff_set5_frac_post4 ffe_coeff_set5_frac_post3 ffe_coeff_set5_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set5_frac_post5
ffe_coeff_set5_frac_post5[31:24]
set5 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set5_frac_post4
ffe_coeff_set5_frac_post4[23:16]
set5 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set5_frac_post3
ffe_coeff_set5_frac_post3[15:8]
set5 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set5_frac_post2
ffe_coeff_set5_frac_post2[7:0]
set5 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000614 Register(32 bit) ffe_coeff_set5_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a614 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set5_frac_post9 ffe_coeff_set5_frac_post8 ffe_coeff_set5_frac_post7 ffe_coeff_set5_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set5_frac_post9
ffe_coeff_set5_frac_post9[31:24]
set5 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set5_frac_post8
ffe_coeff_set5_frac_post8[23:16]
set5 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set5_frac_post7
ffe_coeff_set5_frac_post7[15:8]
set5 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set5_frac_post6
ffe_coeff_set5_frac_post6[7:0]
set5 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000618 Register(32 bit) ffe_coeff_set5_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a618 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set5_frac_bankA_float1 ffe_coeff_set5_frac_post12 ffe_coeff_set5_frac_post11 ffe_coeff_set5_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set5_frac_bankA_float1
ffe_coeff_set5_frac_bankA_float1[31:24]
set5 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set5_frac_post12
ffe_coeff_set5_frac_post12[23:16]
set5 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set5_frac_post11
ffe_coeff_set5_frac_post11[15:8]
set5 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set5_frac_post10
ffe_coeff_set5_frac_post10[7:0]
set5 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000061c Register(32 bit) ffe_coeff_set5_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a61c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set5_frac_bankB_float2 ffe_coeff_set5_frac_bankB_float1 ffe_coeff_set5_frac_bankA_float3 ffe_coeff_set5_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set5_frac_bankB_float2
ffe_coeff_set5_frac_bankB_float2[31:24]
set5 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set5_frac_bankB_float1
ffe_coeff_set5_frac_bankB_float1[23:16]
set5 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set5_frac_bankA_float3
ffe_coeff_set5_frac_bankA_float3[15:8]
set5 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set5_frac_bankA_float2
ffe_coeff_set5_frac_bankA_float2[7:0]
set5 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

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+0x00000620 Register(32 bit) ffe_coeff_set5_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a620 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set5_frac_bankC_float3 ffe_coeff_set5_frac_bankC_float2 ffe_coeff_set5_frac_bankC_float1 ffe_coeff_set5_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set5_frac_bankC_float3
ffe_coeff_set5_frac_bankC_float3[31:24]
set5 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set5_frac_bankC_float2
ffe_coeff_set5_frac_bankC_float2[23:16]
set5 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set5_frac_bankC_float1
ffe_coeff_set5_frac_bankC_float1[15:8]
set5 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set5_frac_bankB_float3
ffe_coeff_set5_frac_bankB_float3[7:0]
set5 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000624 Register(32 bit) ffe_coeff_set6_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a624 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set6_frac_post1 ffe_coeff_set6_frac_pre1 ffe_coeff_set6_frac_pre2 ffe_coeff_set6_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set6_frac_post1
ffe_coeff_set6_frac_post1[31:24]
set6 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set6_frac_pre1
ffe_coeff_set6_frac_pre1[23:16]
set6 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set6_frac_pre2
ffe_coeff_set6_frac_pre2[15:8]
set6 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set6_frac_pre3
ffe_coeff_set6_frac_pre3[7:0]
set6 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000628 Register(32 bit) ffe_coeff_set6_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a628 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set6_frac_post5 ffe_coeff_set6_frac_post4 ffe_coeff_set6_frac_post3 ffe_coeff_set6_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set6_frac_post5
ffe_coeff_set6_frac_post5[31:24]
set6 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set6_frac_post4
ffe_coeff_set6_frac_post4[23:16]
set6 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set6_frac_post3
ffe_coeff_set6_frac_post3[15:8]
set6 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set6_frac_post2
ffe_coeff_set6_frac_post2[7:0]
set6 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000062c Register(32 bit) ffe_coeff_set6_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a62c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set6_frac_post9 ffe_coeff_set6_frac_post8 ffe_coeff_set6_frac_post7 ffe_coeff_set6_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set6_frac_post9
ffe_coeff_set6_frac_post9[31:24]
set6 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set6_frac_post8
ffe_coeff_set6_frac_post8[23:16]
set6 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set6_frac_post7
ffe_coeff_set6_frac_post7[15:8]
set6 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set6_frac_post6
ffe_coeff_set6_frac_post6[7:0]
set6 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000630 Register(32 bit) ffe_coeff_set6_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a630 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set6_frac_bankA_float1 ffe_coeff_set6_frac_post12 ffe_coeff_set6_frac_post11 ffe_coeff_set6_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set6_frac_bankA_float1
ffe_coeff_set6_frac_bankA_float1[31:24]
set6 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set6_frac_post12
ffe_coeff_set6_frac_post12[23:16]
set6 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set6_frac_post11
ffe_coeff_set6_frac_post11[15:8]
set6 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set6_frac_post10
ffe_coeff_set6_frac_post10[7:0]
set6 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000634 Register(32 bit) ffe_coeff_set6_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a634 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set6_frac_bankB_float2 ffe_coeff_set6_frac_bankB_float1 ffe_coeff_set6_frac_bankA_float3 ffe_coeff_set6_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set6_frac_bankB_float2
ffe_coeff_set6_frac_bankB_float2[31:24]
set6 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set6_frac_bankB_float1
ffe_coeff_set6_frac_bankB_float1[23:16]
set6 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set6_frac_bankA_float3
ffe_coeff_set6_frac_bankA_float3[15:8]
set6 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set6_frac_bankA_float2
ffe_coeff_set6_frac_bankA_float2[7:0]
set6 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000638 Register(32 bit) ffe_coeff_set6_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a638 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set6_frac_bankC_float3 ffe_coeff_set6_frac_bankC_float2 ffe_coeff_set6_frac_bankC_float1 ffe_coeff_set6_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set6_frac_bankC_float3
ffe_coeff_set6_frac_bankC_float3[31:24]
set6 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set6_frac_bankC_float2
ffe_coeff_set6_frac_bankC_float2[23:16]
set6 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set6_frac_bankC_float1
ffe_coeff_set6_frac_bankC_float1[15:8]
set6 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set6_frac_bankB_float3
ffe_coeff_set6_frac_bankB_float3[7:0]
set6 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000063c Register(32 bit) ffe_coeff_set7_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a63c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set7_frac_post1 ffe_coeff_set7_frac_pre1 ffe_coeff_set7_frac_pre2 ffe_coeff_set7_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set7_frac_post1
ffe_coeff_set7_frac_post1[31:24]
set7 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set7_frac_pre1
ffe_coeff_set7_frac_pre1[23:16]
set7 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set7_frac_pre2
ffe_coeff_set7_frac_pre2[15:8]
set7 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set7_frac_pre3
ffe_coeff_set7_frac_pre3[7:0]
set7 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000640 Register(32 bit) ffe_coeff_set7_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a640 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set7_frac_post5 ffe_coeff_set7_frac_post4 ffe_coeff_set7_frac_post3 ffe_coeff_set7_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set7_frac_post5
ffe_coeff_set7_frac_post5[31:24]
set7 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set7_frac_post4
ffe_coeff_set7_frac_post4[23:16]
set7 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set7_frac_post3
ffe_coeff_set7_frac_post3[15:8]
set7 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set7_frac_post2
ffe_coeff_set7_frac_post2[7:0]
set7 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000644 Register(32 bit) ffe_coeff_set7_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a644 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set7_frac_post9 ffe_coeff_set7_frac_post8 ffe_coeff_set7_frac_post7 ffe_coeff_set7_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set7_frac_post9
ffe_coeff_set7_frac_post9[31:24]
set7 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set7_frac_post8
ffe_coeff_set7_frac_post8[23:16]
set7 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set7_frac_post7
ffe_coeff_set7_frac_post7[15:8]
set7 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set7_frac_post6
ffe_coeff_set7_frac_post6[7:0]
set7 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000648 Register(32 bit) ffe_coeff_set7_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a648 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set7_frac_bankA_float1 ffe_coeff_set7_frac_post12 ffe_coeff_set7_frac_post11 ffe_coeff_set7_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set7_frac_bankA_float1
ffe_coeff_set7_frac_bankA_float1[31:24]
set7 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set7_frac_post12
ffe_coeff_set7_frac_post12[23:16]
set7 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set7_frac_post11
ffe_coeff_set7_frac_post11[15:8]
set7 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set7_frac_post10
ffe_coeff_set7_frac_post10[7:0]
set7 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000064c Register(32 bit) ffe_coeff_set7_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a64c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set7_frac_bankB_float2 ffe_coeff_set7_frac_bankB_float1 ffe_coeff_set7_frac_bankA_float3 ffe_coeff_set7_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set7_frac_bankB_float2
ffe_coeff_set7_frac_bankB_float2[31:24]
set7 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set7_frac_bankB_float1
ffe_coeff_set7_frac_bankB_float1[23:16]
set7 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set7_frac_bankA_float3
ffe_coeff_set7_frac_bankA_float3[15:8]
set7 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set7_frac_bankA_float2
ffe_coeff_set7_frac_bankA_float2[7:0]
set7 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000650 Register(32 bit) ffe_coeff_set7_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a650 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set7_frac_bankC_float3 ffe_coeff_set7_frac_bankC_float2 ffe_coeff_set7_frac_bankC_float1 ffe_coeff_set7_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set7_frac_bankC_float3
ffe_coeff_set7_frac_bankC_float3[31:24]
set7 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set7_frac_bankC_float2
ffe_coeff_set7_frac_bankC_float2[23:16]
set7 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set7_frac_bankC_float1
ffe_coeff_set7_frac_bankC_float1[15:8]
set7 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set7_frac_bankB_float3
ffe_coeff_set7_frac_bankB_float3[7:0]
set7 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000654 Register(32 bit) ffe_coeff_set8_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a654 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set8_frac_post1 ffe_coeff_set8_frac_pre1 ffe_coeff_set8_frac_pre2 ffe_coeff_set8_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set8_frac_post1
ffe_coeff_set8_frac_post1[31:24]
set8 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set8_frac_pre1
ffe_coeff_set8_frac_pre1[23:16]
set8 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set8_frac_pre2
ffe_coeff_set8_frac_pre2[15:8]
set8 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set8_frac_pre3
ffe_coeff_set8_frac_pre3[7:0]
set8 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000658 Register(32 bit) ffe_coeff_set8_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a658 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set8_frac_post5 ffe_coeff_set8_frac_post4 ffe_coeff_set8_frac_post3 ffe_coeff_set8_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set8_frac_post5
ffe_coeff_set8_frac_post5[31:24]
set8 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set8_frac_post4
ffe_coeff_set8_frac_post4[23:16]
set8 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set8_frac_post3
ffe_coeff_set8_frac_post3[15:8]
set8 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set8_frac_post2
ffe_coeff_set8_frac_post2[7:0]
set8 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000065c Register(32 bit) ffe_coeff_set8_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a65c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set8_frac_post9 ffe_coeff_set8_frac_post8 ffe_coeff_set8_frac_post7 ffe_coeff_set8_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set8_frac_post9
ffe_coeff_set8_frac_post9[31:24]
set8 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set8_frac_post8
ffe_coeff_set8_frac_post8[23:16]
set8 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set8_frac_post7
ffe_coeff_set8_frac_post7[15:8]
set8 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set8_frac_post6
ffe_coeff_set8_frac_post6[7:0]
set8 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000660 Register(32 bit) ffe_coeff_set8_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a660 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set8_frac_bankA_float1 ffe_coeff_set8_frac_post12 ffe_coeff_set8_frac_post11 ffe_coeff_set8_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set8_frac_bankA_float1
ffe_coeff_set8_frac_bankA_float1[31:24]
set8 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set8_frac_post12
ffe_coeff_set8_frac_post12[23:16]
set8 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set8_frac_post11
ffe_coeff_set8_frac_post11[15:8]
set8 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set8_frac_post10
ffe_coeff_set8_frac_post10[7:0]
set8 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000664 Register(32 bit) ffe_coeff_set8_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a664 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set8_frac_bankB_float2 ffe_coeff_set8_frac_bankB_float1 ffe_coeff_set8_frac_bankA_float3 ffe_coeff_set8_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set8_frac_bankB_float2
ffe_coeff_set8_frac_bankB_float2[31:24]
set8 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set8_frac_bankB_float1
ffe_coeff_set8_frac_bankB_float1[23:16]
set8 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set8_frac_bankA_float3
ffe_coeff_set8_frac_bankA_float3[15:8]
set8 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set8_frac_bankA_float2
ffe_coeff_set8_frac_bankA_float2[7:0]
set8 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000668 Register(32 bit) ffe_coeff_set8_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a668 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set8_frac_bankC_float3 ffe_coeff_set8_frac_bankC_float2 ffe_coeff_set8_frac_bankC_float1 ffe_coeff_set8_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set8_frac_bankC_float3
ffe_coeff_set8_frac_bankC_float3[31:24]
set8 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set8_frac_bankC_float2
ffe_coeff_set8_frac_bankC_float2[23:16]
set8 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set8_frac_bankC_float1
ffe_coeff_set8_frac_bankC_float1[15:8]
set8 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set8_frac_bankB_float3
ffe_coeff_set8_frac_bankB_float3[7:0]
set8 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000066c Register(32 bit) ffe_coeff_set9_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a66c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set9_frac_post1 ffe_coeff_set9_frac_pre1 ffe_coeff_set9_frac_pre2 ffe_coeff_set9_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set9_frac_post1
ffe_coeff_set9_frac_post1[31:24]
set9 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set9_frac_pre1
ffe_coeff_set9_frac_pre1[23:16]
set9 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set9_frac_pre2
ffe_coeff_set9_frac_pre2[15:8]
set9 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set9_frac_pre3
ffe_coeff_set9_frac_pre3[7:0]
set9 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000670 Register(32 bit) ffe_coeff_set9_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a670 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set9_frac_post5 ffe_coeff_set9_frac_post4 ffe_coeff_set9_frac_post3 ffe_coeff_set9_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set9_frac_post5
ffe_coeff_set9_frac_post5[31:24]
set9 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set9_frac_post4
ffe_coeff_set9_frac_post4[23:16]
set9 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set9_frac_post3
ffe_coeff_set9_frac_post3[15:8]
set9 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set9_frac_post2
ffe_coeff_set9_frac_post2[7:0]
set9 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000674 Register(32 bit) ffe_coeff_set9_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a674 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set9_frac_post9 ffe_coeff_set9_frac_post8 ffe_coeff_set9_frac_post7 ffe_coeff_set9_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set9_frac_post9
ffe_coeff_set9_frac_post9[31:24]
set9 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set9_frac_post8
ffe_coeff_set9_frac_post8[23:16]
set9 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set9_frac_post7
ffe_coeff_set9_frac_post7[15:8]
set9 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set9_frac_post6
ffe_coeff_set9_frac_post6[7:0]
set9 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000678 Register(32 bit) ffe_coeff_set9_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a678 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set9_frac_bankA_float1 ffe_coeff_set9_frac_post12 ffe_coeff_set9_frac_post11 ffe_coeff_set9_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set9_frac_bankA_float1
ffe_coeff_set9_frac_bankA_float1[31:24]
set9 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set9_frac_post12
ffe_coeff_set9_frac_post12[23:16]
set9 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set9_frac_post11
ffe_coeff_set9_frac_post11[15:8]
set9 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set9_frac_post10
ffe_coeff_set9_frac_post10[7:0]
set9 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000067c Register(32 bit) ffe_coeff_set9_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a67c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set9_frac_bankB_float2 ffe_coeff_set9_frac_bankB_float1 ffe_coeff_set9_frac_bankA_float3 ffe_coeff_set9_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set9_frac_bankB_float2
ffe_coeff_set9_frac_bankB_float2[31:24]
set9 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set9_frac_bankB_float1
ffe_coeff_set9_frac_bankB_float1[23:16]
set9 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set9_frac_bankA_float3
ffe_coeff_set9_frac_bankA_float3[15:8]
set9 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set9_frac_bankA_float2
ffe_coeff_set9_frac_bankA_float2[7:0]
set9 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000680 Register(32 bit) ffe_coeff_set9_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a680 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set9_frac_bankC_float3 ffe_coeff_set9_frac_bankC_float2 ffe_coeff_set9_frac_bankC_float1 ffe_coeff_set9_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set9_frac_bankC_float3
ffe_coeff_set9_frac_bankC_float3[31:24]
set9 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set9_frac_bankC_float2
ffe_coeff_set9_frac_bankC_float2[23:16]
set9 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set9_frac_bankC_float1
ffe_coeff_set9_frac_bankC_float1[15:8]
set9 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set9_frac_bankB_float3
ffe_coeff_set9_frac_bankB_float3[7:0]
set9 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000684 Register(32 bit) ffe_coeff_set10_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a684 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set10_frac_post1 ffe_coeff_set10_frac_pre1 ffe_coeff_set10_frac_pre2 ffe_coeff_set10_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set10_frac_post1
ffe_coeff_set10_frac_post1[31:24]
set10 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set10_frac_pre1
ffe_coeff_set10_frac_pre1[23:16]
set10 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set10_frac_pre2
ffe_coeff_set10_frac_pre2[15:8]
set10 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set10_frac_pre3
ffe_coeff_set10_frac_pre3[7:0]
set10 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000688 Register(32 bit) ffe_coeff_set10_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a688 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set10_frac_post5 ffe_coeff_set10_frac_post4 ffe_coeff_set10_frac_post3 ffe_coeff_set10_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set10_frac_post5
ffe_coeff_set10_frac_post5[31:24]
set10 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set10_frac_post4
ffe_coeff_set10_frac_post4[23:16]
set10 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set10_frac_post3
ffe_coeff_set10_frac_post3[15:8]
set10 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set10_frac_post2
ffe_coeff_set10_frac_post2[7:0]
set10 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000068c Register(32 bit) ffe_coeff_set10_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a68c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set10_frac_post9 ffe_coeff_set10_frac_post8 ffe_coeff_set10_frac_post7 ffe_coeff_set10_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set10_frac_post9
ffe_coeff_set10_frac_post9[31:24]
set10 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set10_frac_post8
ffe_coeff_set10_frac_post8[23:16]
set10 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set10_frac_post7
ffe_coeff_set10_frac_post7[15:8]
set10 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set10_frac_post6
ffe_coeff_set10_frac_post6[7:0]
set10 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000690 Register(32 bit) ffe_coeff_set10_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a690 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set10_frac_bankA_float1 ffe_coeff_set10_frac_post12 ffe_coeff_set10_frac_post11 ffe_coeff_set10_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set10_frac_bankA_float1
ffe_coeff_set10_frac_bankA_float1[31:24]
set10 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set10_frac_post12
ffe_coeff_set10_frac_post12[23:16]
set10 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set10_frac_post11
ffe_coeff_set10_frac_post11[15:8]
set10 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set10_frac_post10
ffe_coeff_set10_frac_post10[7:0]
set10 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000694 Register(32 bit) ffe_coeff_set10_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a694 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set10_frac_bankB_float2 ffe_coeff_set10_frac_bankB_float1 ffe_coeff_set10_frac_bankA_float3 ffe_coeff_set10_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set10_frac_bankB_float2
ffe_coeff_set10_frac_bankB_float2[31:24]
set10 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set10_frac_bankB_float1
ffe_coeff_set10_frac_bankB_float1[23:16]
set10 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set10_frac_bankA_float3
ffe_coeff_set10_frac_bankA_float3[15:8]
set10 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set10_frac_bankA_float2
ffe_coeff_set10_frac_bankA_float2[7:0]
set10 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000698 Register(32 bit) ffe_coeff_set10_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a698 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set10_frac_bankC_float3 ffe_coeff_set10_frac_bankC_float2 ffe_coeff_set10_frac_bankC_float1 ffe_coeff_set10_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set10_frac_bankC_float3
ffe_coeff_set10_frac_bankC_float3[31:24]
set10 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set10_frac_bankC_float2
ffe_coeff_set10_frac_bankC_float2[23:16]
set10 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set10_frac_bankC_float1
ffe_coeff_set10_frac_bankC_float1[15:8]
set10 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set10_frac_bankB_float3
ffe_coeff_set10_frac_bankB_float3[7:0]
set10 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000069c Register(32 bit) ffe_coeff_set11_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a69c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set11_frac_post1 ffe_coeff_set11_frac_pre1 ffe_coeff_set11_frac_pre2 ffe_coeff_set11_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set11_frac_post1
ffe_coeff_set11_frac_post1[31:24]
set11 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set11_frac_pre1
ffe_coeff_set11_frac_pre1[23:16]
set11 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set11_frac_pre2
ffe_coeff_set11_frac_pre2[15:8]
set11 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set11_frac_pre3
ffe_coeff_set11_frac_pre3[7:0]
set11 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006a0 Register(32 bit) ffe_coeff_set11_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6a0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set11_frac_post5 ffe_coeff_set11_frac_post4 ffe_coeff_set11_frac_post3 ffe_coeff_set11_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set11_frac_post5
ffe_coeff_set11_frac_post5[31:24]
set11 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set11_frac_post4
ffe_coeff_set11_frac_post4[23:16]
set11 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set11_frac_post3
ffe_coeff_set11_frac_post3[15:8]
set11 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set11_frac_post2
ffe_coeff_set11_frac_post2[7:0]
set11 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006a4 Register(32 bit) ffe_coeff_set11_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6a4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set11_frac_post9 ffe_coeff_set11_frac_post8 ffe_coeff_set11_frac_post7 ffe_coeff_set11_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set11_frac_post9
ffe_coeff_set11_frac_post9[31:24]
set11 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set11_frac_post8
ffe_coeff_set11_frac_post8[23:16]
set11 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set11_frac_post7
ffe_coeff_set11_frac_post7[15:8]
set11 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set11_frac_post6
ffe_coeff_set11_frac_post6[7:0]
set11 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006a8 Register(32 bit) ffe_coeff_set11_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6a8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set11_frac_bankA_float1 ffe_coeff_set11_frac_post12 ffe_coeff_set11_frac_post11 ffe_coeff_set11_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set11_frac_bankA_float1
ffe_coeff_set11_frac_bankA_float1[31:24]
set11 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set11_frac_post12
ffe_coeff_set11_frac_post12[23:16]
set11 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set11_frac_post11
ffe_coeff_set11_frac_post11[15:8]
set11 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set11_frac_post10
ffe_coeff_set11_frac_post10[7:0]
set11 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006ac Register(32 bit) ffe_coeff_set11_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6ac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set11_frac_bankB_float2 ffe_coeff_set11_frac_bankB_float1 ffe_coeff_set11_frac_bankA_float3 ffe_coeff_set11_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set11_frac_bankB_float2
ffe_coeff_set11_frac_bankB_float2[31:24]
set11 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set11_frac_bankB_float1
ffe_coeff_set11_frac_bankB_float1[23:16]
set11 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set11_frac_bankA_float3
ffe_coeff_set11_frac_bankA_float3[15:8]
set11 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set11_frac_bankA_float2
ffe_coeff_set11_frac_bankA_float2[7:0]
set11 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006b0 Register(32 bit) ffe_coeff_set11_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6b0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set11_frac_bankC_float3 ffe_coeff_set11_frac_bankC_float2 ffe_coeff_set11_frac_bankC_float1 ffe_coeff_set11_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set11_frac_bankC_float3
ffe_coeff_set11_frac_bankC_float3[31:24]
set11 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set11_frac_bankC_float2
ffe_coeff_set11_frac_bankC_float2[23:16]
set11 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set11_frac_bankC_float1
ffe_coeff_set11_frac_bankC_float1[15:8]
set11 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set11_frac_bankB_float3
ffe_coeff_set11_frac_bankB_float3[7:0]
set11 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006b4 Register(32 bit) ffe_coeff_set12_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6b4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set12_frac_post1 ffe_coeff_set12_frac_pre1 ffe_coeff_set12_frac_pre2 ffe_coeff_set12_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set12_frac_post1
ffe_coeff_set12_frac_post1[31:24]
set12 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set12_frac_pre1
ffe_coeff_set12_frac_pre1[23:16]
set12 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set12_frac_pre2
ffe_coeff_set12_frac_pre2[15:8]
set12 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set12_frac_pre3
ffe_coeff_set12_frac_pre3[7:0]
set12 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006b8 Register(32 bit) ffe_coeff_set12_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6b8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set12_frac_post5 ffe_coeff_set12_frac_post4 ffe_coeff_set12_frac_post3 ffe_coeff_set12_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set12_frac_post5
ffe_coeff_set12_frac_post5[31:24]
set12 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set12_frac_post4
ffe_coeff_set12_frac_post4[23:16]
set12 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set12_frac_post3
ffe_coeff_set12_frac_post3[15:8]
set12 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set12_frac_post2
ffe_coeff_set12_frac_post2[7:0]
set12 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006bc Register(32 bit) ffe_coeff_set12_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6bc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set12_frac_post9 ffe_coeff_set12_frac_post8 ffe_coeff_set12_frac_post7 ffe_coeff_set12_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set12_frac_post9
ffe_coeff_set12_frac_post9[31:24]
set12 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set12_frac_post8
ffe_coeff_set12_frac_post8[23:16]
set12 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set12_frac_post7
ffe_coeff_set12_frac_post7[15:8]
set12 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set12_frac_post6
ffe_coeff_set12_frac_post6[7:0]
set12 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006c0 Register(32 bit) ffe_coeff_set12_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6c0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set12_frac_bankA_float1 ffe_coeff_set12_frac_post12 ffe_coeff_set12_frac_post11 ffe_coeff_set12_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set12_frac_bankA_float1
ffe_coeff_set12_frac_bankA_float1[31:24]
set12 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set12_frac_post12
ffe_coeff_set12_frac_post12[23:16]
set12 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set12_frac_post11
ffe_coeff_set12_frac_post11[15:8]
set12 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set12_frac_post10
ffe_coeff_set12_frac_post10[7:0]
set12 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006c4 Register(32 bit) ffe_coeff_set12_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6c4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set12_frac_bankB_float2 ffe_coeff_set12_frac_bankB_float1 ffe_coeff_set12_frac_bankA_float3 ffe_coeff_set12_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set12_frac_bankB_float2
ffe_coeff_set12_frac_bankB_float2[31:24]
set12 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set12_frac_bankB_float1
ffe_coeff_set12_frac_bankB_float1[23:16]
set12 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set12_frac_bankA_float3
ffe_coeff_set12_frac_bankA_float3[15:8]
set12 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set12_frac_bankA_float2
ffe_coeff_set12_frac_bankA_float2[7:0]
set12 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006c8 Register(32 bit) ffe_coeff_set12_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6c8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set12_frac_bankC_float3 ffe_coeff_set12_frac_bankC_float2 ffe_coeff_set12_frac_bankC_float1 ffe_coeff_set12_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set12_frac_bankC_float3
ffe_coeff_set12_frac_bankC_float3[31:24]
set12 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set12_frac_bankC_float2
ffe_coeff_set12_frac_bankC_float2[23:16]
set12 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set12_frac_bankC_float1
ffe_coeff_set12_frac_bankC_float1[15:8]
set12 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set12_frac_bankB_float3
ffe_coeff_set12_frac_bankB_float3[7:0]
set12 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006cc Register(32 bit) ffe_coeff_set13_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6cc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set13_frac_post1 ffe_coeff_set13_frac_pre1 ffe_coeff_set13_frac_pre2 ffe_coeff_set13_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set13_frac_post1
ffe_coeff_set13_frac_post1[31:24]
set13 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set13_frac_pre1
ffe_coeff_set13_frac_pre1[23:16]
set13 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set13_frac_pre2
ffe_coeff_set13_frac_pre2[15:8]
set13 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set13_frac_pre3
ffe_coeff_set13_frac_pre3[7:0]
set13 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006d0 Register(32 bit) ffe_coeff_set13_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6d0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set13_frac_post5 ffe_coeff_set13_frac_post4 ffe_coeff_set13_frac_post3 ffe_coeff_set13_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set13_frac_post5
ffe_coeff_set13_frac_post5[31:24]
set13 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set13_frac_post4
ffe_coeff_set13_frac_post4[23:16]
set13 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set13_frac_post3
ffe_coeff_set13_frac_post3[15:8]
set13 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set13_frac_post2
ffe_coeff_set13_frac_post2[7:0]
set13 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x000006d4 Register(32 bit) ffe_coeff_set13_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6d4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set13_frac_post9 ffe_coeff_set13_frac_post8 ffe_coeff_set13_frac_post7 ffe_coeff_set13_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set13_frac_post9
ffe_coeff_set13_frac_post9[31:24]
set13 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set13_frac_post8
ffe_coeff_set13_frac_post8[23:16]
set13 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set13_frac_post7
ffe_coeff_set13_frac_post7[15:8]
set13 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set13_frac_post6
ffe_coeff_set13_frac_post6[7:0]
set13 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006d8 Register(32 bit) ffe_coeff_set13_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6d8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set13_frac_bankA_float1 ffe_coeff_set13_frac_post12 ffe_coeff_set13_frac_post11 ffe_coeff_set13_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set13_frac_bankA_float1
ffe_coeff_set13_frac_bankA_float1[31:24]
set13 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set13_frac_post12
ffe_coeff_set13_frac_post12[23:16]
set13 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set13_frac_post11
ffe_coeff_set13_frac_post11[15:8]
set13 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set13_frac_post10
ffe_coeff_set13_frac_post10[7:0]
set13 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006dc Register(32 bit) ffe_coeff_set13_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6dc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set13_frac_bankB_float2 ffe_coeff_set13_frac_bankB_float1 ffe_coeff_set13_frac_bankA_float3 ffe_coeff_set13_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set13_frac_bankB_float2
ffe_coeff_set13_frac_bankB_float2[31:24]
set13 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set13_frac_bankB_float1
ffe_coeff_set13_frac_bankB_float1[23:16]
set13 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set13_frac_bankA_float3
ffe_coeff_set13_frac_bankA_float3[15:8]
set13 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set13_frac_bankA_float2
ffe_coeff_set13_frac_bankA_float2[7:0]
set13 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006e0 Register(32 bit) ffe_coeff_set13_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6e0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set13_frac_bankC_float3 ffe_coeff_set13_frac_bankC_float2 ffe_coeff_set13_frac_bankC_float1 ffe_coeff_set13_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set13_frac_bankC_float3
ffe_coeff_set13_frac_bankC_float3[31:24]
set13 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set13_frac_bankC_float2
ffe_coeff_set13_frac_bankC_float2[23:16]
set13 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set13_frac_bankC_float1
ffe_coeff_set13_frac_bankC_float1[15:8]
set13 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set13_frac_bankB_float3
ffe_coeff_set13_frac_bankB_float3[7:0]
set13 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006e4 Register(32 bit) ffe_coeff_set14_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6e4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set14_frac_post1 ffe_coeff_set14_frac_pre1 ffe_coeff_set14_frac_pre2 ffe_coeff_set14_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set14_frac_post1
ffe_coeff_set14_frac_post1[31:24]
set14 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set14_frac_pre1
ffe_coeff_set14_frac_pre1[23:16]
set14 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set14_frac_pre2
ffe_coeff_set14_frac_pre2[15:8]
set14 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set14_frac_pre3
ffe_coeff_set14_frac_pre3[7:0]
set14 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006e8 Register(32 bit) ffe_coeff_set14_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6e8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set14_frac_post5 ffe_coeff_set14_frac_post4 ffe_coeff_set14_frac_post3 ffe_coeff_set14_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set14_frac_post5
ffe_coeff_set14_frac_post5[31:24]
set14 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set14_frac_post4
ffe_coeff_set14_frac_post4[23:16]
set14 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set14_frac_post3
ffe_coeff_set14_frac_post3[15:8]
set14 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set14_frac_post2
ffe_coeff_set14_frac_post2[7:0]
set14 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006ec Register(32 bit) ffe_coeff_set14_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6ec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set14_frac_post9 ffe_coeff_set14_frac_post8 ffe_coeff_set14_frac_post7 ffe_coeff_set14_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set14_frac_post9
ffe_coeff_set14_frac_post9[31:24]
set14 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set14_frac_post8
ffe_coeff_set14_frac_post8[23:16]
set14 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set14_frac_post7
ffe_coeff_set14_frac_post7[15:8]
set14 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set14_frac_post6
ffe_coeff_set14_frac_post6[7:0]
set14 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006f0 Register(32 bit) ffe_coeff_set14_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6f0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set14_frac_bankA_float1 ffe_coeff_set14_frac_post12 ffe_coeff_set14_frac_post11 ffe_coeff_set14_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set14_frac_bankA_float1
ffe_coeff_set14_frac_bankA_float1[31:24]
set14 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set14_frac_post12
ffe_coeff_set14_frac_post12[23:16]
set14 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set14_frac_post11
ffe_coeff_set14_frac_post11[15:8]
set14 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set14_frac_post10
ffe_coeff_set14_frac_post10[7:0]
set14 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006f4 Register(32 bit) ffe_coeff_set14_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6f4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set14_frac_bankB_float2 ffe_coeff_set14_frac_bankB_float1 ffe_coeff_set14_frac_bankA_float3 ffe_coeff_set14_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set14_frac_bankB_float2
ffe_coeff_set14_frac_bankB_float2[31:24]
set14 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set14_frac_bankB_float1
ffe_coeff_set14_frac_bankB_float1[23:16]
set14 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set14_frac_bankA_float3
ffe_coeff_set14_frac_bankA_float3[15:8]
set14 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set14_frac_bankA_float2
ffe_coeff_set14_frac_bankA_float2[7:0]
set14 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006f8 Register(32 bit) ffe_coeff_set14_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6f8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set14_frac_bankC_float3 ffe_coeff_set14_frac_bankC_float2 ffe_coeff_set14_frac_bankC_float1 ffe_coeff_set14_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set14_frac_bankC_float3
ffe_coeff_set14_frac_bankC_float3[31:24]
set14 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set14_frac_bankC_float2
ffe_coeff_set14_frac_bankC_float2[23:16]
set14 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set14_frac_bankC_float1
ffe_coeff_set14_frac_bankC_float1[15:8]
set14 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set14_frac_bankB_float3
ffe_coeff_set14_frac_bankB_float3[7:0]
set14 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x000006fc Register(32 bit) ffe_coeff_set15_frac_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a6fc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set15_frac_post1 ffe_coeff_set15_frac_pre1 ffe_coeff_set15_frac_pre2 ffe_coeff_set15_frac_pre3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set15_frac_post1
ffe_coeff_set15_frac_post1[31:24]
set15 fractional ffe post cursor 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set15_frac_pre1
ffe_coeff_set15_frac_pre1[23:16]
set15 fractional ffe pre cursor 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set15_frac_pre2
ffe_coeff_set15_frac_pre2[15:8]
set15 fractional ffe pre cursor 2 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set15_frac_pre3
ffe_coeff_set15_frac_pre3[7:0]
set15 fractional ffe pre cursor 3 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x00000700 Register(32 bit) ffe_coeff_set15_frac_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a700 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set15_frac_post5 ffe_coeff_set15_frac_post4 ffe_coeff_set15_frac_post3 ffe_coeff_set15_frac_post2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set15_frac_post5
ffe_coeff_set15_frac_post5[31:24]
set15 fractional ffe post cursor 5 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set15_frac_post4
ffe_coeff_set15_frac_post4[23:16]
set15 fractional ffe post cursor 4 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set15_frac_post3
ffe_coeff_set15_frac_post3[15:8]
set15 fractional ffe post cursor 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set15_frac_post2
ffe_coeff_set15_frac_post2[7:0]
set15 fractional ffe post cursor 2 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x00000704 Register(32 bit) ffe_coeff_set15_frac_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a704 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set15_frac_post9 ffe_coeff_set15_frac_post8 ffe_coeff_set15_frac_post7 ffe_coeff_set15_frac_post6
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set15_frac_post9
ffe_coeff_set15_frac_post9[31:24]
set15 fractional ffe post cursor 9 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set15_frac_post8
ffe_coeff_set15_frac_post8[23:16]
set15 fractional ffe post cursor 8 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set15_frac_post7
ffe_coeff_set15_frac_post7[15:8]
set15 fractional ffe post cursor 7 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set15_frac_post6
ffe_coeff_set15_frac_post6[7:0]
set15 fractional ffe post cursor 6 coeff

Reset: hex:0x00;

Back to AddressMap

Back to top

+0x00000708 Register(32 bit) ffe_coeff_set15_frac_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a708 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set15_frac_bankA_float1 ffe_coeff_set15_frac_post12 ffe_coeff_set15_frac_post11 ffe_coeff_set15_frac_post10
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set15_frac_bankA_float1
ffe_coeff_set15_frac_bankA_float1[31:24]
set15 fractional ffe bankA float 1 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set15_frac_post12
ffe_coeff_set15_frac_post12[23:16]
set15 fractional ffe post cursor 12 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set15_frac_post11
ffe_coeff_set15_frac_post11[15:8]
set15 fractional ffe post cursor 11 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set15_frac_post10
ffe_coeff_set15_frac_post10[7:0]
set15 fractional ffe post cursor 10 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x0000070c Register(32 bit) ffe_coeff_set15_frac_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a70c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set15_frac_bankB_float2 ffe_coeff_set15_frac_bankB_float1 ffe_coeff_set15_frac_bankA_float3 ffe_coeff_set15_frac_bankA_float2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set15_frac_bankB_float2
ffe_coeff_set15_frac_bankB_float2[31:24]
set15 fractional ffe bankB float 2 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set15_frac_bankB_float1
ffe_coeff_set15_frac_bankB_float1[23:16]
set15 fractional ffe bankB float 1 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set15_frac_bankA_float3
ffe_coeff_set15_frac_bankA_float3[15:8]
set15 fractional ffe bankA float 3 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set15_frac_bankA_float2
ffe_coeff_set15_frac_bankA_float2[7:0]
set15 fractional ffe bankA float 2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000710 Register(32 bit) ffe_coeff_set15_frac_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a710 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_coeff_set15_frac_bankC_float3 ffe_coeff_set15_frac_bankC_float2 ffe_coeff_set15_frac_bankC_float1 ffe_coeff_set15_frac_bankB_float3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_coeff_set15_frac_bankC_float3
ffe_coeff_set15_frac_bankC_float3[31:24]
set15 fractional ffe bankC float 3 coeff

Reset: hex:0x00;

[23:16]
RW/V

ffe_coeff_set15_frac_bankC_float2
ffe_coeff_set15_frac_bankC_float2[23:16]
set15 fractional ffe bankC float 2 coeff

Reset: hex:0x00;

[15:08]
RW/V

ffe_coeff_set15_frac_bankC_float1
ffe_coeff_set15_frac_bankC_float1[15:8]
set15 fractional ffe bankC float 1 coeff

Reset: hex:0x00;

[07:00]
RW/V

ffe_coeff_set15_frac_bankB_float3
ffe_coeff_set15_frac_bankB_float3[7:0]
set15 fractional ffe bankB float 3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000714 Register(32 bit) ffe_err_level_frac_set0_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a714 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set0_p3 ffe_err_level_frac_set0_p1 ffe_err_level_frac_set0_m1 ffe_err_level_frac_set0_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set0_p3
ffe_err_level_frac_set0_p3[31:24]
FFE VREF set0 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set0_p1
ffe_err_level_frac_set0_p1[23:16]
FFE VREF set0 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set0_m1
ffe_err_level_frac_set0_m1[15:8]
FFE VREF set0 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set0_m3
ffe_err_level_frac_set0_m3[7:0]
FFE VREF set0 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000718 Register(32 bit) ffe_err_level_frac_set1_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a718 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set1_p3 ffe_err_level_frac_set1_p1 ffe_err_level_frac_set1_m1 ffe_err_level_frac_set1_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set1_p3
ffe_err_level_frac_set1_p3[31:24]
FFE VREF set1 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set1_p1
ffe_err_level_frac_set1_p1[23:16]
FFE VREF set1 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set1_m1
ffe_err_level_frac_set1_m1[15:8]
FFE VREF set1 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set1_m3
ffe_err_level_frac_set1_m3[7:0]
FFE VREF set1 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x0000071c Register(32 bit) ffe_err_level_frac_set2_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a71c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set2_p3 ffe_err_level_frac_set2_p1 ffe_err_level_frac_set2_m1 ffe_err_level_frac_set2_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set2_p3
ffe_err_level_frac_set2_p3[31:24]
FFE VREF set2 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set2_p1
ffe_err_level_frac_set2_p1[23:16]
FFE VREF set2 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set2_m1
ffe_err_level_frac_set2_m1[15:8]
FFE VREF set2 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set2_m3
ffe_err_level_frac_set2_m3[7:0]
FFE VREF set2 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000720 Register(32 bit) ffe_err_level_frac_set3_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a720 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set3_p3 ffe_err_level_frac_set3_p1 ffe_err_level_frac_set3_m1 ffe_err_level_frac_set3_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set3_p3
ffe_err_level_frac_set3_p3[31:24]
FFE VREF set3 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set3_p1
ffe_err_level_frac_set3_p1[23:16]
FFE VREF set3 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set3_m1
ffe_err_level_frac_set3_m1[15:8]
FFE VREF set3 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set3_m3
ffe_err_level_frac_set3_m3[7:0]
FFE VREF set3 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000724 Register(32 bit) ffe_err_level_frac_set4_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a724 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set4_p3 ffe_err_level_frac_set4_p1 ffe_err_level_frac_set4_m1 ffe_err_level_frac_set4_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set4_p3
ffe_err_level_frac_set4_p3[31:24]
FFE VREF set4 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set4_p1
ffe_err_level_frac_set4_p1[23:16]
FFE VREF set4 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set4_m1
ffe_err_level_frac_set4_m1[15:8]
FFE VREF set4 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set4_m3
ffe_err_level_frac_set4_m3[7:0]
FFE VREF set4 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000728 Register(32 bit) ffe_err_level_frac_set5_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a728 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set5_p3 ffe_err_level_frac_set5_p1 ffe_err_level_frac_set5_m1 ffe_err_level_frac_set5_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set5_p3
ffe_err_level_frac_set5_p3[31:24]
FFE VREF set5 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set5_p1
ffe_err_level_frac_set5_p1[23:16]
FFE VREF set5 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set5_m1
ffe_err_level_frac_set5_m1[15:8]
FFE VREF set5 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set5_m3
ffe_err_level_frac_set5_m3[7:0]
FFE VREF set5 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x0000072c Register(32 bit) ffe_err_level_frac_set6_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a72c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set6_p3 ffe_err_level_frac_set6_p1 ffe_err_level_frac_set6_m1 ffe_err_level_frac_set6_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set6_p3
ffe_err_level_frac_set6_p3[31:24]
FFE VREF set6 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set6_p1
ffe_err_level_frac_set6_p1[23:16]
FFE VREF set6 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set6_m1
ffe_err_level_frac_set6_m1[15:8]
FFE VREF set6 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set6_m3
ffe_err_level_frac_set6_m3[7:0]
FFE VREF set6 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000730 Register(32 bit) ffe_err_level_frac_set7_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a730 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set7_p3 ffe_err_level_frac_set7_p1 ffe_err_level_frac_set7_m1 ffe_err_level_frac_set7_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set7_p3
ffe_err_level_frac_set7_p3[31:24]
FFE VREF set7 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set7_p1
ffe_err_level_frac_set7_p1[23:16]
FFE VREF set7 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set7_m1
ffe_err_level_frac_set7_m1[15:8]
FFE VREF set7 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set7_m3
ffe_err_level_frac_set7_m3[7:0]
FFE VREF set7 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000734 Register(32 bit) ffe_err_level_frac_set8_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a734 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set8_p3 ffe_err_level_frac_set8_p1 ffe_err_level_frac_set8_m1 ffe_err_level_frac_set8_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set8_p3
ffe_err_level_frac_set8_p3[31:24]
FFE VREF set8 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set8_p1
ffe_err_level_frac_set8_p1[23:16]
FFE VREF set8 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set8_m1
ffe_err_level_frac_set8_m1[15:8]
FFE VREF set8 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set8_m3
ffe_err_level_frac_set8_m3[7:0]
FFE VREF set8 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000738 Register(32 bit) ffe_err_level_frac_set9_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a738 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set9_p3 ffe_err_level_frac_set9_p1 ffe_err_level_frac_set9_m1 ffe_err_level_frac_set9_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set9_p3
ffe_err_level_frac_set9_p3[31:24]
FFE VREF set9 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set9_p1
ffe_err_level_frac_set9_p1[23:16]
FFE VREF set9 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set9_m1
ffe_err_level_frac_set9_m1[15:8]
FFE VREF set9 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set9_m3
ffe_err_level_frac_set9_m3[7:0]
FFE VREF set9 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x0000073c Register(32 bit) ffe_err_level_frac_set10_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a73c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set10_p3 ffe_err_level_frac_set10_p1 ffe_err_level_frac_set10_m1 ffe_err_level_frac_set10_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set10_p3
ffe_err_level_frac_set10_p3[31:24]
FFE VREF set10 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set10_p1
ffe_err_level_frac_set10_p1[23:16]
FFE VREF set10 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set10_m1
ffe_err_level_frac_set10_m1[15:8]
FFE VREF set10 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set10_m3
ffe_err_level_frac_set10_m3[7:0]
FFE VREF set10 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000740 Register(32 bit) ffe_err_level_frac_set11_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a740 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set11_p3 ffe_err_level_frac_set11_p1 ffe_err_level_frac_set11_m1 ffe_err_level_frac_set11_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set11_p3
ffe_err_level_frac_set11_p3[31:24]
FFE VREF set11 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set11_p1
ffe_err_level_frac_set11_p1[23:16]
FFE VREF set11 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set11_m1
ffe_err_level_frac_set11_m1[15:8]
FFE VREF set11 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set11_m3
ffe_err_level_frac_set11_m3[7:0]
FFE VREF set11 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000744 Register(32 bit) ffe_err_level_frac_set12_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a744 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set12_p3 ffe_err_level_frac_set12_p1 ffe_err_level_frac_set12_m1 ffe_err_level_frac_set12_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set12_p3
ffe_err_level_frac_set12_p3[31:24]
FFE VREF set12 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set12_p1
ffe_err_level_frac_set12_p1[23:16]
FFE VREF set12 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set12_m1
ffe_err_level_frac_set12_m1[15:8]
FFE VREF set12 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set12_m3
ffe_err_level_frac_set12_m3[7:0]
FFE VREF set12 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000748 Register(32 bit) ffe_err_level_frac_set13_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a748 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set13_p3 ffe_err_level_frac_set13_p1 ffe_err_level_frac_set13_m1 ffe_err_level_frac_set13_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set13_p3
ffe_err_level_frac_set13_p3[31:24]
FFE VREF set13 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set13_p1
ffe_err_level_frac_set13_p1[23:16]
FFE VREF set13 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set13_m1
ffe_err_level_frac_set13_m1[15:8]
FFE VREF set13 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set13_m3
ffe_err_level_frac_set13_m3[7:0]
FFE VREF set13 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x0000074c Register(32 bit) ffe_err_level_frac_set14_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a74c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set14_p3 ffe_err_level_frac_set14_p1 ffe_err_level_frac_set14_m1 ffe_err_level_frac_set14_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set14_p3
ffe_err_level_frac_set14_p3[31:24]
FFE VREF set14 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set14_p1
ffe_err_level_frac_set14_p1[23:16]
FFE VREF set14 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set14_m1
ffe_err_level_frac_set14_m1[15:8]
FFE VREF set14 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set14_m3
ffe_err_level_frac_set14_m3[7:0]
FFE VREF set14 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000750 Register(32 bit) ffe_err_level_frac_set15_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a750 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_err_level_frac_set15_p3 ffe_err_level_frac_set15_p1 ffe_err_level_frac_set15_m1 ffe_err_level_frac_set15_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ffe_err_level_frac_set15_p3
ffe_err_level_frac_set15_p3[31:24]
FFE VREF set15 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

ffe_err_level_frac_set15_p1
ffe_err_level_frac_set15_p1[23:16]
FFE VREF set15 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

ffe_err_level_frac_set15_m1
ffe_err_level_frac_set15_m1[15:8]
FFE VREF set15 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

ffe_err_level_frac_set15_m3
ffe_err_level_frac_set15_m3[7:0]
FFE VREF set15 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000754 Register(32 bit) adc_err_level_frac_set0_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a754 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set0_p3 adc_err_level_frac_set0_p1 adc_err_level_frac_set0_m1 adc_err_level_frac_set0_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set0_p3
adc_err_level_frac_set0_p3[31:24]
ADC VREF set0 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set0_p1
adc_err_level_frac_set0_p1[23:16]
ADC VREF set0 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set0_m1
adc_err_level_frac_set0_m1[15:8]
ADC VREF set0 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set0_m3
adc_err_level_frac_set0_m3[7:0]
ADC VREF set0 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000758 Register(32 bit) adc_err_level_frac_set1_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a758 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set1_p3 adc_err_level_frac_set1_p1 adc_err_level_frac_set1_m1 adc_err_level_frac_set1_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set1_p3
adc_err_level_frac_set1_p3[31:24]
ADC VREF set1 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set1_p1
adc_err_level_frac_set1_p1[23:16]
ADC VREF set1 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set1_m1
adc_err_level_frac_set1_m1[15:8]
ADC VREF set1 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set1_m3
adc_err_level_frac_set1_m3[7:0]
ADC VREF set1 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x0000075c Register(32 bit) adc_err_level_frac_set2_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a75c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set2_p3 adc_err_level_frac_set2_p1 adc_err_level_frac_set2_m1 adc_err_level_frac_set2_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set2_p3
adc_err_level_frac_set2_p3[31:24]
ADC VREF set2 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set2_p1
adc_err_level_frac_set2_p1[23:16]
ADC VREF set2 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set2_m1
adc_err_level_frac_set2_m1[15:8]
ADC VREF set2 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set2_m3
adc_err_level_frac_set2_m3[7:0]
ADC VREF set2 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000760 Register(32 bit) adc_err_level_frac_set3_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a760 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set3_p3 adc_err_level_frac_set3_p1 adc_err_level_frac_set3_m1 adc_err_level_frac_set3_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set3_p3
adc_err_level_frac_set3_p3[31:24]
ADC VREF set3 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set3_p1
adc_err_level_frac_set3_p1[23:16]
ADC VREF set3 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set3_m1
adc_err_level_frac_set3_m1[15:8]
ADC VREF set3 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set3_m3
adc_err_level_frac_set3_m3[7:0]
ADC VREF set3 level m3 fractional part

Reset: hex:0x00;

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+0x00000764 Register(32 bit) adc_err_level_frac_set4_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a764 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set4_p3 adc_err_level_frac_set4_p1 adc_err_level_frac_set4_m1 adc_err_level_frac_set4_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set4_p3
adc_err_level_frac_set4_p3[31:24]
ADC VREF set4 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set4_p1
adc_err_level_frac_set4_p1[23:16]
ADC VREF set4 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set4_m1
adc_err_level_frac_set4_m1[15:8]
ADC VREF set4 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set4_m3
adc_err_level_frac_set4_m3[7:0]
ADC VREF set4 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000768 Register(32 bit) adc_err_level_frac_set5_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a768 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set5_p3 adc_err_level_frac_set5_p1 adc_err_level_frac_set5_m1 adc_err_level_frac_set5_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set5_p3
adc_err_level_frac_set5_p3[31:24]
ADC VREF set5 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set5_p1
adc_err_level_frac_set5_p1[23:16]
ADC VREF set5 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set5_m1
adc_err_level_frac_set5_m1[15:8]
ADC VREF set5 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set5_m3
adc_err_level_frac_set5_m3[7:0]
ADC VREF set5 level m3 fractional part

Reset: hex:0x00;

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+0x0000076c Register(32 bit) adc_err_level_frac_set6_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a76c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set6_p3 adc_err_level_frac_set6_p1 adc_err_level_frac_set6_m1 adc_err_level_frac_set6_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set6_p3
adc_err_level_frac_set6_p3[31:24]
ADC VREF set6 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set6_p1
adc_err_level_frac_set6_p1[23:16]
ADC VREF set6 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set6_m1
adc_err_level_frac_set6_m1[15:8]
ADC VREF set6 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set6_m3
adc_err_level_frac_set6_m3[7:0]
ADC VREF set6 level m3 fractional part

Reset: hex:0x00;

Back to AddressMap

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+0x00000770 Register(32 bit) adc_err_level_frac_set7_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a770 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set7_p3 adc_err_level_frac_set7_p1 adc_err_level_frac_set7_m1 adc_err_level_frac_set7_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set7_p3
adc_err_level_frac_set7_p3[31:24]
ADC VREF set7 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set7_p1
adc_err_level_frac_set7_p1[23:16]
ADC VREF set7 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set7_m1
adc_err_level_frac_set7_m1[15:8]
ADC VREF set7 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set7_m3
adc_err_level_frac_set7_m3[7:0]
ADC VREF set7 level m3 fractional part

Reset: hex:0x00;

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+0x00000774 Register(32 bit) adc_err_level_frac_set8_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a774 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set8_p3 adc_err_level_frac_set8_p1 adc_err_level_frac_set8_m1 adc_err_level_frac_set8_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set8_p3
adc_err_level_frac_set8_p3[31:24]
ADC VREF set8 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set8_p1
adc_err_level_frac_set8_p1[23:16]
ADC VREF set8 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set8_m1
adc_err_level_frac_set8_m1[15:8]
ADC VREF set8 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set8_m3
adc_err_level_frac_set8_m3[7:0]
ADC VREF set8 level m3 fractional part

Reset: hex:0x00;

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+0x00000778 Register(32 bit) adc_err_level_frac_set9_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a778 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set9_p3 adc_err_level_frac_set9_p1 adc_err_level_frac_set9_m1 adc_err_level_frac_set9_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set9_p3
adc_err_level_frac_set9_p3[31:24]
ADC VREF set9 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set9_p1
adc_err_level_frac_set9_p1[23:16]
ADC VREF set9 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set9_m1
adc_err_level_frac_set9_m1[15:8]
ADC VREF set9 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set9_m3
adc_err_level_frac_set9_m3[7:0]
ADC VREF set9 level m3 fractional part

Reset: hex:0x00;

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+0x0000077c Register(32 bit) adc_err_level_frac_set10_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a77c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set10_p3 adc_err_level_frac_set10_p1 adc_err_level_frac_set10_m1 adc_err_level_frac_set10_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set10_p3
adc_err_level_frac_set10_p3[31:24]
ADC VREF set10 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set10_p1
adc_err_level_frac_set10_p1[23:16]
ADC VREF set10 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set10_m1
adc_err_level_frac_set10_m1[15:8]
ADC VREF set10 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set10_m3
adc_err_level_frac_set10_m3[7:0]
ADC VREF set10 level m3 fractional part

Reset: hex:0x00;

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+0x00000780 Register(32 bit) adc_err_level_frac_set11_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a780 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set11_p3 adc_err_level_frac_set11_p1 adc_err_level_frac_set11_m1 adc_err_level_frac_set11_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set11_p3
adc_err_level_frac_set11_p3[31:24]
ADC VREF set11 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set11_p1
adc_err_level_frac_set11_p1[23:16]
ADC VREF set11 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set11_m1
adc_err_level_frac_set11_m1[15:8]
ADC VREF set11 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set11_m3
adc_err_level_frac_set11_m3[7:0]
ADC VREF set11 level m3 fractional part

Reset: hex:0x00;

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+0x00000784 Register(32 bit) adc_err_level_frac_set12_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a784 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set12_p3 adc_err_level_frac_set12_p1 adc_err_level_frac_set12_m1 adc_err_level_frac_set12_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set12_p3
adc_err_level_frac_set12_p3[31:24]
ADC VREF set12 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set12_p1
adc_err_level_frac_set12_p1[23:16]
ADC VREF set12 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set12_m1
adc_err_level_frac_set12_m1[15:8]
ADC VREF set12 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set12_m3
adc_err_level_frac_set12_m3[7:0]
ADC VREF set12 level m3 fractional part

Reset: hex:0x00;

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+0x00000788 Register(32 bit) adc_err_level_frac_set13_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a788 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set13_p3 adc_err_level_frac_set13_p1 adc_err_level_frac_set13_m1 adc_err_level_frac_set13_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set13_p3
adc_err_level_frac_set13_p3[31:24]
ADC VREF set13 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set13_p1
adc_err_level_frac_set13_p1[23:16]
ADC VREF set13 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set13_m1
adc_err_level_frac_set13_m1[15:8]
ADC VREF set13 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set13_m3
adc_err_level_frac_set13_m3[7:0]
ADC VREF set13 level m3 fractional part

Reset: hex:0x00;

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+0x0000078c Register(32 bit) adc_err_level_frac_set14_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a78c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set14_p3 adc_err_level_frac_set14_p1 adc_err_level_frac_set14_m1 adc_err_level_frac_set14_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set14_p3
adc_err_level_frac_set14_p3[31:24]
ADC VREF set14 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set14_p1
adc_err_level_frac_set14_p1[23:16]
ADC VREF set14 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set14_m1
adc_err_level_frac_set14_m1[15:8]
ADC VREF set14 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set14_m3
adc_err_level_frac_set14_m3[7:0]
ADC VREF set14 level m3 fractional part

Reset: hex:0x00;

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+0x00000790 Register(32 bit) adc_err_level_frac_set15_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a790 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name adc_err_level_frac_set15_p3 adc_err_level_frac_set15_p1 adc_err_level_frac_set15_m1 adc_err_level_frac_set15_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

adc_err_level_frac_set15_p3
adc_err_level_frac_set15_p3[31:24]
ADC VREF set15 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

adc_err_level_frac_set15_p1
adc_err_level_frac_set15_p1[23:16]
ADC VREF set15 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

adc_err_level_frac_set15_m1
adc_err_level_frac_set15_m1[15:8]
ADC VREF set15 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

adc_err_level_frac_set15_m3
adc_err_level_frac_set15_m3[7:0]
ADC VREF set15 level m3 fractional part

Reset: hex:0x00;

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+0x00000794 Register(32 bit) affe_lms_set0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a794 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set0_post2 - affe_coeff_set0_post1 - affe_coeff_set0_pre1 - affe_coeff_set0_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set0_post2
affe_coeff_set0_post2[30:24]
set0 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set0_post1
affe_coeff_set0_post1[22:16]
set0 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set0_pre1
affe_coeff_set0_pre1[14:8]
set0 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set0_pre2
affe_coeff_set0_pre2[6:0]
set0 of affe coeff pre2

Reset: hex:0x00;

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+0x00000798 Register(32 bit) affe_lms_set1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a798 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set1_post2 - affe_coeff_set1_post1 - affe_coeff_set1_pre1 - affe_coeff_set1_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set1_post2
affe_coeff_set1_post2[30:24]
set1 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set1_post1
affe_coeff_set1_post1[22:16]
set1 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set1_pre1
affe_coeff_set1_pre1[14:8]
set1 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set1_pre2
affe_coeff_set1_pre2[6:0]
set1 of affe coeff pre2

Reset: hex:0x00;

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+0x0000079c Register(32 bit) affe_lms_set2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a79c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set2_post2 - affe_coeff_set2_post1 - affe_coeff_set2_pre1 - affe_coeff_set2_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set2_post2
affe_coeff_set2_post2[30:24]
set2 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set2_post1
affe_coeff_set2_post1[22:16]
set2 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set2_pre1
affe_coeff_set2_pre1[14:8]
set2 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set2_pre2
affe_coeff_set2_pre2[6:0]
set2 of affe coeff pre2

Reset: hex:0x00;

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+0x000007a0 Register(32 bit) affe_lms_set3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7a0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set3_post2 - affe_coeff_set3_post1 - affe_coeff_set3_pre1 - affe_coeff_set3_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set3_post2
affe_coeff_set3_post2[30:24]
set3 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set3_post1
affe_coeff_set3_post1[22:16]
set3 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set3_pre1
affe_coeff_set3_pre1[14:8]
set3 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set3_pre2
affe_coeff_set3_pre2[6:0]
set3 of affe coeff pre2

Reset: hex:0x00;

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+0x000007a4 Register(32 bit) affe_lms_set4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7a4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set4_post2 - affe_coeff_set4_post1 - affe_coeff_set4_pre1 - affe_coeff_set4_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set4_post2
affe_coeff_set4_post2[30:24]
set4 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set4_post1
affe_coeff_set4_post1[22:16]
set4 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set4_pre1
affe_coeff_set4_pre1[14:8]
set4 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set4_pre2
affe_coeff_set4_pre2[6:0]
set4 of affe coeff pre2

Reset: hex:0x00;

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+0x000007a8 Register(32 bit) affe_lms_set5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7a8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set5_post2 - affe_coeff_set5_post1 - affe_coeff_set5_pre1 - affe_coeff_set5_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set5_post2
affe_coeff_set5_post2[30:24]
set5 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set5_post1
affe_coeff_set5_post1[22:16]
set5 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set5_pre1
affe_coeff_set5_pre1[14:8]
set5 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set5_pre2
affe_coeff_set5_pre2[6:0]
set5 of affe coeff pre2

Reset: hex:0x00;

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+0x000007ac Register(32 bit) affe_lms_set6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7ac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set6_post2 - affe_coeff_set6_post1 - affe_coeff_set6_pre1 - affe_coeff_set6_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set6_post2
affe_coeff_set6_post2[30:24]
set6 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set6_post1
affe_coeff_set6_post1[22:16]
set6 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set6_pre1
affe_coeff_set6_pre1[14:8]
set6 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set6_pre2
affe_coeff_set6_pre2[6:0]
set6 of affe coeff pre2

Reset: hex:0x00;

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+0x000007b0 Register(32 bit) affe_lms_set7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7b0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set7_post2 - affe_coeff_set7_post1 - affe_coeff_set7_pre1 - affe_coeff_set7_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set7_post2
affe_coeff_set7_post2[30:24]
set7 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set7_post1
affe_coeff_set7_post1[22:16]
set7 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set7_pre1
affe_coeff_set7_pre1[14:8]
set7 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set7_pre2
affe_coeff_set7_pre2[6:0]
set7 of affe coeff pre2

Reset: hex:0x00;

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+0x000007b4 Register(32 bit) affe_lms_set8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7b4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set8_post2 - affe_coeff_set8_post1 - affe_coeff_set8_pre1 - affe_coeff_set8_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set8_post2
affe_coeff_set8_post2[30:24]
set8 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set8_post1
affe_coeff_set8_post1[22:16]
set8 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set8_pre1
affe_coeff_set8_pre1[14:8]
set8 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set8_pre2
affe_coeff_set8_pre2[6:0]
set8 of affe coeff pre2

Reset: hex:0x00;

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+0x000007b8 Register(32 bit) affe_lms_set9
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7b8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set9_post2 - affe_coeff_set9_post1 - affe_coeff_set9_pre1 - affe_coeff_set9_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set9_post2
affe_coeff_set9_post2[30:24]
set9 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set9_post1
affe_coeff_set9_post1[22:16]
set9 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set9_pre1
affe_coeff_set9_pre1[14:8]
set9 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set9_pre2
affe_coeff_set9_pre2[6:0]
set9 of affe coeff pre2

Reset: hex:0x00;

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+0x000007bc Register(32 bit) affe_lms_set10
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7bc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set10_post2 - affe_coeff_set10_post1 - affe_coeff_set10_pre1 - affe_coeff_set10_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set10_post2
affe_coeff_set10_post2[30:24]
set10 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set10_post1
affe_coeff_set10_post1[22:16]
set10 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set10_pre1
affe_coeff_set10_pre1[14:8]
set10 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set10_pre2
affe_coeff_set10_pre2[6:0]
set10 of affe coeff pre2

Reset: hex:0x00;

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+0x000007c0 Register(32 bit) affe_lms_set11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7c0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set11_post2 - affe_coeff_set11_post1 - affe_coeff_set11_pre1 - affe_coeff_set11_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set11_post2
affe_coeff_set11_post2[30:24]
set11 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set11_post1
affe_coeff_set11_post1[22:16]
set11 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set11_pre1
affe_coeff_set11_pre1[14:8]
set11 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set11_pre2
affe_coeff_set11_pre2[6:0]
set11 of affe coeff pre2

Reset: hex:0x00;

Back to AddressMap

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+0x000007c4 Register(32 bit) affe_lms_set12
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7c4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set12_post2 - affe_coeff_set12_post1 - affe_coeff_set12_pre1 - affe_coeff_set12_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set12_post2
affe_coeff_set12_post2[30:24]
set12 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set12_post1
affe_coeff_set12_post1[22:16]
set12 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set12_pre1
affe_coeff_set12_pre1[14:8]
set12 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set12_pre2
affe_coeff_set12_pre2[6:0]
set12 of affe coeff pre2

Reset: hex:0x00;

Back to AddressMap

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+0x000007c8 Register(32 bit) affe_lms_set13
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7c8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set13_post2 - affe_coeff_set13_post1 - affe_coeff_set13_pre1 - affe_coeff_set13_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set13_post2
affe_coeff_set13_post2[30:24]
set13 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set13_post1
affe_coeff_set13_post1[22:16]
set13 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set13_pre1
affe_coeff_set13_pre1[14:8]
set13 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set13_pre2
affe_coeff_set13_pre2[6:0]
set13 of affe coeff pre2

Reset: hex:0x00;

Back to AddressMap

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+0x000007cc Register(32 bit) affe_lms_set14
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7cc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set14_post2 - affe_coeff_set14_post1 - affe_coeff_set14_pre1 - affe_coeff_set14_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set14_post2
affe_coeff_set14_post2[30:24]
set14 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set14_post1
affe_coeff_set14_post1[22:16]
set14 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set14_pre1
affe_coeff_set14_pre1[14:8]
set14 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set14_pre2
affe_coeff_set14_pre2[6:0]
set14 of affe coeff pre2

Reset: hex:0x00;

Back to AddressMap

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+0x000007d0 Register(32 bit) affe_lms_set15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7d0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x80808080
Undefined 0x80808080

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
Name - affe_coeff_set15_post2 - affe_coeff_set15_post1 - affe_coeff_set15_pre1 - affe_coeff_set15_pre2
Access - RW/V - RW/V - RW/V - RW/V

[30:24]
RW/V

affe_coeff_set15_post2
affe_coeff_set15_post2[30:24]
set15 of affe coeff post2

Reset: hex:0x00;

[22:16]
RW/V

affe_coeff_set15_post1
affe_coeff_set15_post1[22:16]
set15 of affe coeff post1

Reset: hex:0x00;

[14:08]
RW/V

affe_coeff_set15_pre1
affe_coeff_set15_pre1[14:8]
set15 of affe coeff pre1

Reset: hex:0x00;

[06:00]
RW/V

affe_coeff_set15_pre2
affe_coeff_set15_pre2[6:0]
set15 of affe coeff pre2

Reset: hex:0x00;

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+0x000007d4 Register(32 bit) affe_lms_frac_set0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7d4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set0_frac_post2 affe_coeff_set0_frac_post1 affe_coeff_set0_frac_pre1 affe_coeff_set0_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set0_frac_post2
affe_coeff_set0_frac_post2[31:24]
set0 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set0_frac_post1
affe_coeff_set0_frac_post1[23:16]
set0 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set0_frac_pre1
affe_coeff_set0_frac_pre1[15:8]
set0 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set0_frac_pre2
affe_coeff_set0_frac_pre2[7:0]
set0 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x000007d8 Register(32 bit) affe_lms_frac_set1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7d8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set1_frac_post2 affe_coeff_set1_frac_post1 affe_coeff_set1_frac_pre1 affe_coeff_set1_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set1_frac_post2
affe_coeff_set1_frac_post2[31:24]
set1 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set1_frac_post1
affe_coeff_set1_frac_post1[23:16]
set1 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set1_frac_pre1
affe_coeff_set1_frac_pre1[15:8]
set1 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set1_frac_pre2
affe_coeff_set1_frac_pre2[7:0]
set1 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x000007dc Register(32 bit) affe_lms_frac_set2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7dc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set2_frac_post2 affe_coeff_set2_frac_post1 affe_coeff_set2_frac_pre1 affe_coeff_set2_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set2_frac_post2
affe_coeff_set2_frac_post2[31:24]
set2 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set2_frac_post1
affe_coeff_set2_frac_post1[23:16]
set2 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set2_frac_pre1
affe_coeff_set2_frac_pre1[15:8]
set2 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set2_frac_pre2
affe_coeff_set2_frac_pre2[7:0]
set2 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x000007e0 Register(32 bit) affe_lms_frac_set3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7e0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set3_frac_post2 affe_coeff_set3_frac_post1 affe_coeff_set3_frac_pre1 affe_coeff_set3_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set3_frac_post2
affe_coeff_set3_frac_post2[31:24]
set3 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set3_frac_post1
affe_coeff_set3_frac_post1[23:16]
set3 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set3_frac_pre1
affe_coeff_set3_frac_pre1[15:8]
set3 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set3_frac_pre2
affe_coeff_set3_frac_pre2[7:0]
set3 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x000007e4 Register(32 bit) affe_lms_frac_set4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7e4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set4_frac_post2 affe_coeff_set4_frac_post1 affe_coeff_set4_frac_pre1 affe_coeff_set4_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set4_frac_post2
affe_coeff_set4_frac_post2[31:24]
set4 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set4_frac_post1
affe_coeff_set4_frac_post1[23:16]
set4 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set4_frac_pre1
affe_coeff_set4_frac_pre1[15:8]
set4 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set4_frac_pre2
affe_coeff_set4_frac_pre2[7:0]
set4 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x000007e8 Register(32 bit) affe_lms_frac_set5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7e8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set5_frac_post2 affe_coeff_set5_frac_post1 affe_coeff_set5_frac_pre1 affe_coeff_set5_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set5_frac_post2
affe_coeff_set5_frac_post2[31:24]
set5 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set5_frac_post1
affe_coeff_set5_frac_post1[23:16]
set5 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set5_frac_pre1
affe_coeff_set5_frac_pre1[15:8]
set5 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set5_frac_pre2
affe_coeff_set5_frac_pre2[7:0]
set5 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x000007ec Register(32 bit) affe_lms_frac_set6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7ec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set6_frac_post2 affe_coeff_set6_frac_post1 affe_coeff_set6_frac_pre1 affe_coeff_set6_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set6_frac_post2
affe_coeff_set6_frac_post2[31:24]
set6 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set6_frac_post1
affe_coeff_set6_frac_post1[23:16]
set6 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set6_frac_pre1
affe_coeff_set6_frac_pre1[15:8]
set6 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set6_frac_pre2
affe_coeff_set6_frac_pre2[7:0]
set6 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x000007f0 Register(32 bit) affe_lms_frac_set7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7f0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set7_frac_post2 affe_coeff_set7_frac_post1 affe_coeff_set7_frac_pre1 affe_coeff_set7_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set7_frac_post2
affe_coeff_set7_frac_post2[31:24]
set7 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set7_frac_post1
affe_coeff_set7_frac_post1[23:16]
set7 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set7_frac_pre1
affe_coeff_set7_frac_pre1[15:8]
set7 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set7_frac_pre2
affe_coeff_set7_frac_pre2[7:0]
set7 of affe fractional coeff pre2

Reset: hex:0x00;

Back to AddressMap

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+0x000007f4 Register(32 bit) affe_lms_frac_set8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7f4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set8_frac_post2 affe_coeff_set8_frac_post1 affe_coeff_set8_frac_pre1 affe_coeff_set8_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set8_frac_post2
affe_coeff_set8_frac_post2[31:24]
set8 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set8_frac_post1
affe_coeff_set8_frac_post1[23:16]
set8 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set8_frac_pre1
affe_coeff_set8_frac_pre1[15:8]
set8 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set8_frac_pre2
affe_coeff_set8_frac_pre2[7:0]
set8 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x000007f8 Register(32 bit) affe_lms_frac_set9
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7f8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set9_frac_post2 affe_coeff_set9_frac_post1 affe_coeff_set9_frac_pre1 affe_coeff_set9_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set9_frac_post2
affe_coeff_set9_frac_post2[31:24]
set9 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set9_frac_post1
affe_coeff_set9_frac_post1[23:16]
set9 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set9_frac_pre1
affe_coeff_set9_frac_pre1[15:8]
set9 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set9_frac_pre2
affe_coeff_set9_frac_pre2[7:0]
set9 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x000007fc Register(32 bit) affe_lms_frac_set10
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a7fc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set10_frac_post2 affe_coeff_set10_frac_post1 affe_coeff_set10_frac_pre1 affe_coeff_set10_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set10_frac_post2
affe_coeff_set10_frac_post2[31:24]
set10 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set10_frac_post1
affe_coeff_set10_frac_post1[23:16]
set10 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set10_frac_pre1
affe_coeff_set10_frac_pre1[15:8]
set10 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set10_frac_pre2
affe_coeff_set10_frac_pre2[7:0]
set10 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x00000800 Register(32 bit) affe_lms_frac_set11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a800 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set11_frac_post2 affe_coeff_set11_frac_post1 affe_coeff_set11_frac_pre1 affe_coeff_set11_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set11_frac_post2
affe_coeff_set11_frac_post2[31:24]
set11 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set11_frac_post1
affe_coeff_set11_frac_post1[23:16]
set11 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set11_frac_pre1
affe_coeff_set11_frac_pre1[15:8]
set11 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set11_frac_pre2
affe_coeff_set11_frac_pre2[7:0]
set11 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x00000804 Register(32 bit) affe_lms_frac_set12
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a804 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set12_frac_post2 affe_coeff_set12_frac_post1 affe_coeff_set12_frac_pre1 affe_coeff_set12_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set12_frac_post2
affe_coeff_set12_frac_post2[31:24]
set12 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set12_frac_post1
affe_coeff_set12_frac_post1[23:16]
set12 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set12_frac_pre1
affe_coeff_set12_frac_pre1[15:8]
set12 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set12_frac_pre2
affe_coeff_set12_frac_pre2[7:0]
set12 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x00000808 Register(32 bit) affe_lms_frac_set13
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a808 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set13_frac_post2 affe_coeff_set13_frac_post1 affe_coeff_set13_frac_pre1 affe_coeff_set13_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set13_frac_post2
affe_coeff_set13_frac_post2[31:24]
set13 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set13_frac_post1
affe_coeff_set13_frac_post1[23:16]
set13 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set13_frac_pre1
affe_coeff_set13_frac_pre1[15:8]
set13 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set13_frac_pre2
affe_coeff_set13_frac_pre2[7:0]
set13 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x0000080c Register(32 bit) affe_lms_frac_set14
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a80c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set14_frac_post2 affe_coeff_set14_frac_post1 affe_coeff_set14_frac_pre1 affe_coeff_set14_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set14_frac_post2
affe_coeff_set14_frac_post2[31:24]
set14 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set14_frac_post1
affe_coeff_set14_frac_post1[23:16]
set14 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set14_frac_pre1
affe_coeff_set14_frac_pre1[15:8]
set14 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set14_frac_pre2
affe_coeff_set14_frac_pre2[7:0]
set14 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x00000810 Register(32 bit) affe_lms_frac_set15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a810 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name affe_coeff_set15_frac_post2 affe_coeff_set15_frac_post1 affe_coeff_set15_frac_pre1 affe_coeff_set15_frac_pre2
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

affe_coeff_set15_frac_post2
affe_coeff_set15_frac_post2[31:24]
set15 of affe fractional coeff post2

Reset: hex:0x00;

[23:16]
RW/V

affe_coeff_set15_frac_post1
affe_coeff_set15_frac_post1[23:16]
set15 of affe fractional coeff post1

Reset: hex:0x00;

[15:08]
RW/V

affe_coeff_set15_frac_pre1
affe_coeff_set15_frac_pre1[15:8]
set15 of affe fractional coeff pre1

Reset: hex:0x00;

[07:00]
RW/V

affe_coeff_set15_frac_pre2
affe_coeff_set15_frac_pre2[7:0]
set15 of affe fractional coeff pre2

Reset: hex:0x00;

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+0x00000814 Register(32 bit) saturation_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a814 at NOC.jesd__axi (Mem)

Access RO/C/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_bankC_float3_sat ffe_bankC_float2_sat ffe_bankC_float1_sat ffe_bankB_float3_sat ffe_bankB_float2_sat ffe_bankB_float1_sat ffe_bankA_float3_sat ffe_bankA_float2_sat ffe_bankA_float1_sat ffe_post_12_sat ffe_post_11_sat ffe_post_10_sat ffe_post_9_sat ffe_post_8_sat ffe_post_7_sat ffe_post_6_sat ffe_post_5_sat ffe_post_4_sat ffe_post_3_sat ffe_post_2_sat ffe_post_1_sat ffe_pre_1_sat ffe_pre_2_sat ffe_pre_3_sat vref_adc_3_sat vref_adc_2_sat vref_adc_1_sat vref_adc_0_sat vref_ffe_3_sat vref_ffe_2_sat vref_ffe_1_sat vref_ffe_0_sat
Access RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V

[31:31]
RO/C/V

ffe_bankC_float3_sat
ffe_bankC_float3_sat[31:31]
FFE BankC float3 saturated

Reset: hex:0x0;

[30:30]
RO/C/V

ffe_bankC_float2_sat
ffe_bankC_float2_sat[30:30]
FFE BankC float2 saturated

Reset: hex:0x0;

[29:29]
RO/C/V

ffe_bankC_float1_sat
ffe_bankC_float1_sat[29:29]
FFE BankC float1 saturated

Reset: hex:0x0;

[28:28]
RO/C/V

ffe_bankB_float3_sat
ffe_bankB_float3_sat[28:28]
FFE BankB float3 saturated

Reset: hex:0x0;

[27:27]
RO/C/V

ffe_bankB_float2_sat
ffe_bankB_float2_sat[27:27]
FFE BankB float2 saturated

Reset: hex:0x0;

[26:26]
RO/C/V

ffe_bankB_float1_sat
ffe_bankB_float1_sat[26:26]
FFE BankB float1 saturated

Reset: hex:0x0;

[25:25]
RO/C/V

ffe_bankA_float3_sat
ffe_bankA_float3_sat[25:25]
FFE BankA float3 saturated

Reset: hex:0x0;

[24:24]
RO/C/V

ffe_bankA_float2_sat
ffe_bankA_float2_sat[24:24]
FFE BankA float2 saturated

Reset: hex:0x0;

[23:23]
RO/C/V

ffe_bankA_float1_sat
ffe_bankA_float1_sat[23:23]
FFE BankA float1 saturated

Reset: hex:0x0;

[22:22]
RO/C/V

ffe_post_12_sat
ffe_post_12_sat[22:22]
FFE POST12 saturated

Reset: hex:0x0;

[21:21]
RO/C/V

ffe_post_11_sat
ffe_post_11_sat[21:21]
FFE POST11 saturated

Reset: hex:0x0;

[20:20]
RO/C/V

ffe_post_10_sat
ffe_post_10_sat[20:20]
FFE POST10 saturated

Reset: hex:0x0;

[19:19]
RO/C/V

ffe_post_9_sat
ffe_post_9_sat[19:19]
FFE POST9 saturated

Reset: hex:0x0;

[18:18]
RO/C/V

ffe_post_8_sat
ffe_post_8_sat[18:18]
FFE POST8 saturated

Reset: hex:0x0;

[17:17]
RO/C/V

ffe_post_7_sat
ffe_post_7_sat[17:17]
FFE POST7 saturated

Reset: hex:0x0;

[16:16]
RO/C/V

ffe_post_6_sat
ffe_post_6_sat[16:16]
FFE POST6 saturated

Reset: hex:0x0;

[15:15]
RO/C/V

ffe_post_5_sat
ffe_post_5_sat[15:15]
FFE POST5 saturated

Reset: hex:0x0;

[14:14]
RO/C/V

ffe_post_4_sat
ffe_post_4_sat[14:14]
FFE POST4 saturated

Reset: hex:0x0;

[13:13]
RO/C/V

ffe_post_3_sat
ffe_post_3_sat[13:13]
FFE POST3 saturated

Reset: hex:0x0;

[12:12]
RO/C/V

ffe_post_2_sat
ffe_post_2_sat[12:12]
FFE POST2 saturated

Reset: hex:0x0;

[11:11]
RO/C/V

ffe_post_1_sat
ffe_post_1_sat[11:11]
FFE POST1 saturated

Reset: hex:0x0;

[10:10]
RO/C/V

ffe_pre_1_sat
ffe_pre_1_sat[10:10]
FFE PRE1 saturated

Reset: hex:0x0;

[09:09]
RO/C/V

ffe_pre_2_sat
ffe_pre_2_sat[9:9]
FFE PRE2 saturated

Reset: hex:0x0;

[08:08]
RO/C/V

ffe_pre_3_sat
ffe_pre_3_sat[8:8]
FFE PRE3 saturated

Reset: hex:0x0;

[07:07]
RO/C/V

vref_adc_3_sat
vref_adc_3_sat[7:7]
VREF3 ADC saturated

Reset: hex:0x0;

[06:06]
RO/C/V

vref_adc_2_sat
vref_adc_2_sat[6:6]
VREF2 ADC saturated

Reset: hex:0x0;

[05:05]
RO/C/V

vref_adc_1_sat
vref_adc_1_sat[5:5]
VREF1 ADC saturated

Reset: hex:0x0;

[04:04]
RO/C/V

vref_adc_0_sat
vref_adc_0_sat[4:4]
VREF0 ADC saturated

Reset: hex:0x0;

[03:03]
RO/C/V

vref_ffe_3_sat
vref_ffe_3_sat[3:3]
VREF3 FFE saturated

Reset: hex:0x0;

[02:02]
RO/C/V

vref_ffe_2_sat
vref_ffe_2_sat[2:2]
VREF2 FFE saturated

Reset: hex:0x0;

[01:01]
RO/C/V

vref_ffe_1_sat
vref_ffe_1_sat[1:1]
VREF1 FFE saturated

Reset: hex:0x0;

[00:00]
RO/C/V

vref_ffe_0_sat
vref_ffe_0_sat[0:0]
VREF0 FFE saturated

Reset: hex:0x0;

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+0x00000818 Register(32 bit) saturation_status_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a818 at NOC.jesd__axi (Mem)

Access RO/C/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffff00
Undefined 0xffffff00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0
Name - ops_taps_7_sat ops_taps_6_sat ops_taps_5_sat ops_taps_4_sat ops_taps_3_sat ops_taps_2_sat ops_taps_1_sat ops_taps_0_sat
Access - RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V

[07:07]
RO/C/V

ops_taps_7_sat
ops_taps_7_sat[7:7]
OPS taps 7 saturated

Reset: hex:0x0;

[06:06]
RO/C/V

ops_taps_6_sat
ops_taps_6_sat[6:6]
OPS taps 6 saturated

Reset: hex:0x0;

[05:05]
RO/C/V

ops_taps_5_sat
ops_taps_5_sat[5:5]
OPS taps 5 saturated

Reset: hex:0x0;

[04:04]
RO/C/V

ops_taps_4_sat
ops_taps_4_sat[4:4]
OPS taps 4 saturated

Reset: hex:0x0;

[03:03]
RO/C/V

ops_taps_3_sat
ops_taps_3_sat[3:3]
OPS taps 3 saturated

Reset: hex:0x0;

[02:02]
RO/C/V

ops_taps_2_sat
ops_taps_2_sat[2:2]
OPS taps 2 saturated

Reset: hex:0x0;

[01:01]
RO/C/V

ops_taps_1_sat
ops_taps_1_sat[1:1]
OPS taps 1 saturated

Reset: hex:0x0;

[00:00]
RO/C/V

ops_taps_0_sat
ops_taps_0_sat[0:0]
OPS taps 0 saturated

Reset: hex:0x0;

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+0x00000820 Register(32 bit) saturation_status_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a820 at NOC.jesd__axi (Mem)

Access RO/C/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0x08000000
Undefined 0x08000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_vref_3_sat cdr_ffe_vref_2_sat cdr_ffe_vref_1_sat cdr_ffe_vref_0_sat - cdr_ffe_ofc_lol_sat cdr_ffe_ofc_lor_sat cdr_ffe_ofc_zrl_sat cdr_ffe_ofc_zrr_sat cdr_ffe_ofc_hil_sat cdr_ffe_ofc_hir_sat dfe_sat ofc_lol_sat ofc_lor_sat ofc_zrl_sat ofc_zrr_sat ofc_hil_sat ofc_hir_sat adcofc_lol_sat adcofc_lor_sat adcofc_zrl_sat adcofc_zrr_sat adcofc_hil_sat adcofc_hir_sat vga_tap_sat affe_post2_sat affe_post1_sat affe_pre1_sat affe_pre2_sat edgvref_lo_sat edgvref_zr_sat edgvref_hi_sat
Access RO/C/V RO/C/V RO/C/V RO/C/V - RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V

[31:31]
RO/C/V

cdr_ffe_vref_3_sat
cdr_ffe_vref_3_sat[31:31]
CDR_FFE_VREF 3 saturated

Reset: hex:0x0;

[30:30]
RO/C/V

cdr_ffe_vref_2_sat
cdr_ffe_vref_2_sat[30:30]
CDR_FFE_VREF 2 saturated

Reset: hex:0x0;

[29:29]
RO/C/V

cdr_ffe_vref_1_sat
cdr_ffe_vref_1_sat[29:29]
CDR_FFE_VREF 1 saturated

Reset: hex:0x0;

[28:28]
RO/C/V

cdr_ffe_vref_0_sat
cdr_ffe_vref_0_sat[28:28]
CDR_FFE_VREF 0 saturated

Reset: hex:0x0;

[26:26]
RO/C/V

cdr_ffe_ofc_lol_sat
cdr_ffe_ofc_lol_sat[26:26]
CDR_FFE_OFC Lo left saturated

Reset: hex:0x0;

[25:25]
RO/C/V

cdr_ffe_ofc_lor_sat
cdr_ffe_ofc_lor_sat[25:25]
CDR_FFE_OFC Lo right saturated

Reset: hex:0x0;

[24:24]
RO/C/V

cdr_ffe_ofc_zrl_sat
cdr_ffe_ofc_zrl_sat[24:24]
CDR_FFE_OFC Zr left saturated

Reset: hex:0x0;

[23:23]
RO/C/V

cdr_ffe_ofc_zrr_sat
cdr_ffe_ofc_zrr_sat[23:23]
CDR_FFE_OFC Zr right saturated

Reset: hex:0x0;

[22:22]
RO/C/V

cdr_ffe_ofc_hil_sat
cdr_ffe_ofc_hil_sat[22:22]
CDR_FFE_OFC Hi left saturated

Reset: hex:0x0;

[21:21]
RO/C/V

cdr_ffe_ofc_hir_sat
cdr_ffe_ofc_hir_sat[21:21]
CDR_FFE_OFC Hi right saturated

Reset: hex:0x0;

[20:20]
RO/C/V

dfe_sat
dfe_sat[20:20]
DFE Tap saturated

Reset: hex:0x0;

[19:19]
RO/C/V

ofc_lol_sat
ofc_lol_sat[19:19]
OFC Lo left saturated

Reset: hex:0x0;

[18:18]
RO/C/V

ofc_lor_sat
ofc_lor_sat[18:18]
OFC Lo right saturated

Reset: hex:0x0;

[17:17]
RO/C/V

ofc_zrl_sat
ofc_zrl_sat[17:17]
OFC Zr left saturated

Reset: hex:0x0;

[16:16]
RO/C/V

ofc_zrr_sat
ofc_zrr_sat[16:16]
OFC Zr right saturated

Reset: hex:0x0;

[15:15]
RO/C/V

ofc_hil_sat
ofc_hil_sat[15:15]
OFC Hi left saturated

Reset: hex:0x0;

[14:14]
RO/C/V

ofc_hir_sat
ofc_hir_sat[14:14]
OFC Hi right saturated

Reset: hex:0x0;

[13:13]
RO/C/V

adcofc_lol_sat
adcofc_lol_sat[13:13]
ADCOFC Lo left saturated

Reset: hex:0x0;

[12:12]
RO/C/V

adcofc_lor_sat
adcofc_lor_sat[12:12]
ADCOFC Lo right saturated

Reset: hex:0x0;

[11:11]
RO/C/V

adcofc_zrl_sat
adcofc_zrl_sat[11:11]
ADCOFC Zr left saturated

Reset: hex:0x0;

[10:10]
RO/C/V

adcofc_zrr_sat
adcofc_zrr_sat[10:10]
ADCOFC Zr right saturated

Reset: hex:0x0;

[09:09]
RO/C/V

adcofc_hil_sat
adcofc_hil_sat[9:9]
ADCOFC Hi left saturated

Reset: hex:0x0;

[08:08]
RO/C/V

adcofc_hir_sat
adcofc_hir_sat[8:8]
ADCOFC Hi right saturated

Reset: hex:0x0;

[07:07]
RO/C/V

vga_tap_sat
vga_tap_sat[7:7]
VGA TAP saturated

Reset: hex:0x0;

[06:06]
RO/C/V

affe_post2_sat
affe_post2_sat[6:6]
AFFE POST2 saturated

Reset: hex:0x0;

[05:05]
RO/C/V

affe_post1_sat
affe_post1_sat[5:5]
AFFE POST1 saturated

Reset: hex:0x0;

[04:04]
RO/C/V

affe_pre1_sat
affe_pre1_sat[4:4]
AFFE PRE1 saturated

Reset: hex:0x0;

[03:03]
RO/C/V

affe_pre2_sat
affe_pre2_sat[3:3]
AFFE PRE2 saturated

Reset: hex:0x0;

[02:02]
RO/C/V

edgvref_lo_sat
edgvref_lo_sat[2:2]
edgvref lo saturated

Reset: hex:0x0;

[01:01]
RO/C/V

edgvref_zr_sat
edgvref_zr_sat[1:1]
edgvref zr saturated

Reset: hex:0x0;

[00:00]
RO/C/V

edgvref_hi_sat
edgvref_hi_sat[0:0]
edgvref hi saturated

Reset: hex:0x0;

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+0x00000824 Register(32 bit) zeroavg_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a824 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ffe_bankC_float3_zeroavg ffe_bankC_float2_zeroavg ffe_bankC_float1_zeroavg ffe_bankB_float3_zeroavg ffe_bankB_float2_zeroavg ffe_bankB_float1_zeroavg ffe_bankA_float3_zeroavg ffe_bankA_float2_zeroavg ffe_bankA_float1_zeroavg ffe_post_12_zeroavg ffe_post_11_zeroavg ffe_post_10_zeroavg ffe_post_9_zeroavg ffe_post_8_zeroavg ffe_post_7_zeroavg ffe_post_6_zeroavg ffe_post_5_zeroavg ffe_post_4_zeroavg ffe_post_3_zeroavg ffe_post_2_zeroavg ffe_post_1_zeroavg ffe_pre_1_zeroavg ffe_pre_2_zeroavg ffe_pre_3_zeroavg vref_adc_3_zeroavg vref_adc_2_zeroavg vref_adc_1_zeroavg vref_adc_0_zeroavg vref_ffe_3_zeroavg vref_ffe_2_zeroavg vref_ffe_1_zeroavg vref_ffe_0_zeroavg
Access RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V

[31:31]
RO/V

ffe_bankC_float3_zeroavg
ffe_bankC_float3_zeroavg[31:31]
FFE BankC float3 AVG counter is zero

Reset: hex:0x0;

[30:30]
RO/V

ffe_bankC_float2_zeroavg
ffe_bankC_float2_zeroavg[30:30]
FFE BankC float2 AVG counter is zero

Reset: hex:0x0;

[29:29]
RO/V

ffe_bankC_float1_zeroavg
ffe_bankC_float1_zeroavg[29:29]
FFE BankC float1 AVG counter is zero

Reset: hex:0x0;

[28:28]
RO/V

ffe_bankB_float3_zeroavg
ffe_bankB_float3_zeroavg[28:28]
FFE BankB float3 AVG counter is zero

Reset: hex:0x0;

[27:27]
RO/V

ffe_bankB_float2_zeroavg
ffe_bankB_float2_zeroavg[27:27]
FFE BankB float2 AVG counter is zero

Reset: hex:0x0;

[26:26]
RO/V

ffe_bankB_float1_zeroavg
ffe_bankB_float1_zeroavg[26:26]
FFE BankB float1 AVG counter is zero

Reset: hex:0x0;

[25:25]
RO/V

ffe_bankA_float3_zeroavg
ffe_bankA_float3_zeroavg[25:25]
FFE BankA float3 AVG counter is zero

Reset: hex:0x0;

[24:24]
RO/V

ffe_bankA_float2_zeroavg
ffe_bankA_float2_zeroavg[24:24]
FFE BankA float2 AVG counter is zero

Reset: hex:0x0;

[23:23]
RO/V

ffe_bankA_float1_zeroavg
ffe_bankA_float1_zeroavg[23:23]
FFE BankA float1 AVG counter is zero

Reset: hex:0x0;

[22:22]
RO/V

ffe_post_12_zeroavg
ffe_post_12_zeroavg[22:22]
FFE POST12 AVG counter is zero

Reset: hex:0x0;

[21:21]
RO/V

ffe_post_11_zeroavg
ffe_post_11_zeroavg[21:21]
FFE POST11 AVG counter is zero

Reset: hex:0x0;

[20:20]
RO/V

ffe_post_10_zeroavg
ffe_post_10_zeroavg[20:20]
FFE POST10 AVG counter is zero

Reset: hex:0x0;

[19:19]
RO/V

ffe_post_9_zeroavg
ffe_post_9_zeroavg[19:19]
FFE POST9 AVG counter is zero

Reset: hex:0x0;

[18:18]
RO/V

ffe_post_8_zeroavg
ffe_post_8_zeroavg[18:18]
FFE POST8 AVG counter is zero

Reset: hex:0x0;

[17:17]
RO/V

ffe_post_7_zeroavg
ffe_post_7_zeroavg[17:17]
FFE POST7 AVG counter is zero

Reset: hex:0x0;

[16:16]
RO/V

ffe_post_6_zeroavg
ffe_post_6_zeroavg[16:16]
FFE POST6 AVG counter is zero

Reset: hex:0x0;

[15:15]
RO/V

ffe_post_5_zeroavg
ffe_post_5_zeroavg[15:15]
FFE POST5 AVG counter is zero

Reset: hex:0x0;

[14:14]
RO/V

ffe_post_4_zeroavg
ffe_post_4_zeroavg[14:14]
FFE POST4 AVG counter is zero

Reset: hex:0x0;

[13:13]
RO/V

ffe_post_3_zeroavg
ffe_post_3_zeroavg[13:13]
FFE POST3 AVG counter is zero

Reset: hex:0x0;

[12:12]
RO/V

ffe_post_2_zeroavg
ffe_post_2_zeroavg[12:12]
FFE POST2 AVG counter is zero

Reset: hex:0x0;

[11:11]
RO/V

ffe_post_1_zeroavg
ffe_post_1_zeroavg[11:11]
FFE POST1 AVG counter is zero

Reset: hex:0x0;

[10:10]
RO/V

ffe_pre_1_zeroavg
ffe_pre_1_zeroavg[10:10]
FFE PRE1 AVG counter is zero

Reset: hex:0x0;

[09:09]
RO/V

ffe_pre_2_zeroavg
ffe_pre_2_zeroavg[9:9]
FFE PRE2 AVG counter is zero

Reset: hex:0x0;

[08:08]
RO/V

ffe_pre_3_zeroavg
ffe_pre_3_zeroavg[8:8]
FFE PRE3 AVG counter is zero

Reset: hex:0x0;

[07:07]
RO/V

vref_adc_3_zeroavg
vref_adc_3_zeroavg[7:7]
VREF3 ADC AVG counter is zero

Reset: hex:0x0;

[06:06]
RO/V

vref_adc_2_zeroavg
vref_adc_2_zeroavg[6:6]
VREF2 ADC AVG counter is zero

Reset: hex:0x0;

[05:05]
RO/V

vref_adc_1_zeroavg
vref_adc_1_zeroavg[5:5]
VREF1 ADC AVG counter is zero

Reset: hex:0x0;

[04:04]
RO/V

vref_adc_0_zeroavg
vref_adc_0_zeroavg[4:4]
VREF0 ADC AVG counter is zero

Reset: hex:0x0;

[03:03]
RO/V

vref_ffe_3_zeroavg
vref_ffe_3_zeroavg[3:3]
VREF3 FFE AVG counter is zero

Reset: hex:0x0;

[02:02]
RO/V

vref_ffe_2_zeroavg
vref_ffe_2_zeroavg[2:2]
VREF2 FFE AVG counter is zero

Reset: hex:0x0;

[01:01]
RO/V

vref_ffe_1_zeroavg
vref_ffe_1_zeroavg[1:1]
VREF1 FFE AVG counter is zero

Reset: hex:0x0;

[00:00]
RO/V

vref_ffe_0_zeroavg
vref_ffe_0_zeroavg[0:0]
VREF0 FFE AVG counter is zero

Reset: hex:0x0;

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+0x00000828 Register(32 bit) zeroavg_status_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a828 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffff00
Undefined 0xffffff00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0
Name - ops_taps_zeroavg
Access - RO/V

[07:00]
RO/V

ops_taps_zeroavg
ops_taps_zeroavg[7:0]
OPS taps [7:0] AVG counter is zero

Reset: hex:0x00;

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+0x00000830 Register(32 bit) zeroavg_status_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a830 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfff00000
Undefined 0xfff00000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - dfe_zeroavg cdr_ffe_zeroavg cdr_ffe_vref_zeroavg vga_tap_zeroavg affe_post2_zeroavg affe_post1_zeroavg affe_pre1_zeroavg affe_pre2_zeroavg edgvref_lo_zeroavg edgvref_zr_zeroavg edgvref_hi_zeroavg
Access - RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V RO/V

[19:19]
RO/V

dfe_zeroavg
dfe_zeroavg[19:19]
DFE Tap AVG counter is zero

Reset: hex:0x0;

[18:12]
RO/V

cdr_ffe_zeroavg
cdr_ffe_zeroavg[18:12]
CDR FFE AVG counter is zero

Reset: hex:0x00;

[11:08]
RO/V

cdr_ffe_vref_zeroavg
cdr_ffe_vref_zeroavg[11:8]
CDR FFE VREF AVG counter is zero

Reset: hex:0x0;

[07:07]
RO/V

vga_tap_zeroavg
vga_tap_zeroavg[7:7]
VGA TAP AVG counter is zero

Reset: hex:0x0;

[06:06]
RO/V

affe_post2_zeroavg
affe_post2_zeroavg[6:6]
AFFE POST2 AVG counter is zero

Reset: hex:0x0;

[05:05]
RO/V

affe_post1_zeroavg
affe_post1_zeroavg[5:5]
AFFE POST1 AVG counter is zero

Reset: hex:0x0;

[04:04]
RO/V

affe_pre1_zeroavg
affe_pre1_zeroavg[4:4]
AFFE PRE1 AVG counter is zero

Reset: hex:0x0;

[03:03]
RO/V

affe_pre2_zeroavg
affe_pre2_zeroavg[3:3]
AFFE PRE2 AVG counter is zero

Reset: hex:0x0;

[02:02]
RO/V

edgvref_lo_zeroavg
edgvref_lo_zeroavg[2:2]
edgvref Lo AVG counter is zero

Reset: hex:0x0;

[01:01]
RO/V

edgvref_zr_zeroavg
edgvref_zr_zeroavg[1:1]
edgvref zr AVG counter is zero

Reset: hex:0x0;

[00:00]
RO/V

edgvref_hi_zeroavg
edgvref_hi_zeroavg[0:0]
edgvref hi AVG counter is zero

Reset: hex:0x0;

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+0x00000834 Register(32 bit) adcofc_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a834 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010020
Unaffected 0xf0380000
Undefined 0xf0380000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 - - - 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
Name - adcofc_hold_en - adcofc_stats_max adcofc_timer_max adcofc_updn_inv_cb
Access - RW - RW RW RW

[27:22]
RW

adcofc_hold_en
adcofc_hold_en[27:22]
Hold adcofc taps accumulators

Reset: hex:0x00;

[18:09]
RW

adcofc_stats_max
adcofc_stats_max[18:9]
adcofc stats counter threshold

Reset: hex:0x080;

[08:01]
RW

adcofc_timer_max
adcofc_timer_max[8:1]
adcofc delay timer threshold

Reset: hex:0x10;

[00:00]
RW

adcofc_updn_inv_cb
adcofc_updn_inv_cb[0:0]
Chicken bit to invert up/down

Reset: hex:0x0;

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+0x00000838 Register(32 bit) adcofc_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a838 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00002d2d
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 1 0 1 1 0 1 - - 1 0 1 1 0 1
Name - adcofc_init_val_3 - adcofc_init_val_2 - adcofc_init_val_1 - adcofc_init_val_0
Access - RW - RW - RW - RW

[29:24]
RW

adcofc_init_val_3
adcofc_init_val_3[29:24]
Initial value for adcofc_3 coeff

Reset: hex:0x00;

[21:16]
RW

adcofc_init_val_2
adcofc_init_val_2[21:16]
Initial value for adcofc_2 coeff

Reset: hex:0x00;

[13:08]
RW

adcofc_init_val_1
adcofc_init_val_1[13:8]
Initial value for adcofc_1 coeff

Reset: hex:0x2d;

[05:00]
RW

adcofc_init_val_0
adcofc_init_val_0[5:0]
Initial value for adcofc_0 coeff

Reset: hex:0x2d;

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+0x0000083c Register(32 bit) adcofc_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a83c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x4d310410
Unaffected 0x000e0000
Undefined 0x000e0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 1 0 0 1 1 0 1 0 0 1 1 - - - 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
Name adcofc_init_val_5 adcofc_init_val_4 - adcofc_coarse_mu_en adcofc_mu_fine adcofc_mu_coarse
Access RW RW - RW RW RW

[31:26]
RW

adcofc_init_val_5
adcofc_init_val_5[31:26]
Initial value for adcofc_5 coeff

Reset: hex:0x13;

[25:20]
RW

adcofc_init_val_4
adcofc_init_val_4[25:20]
Initial value for adcofc_4 coeff

Reset: hex:0x13;

[16:16]
RW

adcofc_coarse_mu_en
adcofc_coarse_mu_en[16:16]
Select between coarse and fine update gains

Reset: hex:0x1;

[15:08]
RW

adcofc_mu_fine
adcofc_mu_fine[15:8]
Update adcofc gain fine value

Reset: hex:0x04;

[07:00]
RW

adcofc_mu_coarse
adcofc_mu_coarse[7:0]
Update adcofc gain coarse value

Reset: hex:0x10;

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+0x00000840 Register(32 bit) adcofc_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a840 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000081f
Unaffected 0xfffff000
Undefined 0xfffff000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - 1 0 0 0 0 0 0 1 1 1 1 1
Name - adcofc_tap_min adcofc_tap_max
Access - RW RW

[11:06]
RW

adcofc_tap_min
adcofc_tap_min[11:6]
update adcofc accum saturation at min width

Reset: hex:0x20;

[05:00]
RW

adcofc_tap_max
adcofc_tap_max[5:0]
update adcofc accum saturation at max width

Reset: hex:0x1f;

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+0x00000844 Register(32 bit) adcofc_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a844 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - adcofc_tap_zr - adcofc_tap_lo - adcofc_tap_hi
Access - RO/V - RO/V - RO/V

[21:16]
RO/V

adcofc_tap_zr
adcofc_tap_zr[21:16]
adcofc tap_zero

Reset: hex:0x00;

[13:08]
RO/V

adcofc_tap_lo
adcofc_tap_lo[13:8]
adcofc tap_low

Reset: hex:0x00;

[05:00]
RO/V

adcofc_tap_hi
adcofc_tap_hi[5:0]
adcofc tap high

Reset: hex:0x00;

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+0x00000848 Register(32 bit) edg_slice_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a848 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000230
Unaffected 0xffffe000
Undefined 0xffffe000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - 0 0 0 1 0 0 0 1 1 0 0 0 0
Name - edg_slice_inv_err edg_slice_delay_pgm_sel edg_slice_delay_val pd_src_sel edg_slice_level_src_sel
Access - RW RW RW RW RW

[12:12]
RW

edg_slice_inv_err
edg_slice_inv_err[12:12]
Invert edge slicer polarity

Reset: hex:0x0;

[11:11]
RW

edg_slice_delay_pgm_sel
edg_slice_delay_pgm_sel[11:11]
Select software config edg_slice_delay_val as edge slice delay to match different PD parth

Reset: hex:0x0;

[10:04]
RW

edg_slice_delay_val
edg_slice_delay_val[10:4]
Programmable edge slice delay value, range from 0 to 64

Reset: hex:0x23;

[03:02]
RW

pd_src_sel
pd_src_sel[3:2]
CDR phase detector data source selection, 0: FFE slicer, 1: DFE slicer, 2: ADC slicer, 3: CDR FFE slicer

Reset: hex:0x0;

[01:00]
RW

edg_slice_level_src_sel
edg_slice_level_src_sel[1:0]
Edge slicer threshold source selection. 1-from adc path vref, 2-from ffe path vref, 0/3-from edge vref

Reset: hex:0x0;

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+0x0000084c Register(32 bit) edg_slicer_level_set0_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a84c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00300010
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 1 0 0 0 0 - - 0 0 0 0 0 0 - - 0 1 0 0 0 0
Name - edg_slice_level_set0_lo - edg_slice_level_set0_zr - edg_slice_level_set0_hi
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

edg_slice_level_set0_lo
edg_slice_level_set0_lo[21:16]
set0 of edg slicer lo level

Reset: hex:0x30;

[13:08]
RW/V

edg_slice_level_set0_zr
edg_slice_level_set0_zr[13:8]
set0 of edg slicer zr level

Reset: hex:0x00;

[05:00]
RW/V

edg_slice_level_set0_hi
edg_slice_level_set0_hi[5:0]
set0 of edg slicer hi level

Reset: hex:0x10;

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+0x00000850 Register(32 bit) edg_slicer_level_set1_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a850 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00300010
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 1 0 0 0 0 - - 0 0 0 0 0 0 - - 0 1 0 0 0 0
Name - edg_slice_level_set1_lo - edg_slice_level_set1_zr - edg_slice_level_set1_hi
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

edg_slice_level_set1_lo
edg_slice_level_set1_lo[21:16]
set1 of edg slicer lo level

Reset: hex:0x30;

[13:08]
RW/V

edg_slice_level_set1_zr
edg_slice_level_set1_zr[13:8]
set1 of edg slicer zr level

Reset: hex:0x00;

[05:00]
RW/V

edg_slice_level_set1_hi
edg_slice_level_set1_hi[5:0]
set1 of edg slicer hi level

Reset: hex:0x10;

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+0x00000854 Register(32 bit) edg_slicer_level_set2_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a854 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00300010
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 1 0 0 0 0 - - 0 0 0 0 0 0 - - 0 1 0 0 0 0
Name - edg_slice_level_set2_lo - edg_slice_level_set2_zr - edg_slice_level_set2_hi
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

edg_slice_level_set2_lo
edg_slice_level_set2_lo[21:16]
set2 of edg slicer lo level

Reset: hex:0x30;

[13:08]
RW/V

edg_slice_level_set2_zr
edg_slice_level_set2_zr[13:8]
set2 of edg slicer zr level

Reset: hex:0x00;

[05:00]
RW/V

edg_slice_level_set2_hi
edg_slice_level_set2_hi[5:0]
set2 of edg slicer hi level

Reset: hex:0x10;

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+0x00000858 Register(32 bit) edg_slicer_level_set3_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a858 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00300010
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 1 0 0 0 0 - - 0 0 0 0 0 0 - - 0 1 0 0 0 0
Name - edg_slice_level_set3_lo - edg_slice_level_set3_zr - edg_slice_level_set3_hi
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

edg_slice_level_set3_lo
edg_slice_level_set3_lo[21:16]
set3 of edg slicer lo level

Reset: hex:0x30;

[13:08]
RW/V

edg_slice_level_set3_zr
edg_slice_level_set3_zr[13:8]
set3 of edg slicer zr level

Reset: hex:0x00;

[05:00]
RW/V

edg_slice_level_set3_hi
edg_slice_level_set3_hi[5:0]
set3 of edg slicer hi level

Reset: hex:0x10;

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+0x0000085c Register(32 bit) edg_slicer_level_set4_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a85c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00300010
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 1 0 0 0 0 - - 0 0 0 0 0 0 - - 0 1 0 0 0 0
Name - edg_slice_level_set4_lo - edg_slice_level_set4_zr - edg_slice_level_set4_hi
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

edg_slice_level_set4_lo
edg_slice_level_set4_lo[21:16]
set4 of edg slicer lo level

Reset: hex:0x30;

[13:08]
RW/V

edg_slice_level_set4_zr
edg_slice_level_set4_zr[13:8]
set4 of edg slicer zr level

Reset: hex:0x00;

[05:00]
RW/V

edg_slice_level_set4_hi
edg_slice_level_set4_hi[5:0]
set4 of edg slicer hi level

Reset: hex:0x10;

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+0x00000860 Register(32 bit) edg_slicer_level_set5_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a860 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00300010
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 1 0 0 0 0 - - 0 0 0 0 0 0 - - 0 1 0 0 0 0
Name - edg_slice_level_set5_lo - edg_slice_level_set5_zr - edg_slice_level_set5_hi
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

edg_slice_level_set5_lo
edg_slice_level_set5_lo[21:16]
set5 of edg slicer lo level

Reset: hex:0x30;

[13:08]
RW/V

edg_slice_level_set5_zr
edg_slice_level_set5_zr[13:8]
set5 of edg slicer zr level

Reset: hex:0x00;

[05:00]
RW/V

edg_slice_level_set5_hi
edg_slice_level_set5_hi[5:0]
set5 of edg slicer hi level

Reset: hex:0x10;

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+0x00000864 Register(32 bit) edg_slicer_level_set6_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a864 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00300010
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 1 0 0 0 0 - - 0 0 0 0 0 0 - - 0 1 0 0 0 0
Name - edg_slice_level_set6_lo - edg_slice_level_set6_zr - edg_slice_level_set6_hi
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

edg_slice_level_set6_lo
edg_slice_level_set6_lo[21:16]
set6 of edg slicer lo level

Reset: hex:0x30;

[13:08]
RW/V

edg_slice_level_set6_zr
edg_slice_level_set6_zr[13:8]
set6 of edg slicer zr level

Reset: hex:0x00;

[05:00]
RW/V

edg_slice_level_set6_hi
edg_slice_level_set6_hi[5:0]
set6 of edg slicer hi level

Reset: hex:0x10;

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+0x00000868 Register(32 bit) edg_slicer_level_set7_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a868 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00300010
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 1 1 0 0 0 0 - - 0 0 0 0 0 0 - - 0 1 0 0 0 0
Name - edg_slice_level_set7_lo - edg_slice_level_set7_zr - edg_slice_level_set7_hi
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

edg_slice_level_set7_lo
edg_slice_level_set7_lo[21:16]
set7 of edg slicer lo level

Reset: hex:0x30;

[13:08]
RW/V

edg_slice_level_set7_zr
edg_slice_level_set7_zr[13:8]
set7 of edg slicer zr level

Reset: hex:0x00;

[05:00]
RW/V

edg_slice_level_set7_hi
edg_slice_level_set7_hi[5:0]
set7 of edg slicer hi level

Reset: hex:0x10;

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+0x0000086c Register(32 bit) edgvref_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a86c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000100
Unaffected 0xfffffe00
Undefined 0xfffffe00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - 1 0 0 0 0 0 0 0 0
Name - edgvref_int_iter_bypass edgvref_int_iter_max edgvref_updn_inv_cb edgvref_hold_en
Access - RW RW RW RW

[08:08]
RW

edgvref_int_iter_bypass
edgvref_int_iter_bypass[8:8]
edgVRef internal iterator bypass

Reset: hex:0x1;

[07:04]
RW

edgvref_int_iter_max
edgvref_int_iter_max[7:4]
edgVRef internal iterator max count

Reset: hex:0x0;

[03:03]
RW

edgvref_updn_inv_cb
edgvref_updn_inv_cb[3:3]
edgVRef chicken bit to invert up/down

Reset: hex:0x0;

[02:00]
RW

edgvref_hold_en
edgvref_hold_en[2:0]
edgVRef hold tap accumulator

Reset: hex:0x0;

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+0x00000870 Register(32 bit) edgvref_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a870 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000002d
Unaffected 0xffffc0c0
Undefined 0xffffc0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 - - 1 0 1 1 0 1
Name - edgvref_init_val_1 - edgvref_init_val_0
Access - RW - RW

[13:08]
RW

edgvref_init_val_1
edgvref_init_val_1[13:8]
edgVRef initial values for Vrefs

Reset: hex:0x00;

[05:00]
RW

edgvref_init_val_0
edgvref_init_val_0[5:0]
edgVRef initial values for Vrefs

Reset: hex:0x2d;

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+0x00000874 Register(32 bit) edgvref_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a874 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000013
Unaffected 0xffffffc0
Undefined 0xffffffc0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - 0 1 0 0 1 1
Name - edgvref_init_val_2
Access - RW

[05:00]
RW

edgvref_init_val_2
edgvref_init_val_2[5:0]
edgVRef initial values for Vrefs

Reset: hex:0x13;

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+0x00000878 Register(32 bit) edgvref_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a878 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00004008
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0
Name - edgvref_stats_max edgvref_timer_max
Access - RW RW

[17:08]
RW

edgvref_stats_max
edgvref_stats_max[17:8]
edgVRef stats counter

Reset: hex:0x040;

[07:00]
RW

edgvref_timer_max
edgvref_timer_max[7:0]
edgVRef delay timer

Reset: hex:0x08;

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+0x0000087c Register(32 bit) edgvref_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a87c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000201f
Unaffected 0xffffc0c0
Undefined 0xffffc0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - 1 0 0 0 0 0 - - 0 1 1 1 1 1
Name - edgvref_tap_min - edgvref_tap_max
Access - RW - RW

[13:08]
RW

edgvref_tap_min
edgvref_tap_min[13:8]
edgVRef update accum saturation

Reset: hex:0x20;

[05:00]
RW

edgvref_tap_max
edgvref_tap_max[5:0]
edgVRef update accum saturation

Reset: hex:0x1f;

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+0x00000880 Register(32 bit) edgvref_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a880 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000811
Unaffected 0xfffc0200
Undefined 0xfffc0200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 0 0 0 0 0 1 0 - 0 0 0 0 1 0 0 0 1
Name - edgvref_mu_fine - edgvref_mu_coarse edgvref_coarse_mu_en
Access - RW - RW RW

[17:10]
RW

edgvref_mu_fine
edgvref_mu_fine[17:10]
edgVRef update gain value for fine run

Reset: hex:0x02;

[08:01]
RW

edgvref_mu_coarse
edgvref_mu_coarse[8:1]
edgVRef update gain value for coarse run

Reset: hex:0x08;

[00:00]
RW

edgvref_coarse_mu_en
edgvref_coarse_mu_en[0:0]
use coarse mu for vref

Reset: hex:0x1;

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+0x00000884 Register(32 bit) edgvref_frac_set0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a884 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - edgvref_frac_set0_lo edgvref_frac_set0_zr edgvref_frac_set0_hi
Access - RW/V RW/V RW/V

[23:16]
RW/V

edgvref_frac_set0_lo
edgvref_frac_set0_lo[23:16]
edgVREF set0 level lo fractional part

Reset: hex:0x00;

[15:08]
RW/V

edgvref_frac_set0_zr
edgvref_frac_set0_zr[15:8]
edgVREF set0 level zr fractional part

Reset: hex:0x00;

[07:00]
RW/V

edgvref_frac_set0_hi
edgvref_frac_set0_hi[7:0]
edgVREF set0 level hi fractional part

Reset: hex:0x00;

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+0x00000888 Register(32 bit) edgvref_frac_set1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a888 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - edgvref_frac_set1_lo edgvref_frac_set1_zr edgvref_frac_set1_hi
Access - RW/V RW/V RW/V

[23:16]
RW/V

edgvref_frac_set1_lo
edgvref_frac_set1_lo[23:16]
edgVREF set1 level lo fractional part

Reset: hex:0x00;

[15:08]
RW/V

edgvref_frac_set1_zr
edgvref_frac_set1_zr[15:8]
edgVREF set1 level zr fractional part

Reset: hex:0x00;

[07:00]
RW/V

edgvref_frac_set1_hi
edgvref_frac_set1_hi[7:0]
edgVREF set1 level hi fractional part

Reset: hex:0x00;

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+0x0000088c Register(32 bit) edgvref_frac_set2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a88c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - edgvref_frac_set2_lo edgvref_frac_set2_zr edgvref_frac_set2_hi
Access - RW/V RW/V RW/V

[23:16]
RW/V

edgvref_frac_set2_lo
edgvref_frac_set2_lo[23:16]
edgVREF set2 level lo fractional part

Reset: hex:0x00;

[15:08]
RW/V

edgvref_frac_set2_zr
edgvref_frac_set2_zr[15:8]
edgVREF set2 level zr fractional part

Reset: hex:0x00;

[07:00]
RW/V

edgvref_frac_set2_hi
edgvref_frac_set2_hi[7:0]
edgVREF set2 level hi fractional part

Reset: hex:0x00;

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+0x00000890 Register(32 bit) edgvref_frac_set3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a890 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - edgvref_frac_set3_lo edgvref_frac_set3_zr edgvref_frac_set3_hi
Access - RW/V RW/V RW/V

[23:16]
RW/V

edgvref_frac_set3_lo
edgvref_frac_set3_lo[23:16]
edgVREF set3 level lo fractional part

Reset: hex:0x00;

[15:08]
RW/V

edgvref_frac_set3_zr
edgvref_frac_set3_zr[15:8]
edgVREF set3 level zr fractional part

Reset: hex:0x00;

[07:00]
RW/V

edgvref_frac_set3_hi
edgvref_frac_set3_hi[7:0]
edgVREF set3 level hi fractional part

Reset: hex:0x00;

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+0x00000894 Register(32 bit) edgvref_frac_set4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a894 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - edgvref_frac_set4_lo edgvref_frac_set4_zr edgvref_frac_set4_hi
Access - RW/V RW/V RW/V

[23:16]
RW/V

edgvref_frac_set4_lo
edgvref_frac_set4_lo[23:16]
edgVREF set4 level lo fractional part

Reset: hex:0x00;

[15:08]
RW/V

edgvref_frac_set4_zr
edgvref_frac_set4_zr[15:8]
edgVREF set4 level zr fractional part

Reset: hex:0x00;

[07:00]
RW/V

edgvref_frac_set4_hi
edgvref_frac_set4_hi[7:0]
edgVREF set4 level hi fractional part

Reset: hex:0x00;

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+0x00000898 Register(32 bit) edgvref_frac_set5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a898 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - edgvref_frac_set5_lo edgvref_frac_set5_zr edgvref_frac_set5_hi
Access - RW/V RW/V RW/V

[23:16]
RW/V

edgvref_frac_set5_lo
edgvref_frac_set5_lo[23:16]
edgVREF set5 level lo fractional part

Reset: hex:0x00;

[15:08]
RW/V

edgvref_frac_set5_zr
edgvref_frac_set5_zr[15:8]
edgVREF set5 level zr fractional part

Reset: hex:0x00;

[07:00]
RW/V

edgvref_frac_set5_hi
edgvref_frac_set5_hi[7:0]
edgVREF set5 level hi fractional part

Reset: hex:0x00;

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+0x0000089c Register(32 bit) edgvref_frac_set6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a89c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - edgvref_frac_set6_lo edgvref_frac_set6_zr edgvref_frac_set6_hi
Access - RW/V RW/V RW/V

[23:16]
RW/V

edgvref_frac_set6_lo
edgvref_frac_set6_lo[23:16]
edgVREF set6 level lo fractional part

Reset: hex:0x00;

[15:08]
RW/V

edgvref_frac_set6_zr
edgvref_frac_set6_zr[15:8]
edgVREF set6 level zr fractional part

Reset: hex:0x00;

[07:00]
RW/V

edgvref_frac_set6_hi
edgvref_frac_set6_hi[7:0]
edgVREF set6 level hi fractional part

Reset: hex:0x00;

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+0x000008a0 Register(32 bit) edgvref_frac_set7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8a0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - edgvref_frac_set7_lo edgvref_frac_set7_zr edgvref_frac_set7_hi
Access - RW/V RW/V RW/V

[23:16]
RW/V

edgvref_frac_set7_lo
edgvref_frac_set7_lo[23:16]
edgVREF set7 level lo fractional part

Reset: hex:0x00;

[15:08]
RW/V

edgvref_frac_set7_zr
edgvref_frac_set7_zr[15:8]
edgVREF set7 level zr fractional part

Reset: hex:0x00;

[07:00]
RW/V

edgvref_frac_set7_hi
edgvref_frac_set7_hi[7:0]
edgVREF set7 level hi fractional part

Reset: hex:0x00;

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+0x000008a4 Register(32 bit) jpp_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8a4 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000100
Unaffected 0xfffe0000
Undefined 0xfffe0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Name - jpp_dffe_en jpp_dffe_gain jpp_dffe_offset
Access - RW RW RW

[16:16]
RW

jpp_dffe_en
jpp_dffe_en[16:16]
Enable dFFE JPP function

Reset: hex:0x0;

[15:08]
RW

jpp_dffe_gain
jpp_dffe_gain[15:8]
JPP dFFE gain

Reset: hex:0x01;

[07:00]
RW

jpp_dffe_offset
jpp_dffe_offset[7:0]
JPP dFFE offset

Reset: hex:0x00;

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+0x000008a8 Register(32 bit) dfe_lms_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8a8 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010020
Unaffected 0xfff80000
Undefined 0xfff80000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
Name - dfe_stats_max dfe_timer_max dfe_updn_inv_cb
Access - RW RW RW

[18:09]
RW

dfe_stats_max
dfe_stats_max[18:9]
dfe stats counter threshold

Reset: hex:0x080;

[08:01]
RW

dfe_timer_max
dfe_timer_max[8:1]
dfe delay timer threshold

Reset: hex:0x10;

[00:00]
RW

dfe_updn_inv_cb
dfe_updn_inv_cb[0:0]
Chicken bit to invert up/down

Reset: hex:0x0;

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+0x000008ac Register(32 bit) dfe_lms_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8ac at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffff00fe
Undefined 0xffff00fe

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0 0 - - - - - - - 0
Name - dfe_init_val - dfe_hold_en
Access - RW - RW

[15:08]
RW

dfe_init_val
dfe_init_val[15:8]
Initial value for the dfe coeff

Reset: hex:0x00;

[00:00]
RW

dfe_hold_en
dfe_hold_en[0:0]
Hold dfe taps accumulators

Reset: hex:0x0;

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+0x000008b0 Register(32 bit) dfe_lms_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8b0 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010410
Unaffected 0xfffe0000
Undefined 0xfffe0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
Name - dfe_coarse_mu_en dfe_mu_fine dfe_mu_coarse
Access - RW RW RW

[16:16]
RW

dfe_coarse_mu_en
dfe_coarse_mu_en[16:16]
Select between coarse and fine update gains

Reset: hex:0x1;

[15:08]
RW

dfe_mu_fine
dfe_mu_fine[15:8]
Update dfe gain fine value

Reset: hex:0x04;

[07:00]
RW

dfe_mu_coarse
dfe_mu_coarse[7:0]
Update dfe gain coarse value

Reset: hex:0x10;

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+0x000008b4 Register(32 bit) dfe_lms_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8b4 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000807f
Unaffected 0xffff0000
Undefined 0xffff0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1
Name - dfe_tap_min dfe_tap_max
Access - RW RW

[15:08]
RW

dfe_tap_min
dfe_tap_min[15:8]
update dfe accum saturation at min width

Reset: hex:0x80;

[07:00]
RW

dfe_tap_max
dfe_tap_max[7:0]
update dfe accum saturation at max width

Reset: hex:0x7f;

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+0x000008b8 Register(32 bit) dfe_lms_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8b8 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffffe
Undefined 0xfffffffe

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0
Name - dfe_avg_updn
Access - RO/V

[00:00]
RO/V

dfe_avg_updn
dfe_avg_updn[0:0]
Up-Down decisions per tap

Reset: hex:0x0;

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+0x000008bc Register(32 bit) dfe_lms_set0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8bc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name dfe_coeff_set3 dfe_coeff_set2 dfe_coeff_set1 dfe_coeff_set0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

dfe_coeff_set3
dfe_coeff_set3[31:24]
set3 of dfe coeff

Reset: hex:0x00;

[23:16]
RW/V

dfe_coeff_set2
dfe_coeff_set2[23:16]
set2 of dfe coeff

Reset: hex:0x00;

[15:08]
RW/V

dfe_coeff_set1
dfe_coeff_set1[15:8]
set1 of dfe coeff

Reset: hex:0x00;

[07:00]
RW/V

dfe_coeff_set0
dfe_coeff_set0[7:0]
set0 of dfe coeff

Reset: hex:0x00;

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+0x000008c0 Register(32 bit) dfe_lms_set4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8c0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name dfe_coeff_set7 dfe_coeff_set6 dfe_coeff_set5 dfe_coeff_set4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

dfe_coeff_set7
dfe_coeff_set7[31:24]
set7 of dfe coeff

Reset: hex:0x00;

[23:16]
RW/V

dfe_coeff_set6
dfe_coeff_set6[23:16]
set6 of dfe coeff

Reset: hex:0x00;

[15:08]
RW/V

dfe_coeff_set5
dfe_coeff_set5[15:8]
set5 of dfe coeff

Reset: hex:0x00;

[07:00]
RW/V

dfe_coeff_set4
dfe_coeff_set4[7:0]
set4 of dfe coeff

Reset: hex:0x00;

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+0x000008c4 Register(32 bit) dfe_lms_set8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8c4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name dfe_coeff_set11 dfe_coeff_set10 dfe_coeff_set9 dfe_coeff_set8
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

dfe_coeff_set11
dfe_coeff_set11[31:24]
set11 of dfe coeff

Reset: hex:0x00;

[23:16]
RW/V

dfe_coeff_set10
dfe_coeff_set10[23:16]
set10 of dfe coeff

Reset: hex:0x00;

[15:08]
RW/V

dfe_coeff_set9
dfe_coeff_set9[15:8]
set9 of dfe coeff

Reset: hex:0x00;

[07:00]
RW/V

dfe_coeff_set8
dfe_coeff_set8[7:0]
set8 of dfe coeff

Reset: hex:0x00;

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+0x000008c8 Register(32 bit) dfe_lms_set12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8c8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name dfe_coeff_set15 dfe_coeff_set14 dfe_coeff_set13 dfe_coeff_set12
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

dfe_coeff_set15
dfe_coeff_set15[31:24]
set15 of dfe coeff

Reset: hex:0x00;

[23:16]
RW/V

dfe_coeff_set14
dfe_coeff_set14[23:16]
set14 of dfe coeff

Reset: hex:0x00;

[15:08]
RW/V

dfe_coeff_set13
dfe_coeff_set13[15:8]
set13 of dfe coeff

Reset: hex:0x00;

[07:00]
RW/V

dfe_coeff_set12
dfe_coeff_set12[7:0]
set12 of dfe coeff

Reset: hex:0x00;

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+0x000008cc Register(32 bit) dfe_lms_frac_set0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8cc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name dfe_coeff_set3_frac dfe_coeff_set2_frac dfe_coeff_set1_frac dfe_coeff_set0_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

dfe_coeff_set3_frac
dfe_coeff_set3_frac[31:24]
set3 of dfe fractional coeff

Reset: hex:0x00;

[23:16]
RW/V

dfe_coeff_set2_frac
dfe_coeff_set2_frac[23:16]
set2 of dfe fractional coeff

Reset: hex:0x00;

[15:08]
RW/V

dfe_coeff_set1_frac
dfe_coeff_set1_frac[15:8]
set1 of dfe fractional coeff

Reset: hex:0x00;

[07:00]
RW/V

dfe_coeff_set0_frac
dfe_coeff_set0_frac[7:0]
set0 of dfe fractional coeff

Reset: hex:0x00;

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+0x000008d0 Register(32 bit) dfe_lms_frac_set4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8d0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name dfe_coeff_set7_frac dfe_coeff_set6_frac dfe_coeff_set5_frac dfe_coeff_set4_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

dfe_coeff_set7_frac
dfe_coeff_set7_frac[31:24]
set7 of dfe fractional coeff

Reset: hex:0x00;

[23:16]
RW/V

dfe_coeff_set6_frac
dfe_coeff_set6_frac[23:16]
set6 of dfe fractional coeff

Reset: hex:0x00;

[15:08]
RW/V

dfe_coeff_set5_frac
dfe_coeff_set5_frac[15:8]
set5 of dfe fractional coeff

Reset: hex:0x00;

[07:00]
RW/V

dfe_coeff_set4_frac
dfe_coeff_set4_frac[7:0]
set4 of dfe fractional coeff

Reset: hex:0x00;

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+0x000008d4 Register(32 bit) dfe_lms_frac_set8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8d4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name dfe_coeff_set11_frac dfe_coeff_set10_frac dfe_coeff_set9_frac dfe_coeff_set8_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

dfe_coeff_set11_frac
dfe_coeff_set11_frac[31:24]
set11 of dfe fractional coeff

Reset: hex:0x00;

[23:16]
RW/V

dfe_coeff_set10_frac
dfe_coeff_set10_frac[23:16]
set10 of dfe fractional coeff

Reset: hex:0x00;

[15:08]
RW/V

dfe_coeff_set9_frac
dfe_coeff_set9_frac[15:8]
set9 of dfe fractional coeff

Reset: hex:0x00;

[07:00]
RW/V

dfe_coeff_set8_frac
dfe_coeff_set8_frac[7:0]
set8 of dfe fractional coeff

Reset: hex:0x00;

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+0x000008d8 Register(32 bit) dfe_lms_frac_set12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8d8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name dfe_coeff_set15_frac dfe_coeff_set14_frac dfe_coeff_set13_frac dfe_coeff_set12_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

dfe_coeff_set15_frac
dfe_coeff_set15_frac[31:24]
set15 of dfe fractional coeff

Reset: hex:0x00;

[23:16]
RW/V

dfe_coeff_set14_frac
dfe_coeff_set14_frac[23:16]
set14 of dfe fractional coeff

Reset: hex:0x00;

[15:08]
RW/V

dfe_coeff_set13_frac
dfe_coeff_set13_frac[15:8]
set13 of dfe fractional coeff

Reset: hex:0x00;

[07:00]
RW/V

dfe_coeff_set12_frac
dfe_coeff_set12_frac[7:0]
set12 of dfe fractional coeff

Reset: hex:0x00;

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+0x000008dc Register(32 bit) dfe_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8dc at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffff0
Undefined 0xfffffff0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0
Name - dfe_opt_sel dfe_slicer_inv_p_err_cb dfe_slicer_inv_n_err_cb dfe_en
Access - RW RW RW RW

[03:03]
RW

dfe_opt_sel
dfe_opt_sel[3:3]
DFE options selection. 0-default 64LA DFE; 1-Windowing DFE

Reset: hex:0x0;

[02:02]
RW

dfe_slicer_inv_p_err_cb
dfe_slicer_inv_p_err_cb[2:2]
Invert dfe slicer +1/+3 polarity

Reset: hex:0x0;

[01:01]
RW

dfe_slicer_inv_n_err_cb
dfe_slicer_inv_n_err_cb[1:1]
Invert dfe slicer -1/-3 polarity

Reset: hex:0x0;

[00:00]
RW

dfe_en
dfe_en[0:0]
Enable DFE filter

Reset: hex:0x0;

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+0x000008e0 Register(32 bit) rx_sararray_valid_0
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8e0 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxdat_sararray_valid_0
Access RO/V

[31:00]
RO/V

rxdat_sararray_valid_0
rxdat_sararray_valid_0[31:0]
Rx Data SAR Array [31:0]

Reset: hex:0x00000000;

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+0x000008e4 Register(32 bit) rx_sararray_valid_1
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8e4 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxdat_sararray_valid_1
Access RO/V

[31:00]
RO/V

rxdat_sararray_valid_1
rxdat_sararray_valid_1[31:0]
Rx Data SAR Array [63:32]

Reset: hex:0x00000000;

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+0x000008e8 Register(32 bit) cdr_ffe_pre1_set0to3
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8e8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre1_coeff_set3 cdr_ffe_pre1_coeff_set2 cdr_ffe_pre1_coeff_set1 cdr_ffe_pre1_coeff_set0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre1_coeff_set3
cdr_ffe_pre1_coeff_set3[31:24]
set3 of cdr ffe pre1 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre1_coeff_set2
cdr_ffe_pre1_coeff_set2[23:16]
set2 of cdr ffe pre1 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre1_coeff_set1
cdr_ffe_pre1_coeff_set1[15:8]
set1 of cdr ffe pre1 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre1_coeff_set0
cdr_ffe_pre1_coeff_set0[7:0]
set0 of cdr ffe pre1 coeff

Reset: hex:0x00;

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+0x000008ec Register(32 bit) cdr_ffe_pre1_set4to7
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8ec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre1_coeff_set7 cdr_ffe_pre1_coeff_set6 cdr_ffe_pre1_coeff_set5 cdr_ffe_pre1_coeff_set4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre1_coeff_set7
cdr_ffe_pre1_coeff_set7[31:24]
set7 of cdr ffe pre1 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre1_coeff_set6
cdr_ffe_pre1_coeff_set6[23:16]
set6 of cdr ffe pre1 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre1_coeff_set5
cdr_ffe_pre1_coeff_set5[15:8]
set5 of cdr ffe pre1 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre1_coeff_set4
cdr_ffe_pre1_coeff_set4[7:0]
set4 of cdr ffe pre1 coeff

Reset: hex:0x00;

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+0x000008f0 Register(32 bit) cdr_ffe_pre1_set8to11
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8f0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre1_coeff_set11 cdr_ffe_pre1_coeff_set10 cdr_ffe_pre1_coeff_set9 cdr_ffe_pre1_coeff_set8
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre1_coeff_set11
cdr_ffe_pre1_coeff_set11[31:24]
set11 of cdr ffe pre1 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre1_coeff_set10
cdr_ffe_pre1_coeff_set10[23:16]
set10 of cdr ffe pre1 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre1_coeff_set9
cdr_ffe_pre1_coeff_set9[15:8]
set9 of cdr ffe pre1 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre1_coeff_set8
cdr_ffe_pre1_coeff_set8[7:0]
set8 of cdr ffe pre1 coeff

Reset: hex:0x00;

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+0x000008f4 Register(32 bit) cdr_ffe_pre1_set12to15
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8f4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre1_coeff_set15 cdr_ffe_pre1_coeff_set14 cdr_ffe_pre1_coeff_set13 cdr_ffe_pre1_coeff_set12
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre1_coeff_set15
cdr_ffe_pre1_coeff_set15[31:24]
set15 of cdr ffe pre1 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre1_coeff_set14
cdr_ffe_pre1_coeff_set14[23:16]
set14 of cdr ffe pre1 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre1_coeff_set13
cdr_ffe_pre1_coeff_set13[15:8]
set13 of cdr ffe pre1 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre1_coeff_set12
cdr_ffe_pre1_coeff_set12[7:0]
set12 of cdr ffe pre1 coeff

Reset: hex:0x00;

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+0x000008f8 Register(32 bit) cdr_ffe_slicer_level_set0_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8f8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set0_m1 - cdr_ffe_slice_level_set0_0 - cdr_ffe_slice_level_set0_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set0_m1
cdr_ffe_slice_level_set0_m1[30:22]
set0 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set0_0
cdr_ffe_slice_level_set0_0[20:12]
set0 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set0_p1
cdr_ffe_slice_level_set0_p1[8:0]
set0 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x000008fc Register(32 bit) cdr_ffe_slicer_level_set1_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a8fc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set1_m1 - cdr_ffe_slice_level_set1_0 - cdr_ffe_slice_level_set1_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set1_m1
cdr_ffe_slice_level_set1_m1[30:22]
set1 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set1_0
cdr_ffe_slice_level_set1_0[20:12]
set1 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set1_p1
cdr_ffe_slice_level_set1_p1[8:0]
set1 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000900 Register(32 bit) cdr_ffe_slicer_level_set2_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a900 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set2_m1 - cdr_ffe_slice_level_set2_0 - cdr_ffe_slice_level_set2_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set2_m1
cdr_ffe_slice_level_set2_m1[30:22]
set2 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set2_0
cdr_ffe_slice_level_set2_0[20:12]
set2 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set2_p1
cdr_ffe_slice_level_set2_p1[8:0]
set2 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000904 Register(32 bit) cdr_ffe_slicer_level_set3_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a904 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set3_m1 - cdr_ffe_slice_level_set3_0 - cdr_ffe_slice_level_set3_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set3_m1
cdr_ffe_slice_level_set3_m1[30:22]
set3 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set3_0
cdr_ffe_slice_level_set3_0[20:12]
set3 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set3_p1
cdr_ffe_slice_level_set3_p1[8:0]
set3 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x0000090c Register(32 bit) cdr_ffe_slicer_level_set4_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a90c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set4_m1 - cdr_ffe_slice_level_set4_0 - cdr_ffe_slice_level_set4_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set4_m1
cdr_ffe_slice_level_set4_m1[30:22]
set4 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set4_0
cdr_ffe_slice_level_set4_0[20:12]
set4 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set4_p1
cdr_ffe_slice_level_set4_p1[8:0]
set4 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000910 Register(32 bit) cdr_ffe_slicer_level_set5_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a910 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set5_m1 - cdr_ffe_slice_level_set5_0 - cdr_ffe_slice_level_set5_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set5_m1
cdr_ffe_slice_level_set5_m1[30:22]
set5 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set5_0
cdr_ffe_slice_level_set5_0[20:12]
set5 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set5_p1
cdr_ffe_slice_level_set5_p1[8:0]
set5 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000914 Register(32 bit) cdr_ffe_slicer_level_set6_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a914 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set6_m1 - cdr_ffe_slice_level_set6_0 - cdr_ffe_slice_level_set6_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set6_m1
cdr_ffe_slice_level_set6_m1[30:22]
set6 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set6_0
cdr_ffe_slice_level_set6_0[20:12]
set6 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set6_p1
cdr_ffe_slice_level_set6_p1[8:0]
set6 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000918 Register(32 bit) cdr_ffe_slicer_level_set7_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a918 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set7_m1 - cdr_ffe_slice_level_set7_0 - cdr_ffe_slice_level_set7_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set7_m1
cdr_ffe_slice_level_set7_m1[30:22]
set7 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set7_0
cdr_ffe_slice_level_set7_0[20:12]
set7 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set7_p1
cdr_ffe_slice_level_set7_p1[8:0]
set7 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x0000091c Register(32 bit) cdr_ffe_slicer_level_set8_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a91c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set8_m1 - cdr_ffe_slice_level_set8_0 - cdr_ffe_slice_level_set8_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set8_m1
cdr_ffe_slice_level_set8_m1[30:22]
set8 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set8_0
cdr_ffe_slice_level_set8_0[20:12]
set8 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set8_p1
cdr_ffe_slice_level_set8_p1[8:0]
set8 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000920 Register(32 bit) cdr_ffe_slicer_level_set9_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a920 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set9_m1 - cdr_ffe_slice_level_set9_0 - cdr_ffe_slice_level_set9_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set9_m1
cdr_ffe_slice_level_set9_m1[30:22]
set9 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set9_0
cdr_ffe_slice_level_set9_0[20:12]
set9 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set9_p1
cdr_ffe_slice_level_set9_p1[8:0]
set9 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000924 Register(32 bit) cdr_ffe_slicer_level_set10_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a924 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set10_m1 - cdr_ffe_slice_level_set10_0 - cdr_ffe_slice_level_set10_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set10_m1
cdr_ffe_slice_level_set10_m1[30:22]
set10 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set10_0
cdr_ffe_slice_level_set10_0[20:12]
set10 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set10_p1
cdr_ffe_slice_level_set10_p1[8:0]
set10 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000928 Register(32 bit) cdr_ffe_slicer_level_set11_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a928 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set11_m1 - cdr_ffe_slice_level_set11_0 - cdr_ffe_slice_level_set11_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set11_m1
cdr_ffe_slice_level_set11_m1[30:22]
set11 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set11_0
cdr_ffe_slice_level_set11_0[20:12]
set11 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set11_p1
cdr_ffe_slice_level_set11_p1[8:0]
set11 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x0000092c Register(32 bit) cdr_ffe_slicer_level_set12_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a92c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set12_m1 - cdr_ffe_slice_level_set12_0 - cdr_ffe_slice_level_set12_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set12_m1
cdr_ffe_slice_level_set12_m1[30:22]
set12 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set12_0
cdr_ffe_slice_level_set12_0[20:12]
set12 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set12_p1
cdr_ffe_slice_level_set12_p1[8:0]
set12 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000930 Register(32 bit) cdr_ffe_slicer_level_set13_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a930 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set13_m1 - cdr_ffe_slice_level_set13_0 - cdr_ffe_slice_level_set13_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set13_m1
cdr_ffe_slice_level_set13_m1[30:22]
set13 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set13_0
cdr_ffe_slice_level_set13_0[20:12]
set13 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set13_p1
cdr_ffe_slice_level_set13_p1[8:0]
set13 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000934 Register(32 bit) cdr_ffe_slicer_level_set14_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a934 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set14_m1 - cdr_ffe_slice_level_set14_0 - cdr_ffe_slice_level_set14_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set14_m1
cdr_ffe_slice_level_set14_m1[30:22]
set14 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set14_0
cdr_ffe_slice_level_set14_0[20:12]
set14 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set14_p1
cdr_ffe_slice_level_set14_p1[8:0]
set14 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000938 Register(32 bit) cdr_ffe_slicer_level_set15_control
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a938 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x560000a8
Unaffected 0x80200e00
Undefined 0x80200e00

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 1 0 1 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0 - - - 0 1 0 1 0 1 0 0 0
Name - cdr_ffe_slice_level_set15_m1 - cdr_ffe_slice_level_set15_0 - cdr_ffe_slice_level_set15_p1
Access - RW/V - RW/V - RW/V

[30:22]
RW/V

cdr_ffe_slice_level_set15_m1
cdr_ffe_slice_level_set15_m1[30:22]
set15 of cdr ffe -1 slicer level

Reset: hex:0x158;

[20:12]
RW/V

cdr_ffe_slice_level_set15_0
cdr_ffe_slice_level_set15_0[20:12]
set15 of cdr ffe 0 slicer level

Reset: hex:0x000;

[08:00]
RW/V

cdr_ffe_slice_level_set15_p1
cdr_ffe_slice_level_set15_p1[8:0]
set15 of cdr ffe +1 slicer level

Reset: hex:0x0a8;

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+0x00000940 Register(32 bit) cdr_ffe_err_level_m1m3_set0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a940 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set0_m3 cdr_ffe_err_level_set0_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set0_m3
cdr_ffe_err_level_set0_m3[17:9]
set0 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set0_m1
cdr_ffe_err_level_set0_m1[8:0]
set0 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x00000944 Register(32 bit) cdr_ffe_err_level_p1p3_set0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a944 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set0_p3 cdr_ffe_err_level_set0_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set0_p3
cdr_ffe_err_level_set0_p3[17:9]
set0 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set0_p1
cdr_ffe_err_level_set0_p1[8:0]
set0 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000948 Register(32 bit) cdr_ffe_err_level_m1m3_set1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a948 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set1_m3 cdr_ffe_err_level_set1_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set1_m3
cdr_ffe_err_level_set1_m3[17:9]
set1 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set1_m1
cdr_ffe_err_level_set1_m1[8:0]
set1 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x0000094c Register(32 bit) cdr_ffe_err_level_p1p3_set1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a94c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set1_p3 cdr_ffe_err_level_set1_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set1_p3
cdr_ffe_err_level_set1_p3[17:9]
set1 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set1_p1
cdr_ffe_err_level_set1_p1[8:0]
set1 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000950 Register(32 bit) cdr_ffe_err_level_m1m3_set2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a950 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set2_m3 cdr_ffe_err_level_set2_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set2_m3
cdr_ffe_err_level_set2_m3[17:9]
set2 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set2_m1
cdr_ffe_err_level_set2_m1[8:0]
set2 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x00000954 Register(32 bit) cdr_ffe_err_level_p1p3_set2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a954 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set2_p3 cdr_ffe_err_level_set2_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set2_p3
cdr_ffe_err_level_set2_p3[17:9]
set2 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set2_p1
cdr_ffe_err_level_set2_p1[8:0]
set2 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000958 Register(32 bit) cdr_ffe_err_level_m1m3_set3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a958 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set3_m3 cdr_ffe_err_level_set3_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set3_m3
cdr_ffe_err_level_set3_m3[17:9]
set3 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set3_m1
cdr_ffe_err_level_set3_m1[8:0]
set3 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x0000095c Register(32 bit) cdr_ffe_err_level_p1p3_set3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a95c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set3_p3 cdr_ffe_err_level_set3_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set3_p3
cdr_ffe_err_level_set3_p3[17:9]
set3 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set3_p1
cdr_ffe_err_level_set3_p1[8:0]
set3 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000960 Register(32 bit) cdr_ffe_err_level_m1m3_set4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a960 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set4_m3 cdr_ffe_err_level_set4_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set4_m3
cdr_ffe_err_level_set4_m3[17:9]
set4 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set4_m1
cdr_ffe_err_level_set4_m1[8:0]
set4 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x00000964 Register(32 bit) cdr_ffe_err_level_p1p3_set4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a964 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set4_p3 cdr_ffe_err_level_set4_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set4_p3
cdr_ffe_err_level_set4_p3[17:9]
set4 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set4_p1
cdr_ffe_err_level_set4_p1[8:0]
set4 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000968 Register(32 bit) cdr_ffe_err_level_m1m3_set5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a968 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set5_m3 cdr_ffe_err_level_set5_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set5_m3
cdr_ffe_err_level_set5_m3[17:9]
set5 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set5_m1
cdr_ffe_err_level_set5_m1[8:0]
set5 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x0000096c Register(32 bit) cdr_ffe_err_level_p1p3_set5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a96c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set5_p3 cdr_ffe_err_level_set5_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set5_p3
cdr_ffe_err_level_set5_p3[17:9]
set5 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set5_p1
cdr_ffe_err_level_set5_p1[8:0]
set5 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000970 Register(32 bit) cdr_ffe_err_level_m1m3_set6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a970 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set6_m3 cdr_ffe_err_level_set6_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set6_m3
cdr_ffe_err_level_set6_m3[17:9]
set6 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set6_m1
cdr_ffe_err_level_set6_m1[8:0]
set6 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x00000974 Register(32 bit) cdr_ffe_err_level_p1p3_set6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a974 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set6_p3 cdr_ffe_err_level_set6_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set6_p3
cdr_ffe_err_level_set6_p3[17:9]
set6 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set6_p1
cdr_ffe_err_level_set6_p1[8:0]
set6 of cdr ffe error +1 slicer le

Reset: hex:0x058;

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+0x00000978 Register(32 bit) cdr_ffe_err_level_m1m3_set7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a978 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set7_m3 cdr_ffe_err_level_set7_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set7_m3
cdr_ffe_err_level_set7_m3[17:9]
set7 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set7_m1
cdr_ffe_err_level_set7_m1[8:0]
set7 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x0000097c Register(32 bit) cdr_ffe_err_level_p1p3_set7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a97c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set7_p3 cdr_ffe_err_level_set7_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set7_p3
cdr_ffe_err_level_set7_p3[17:9]
set7 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set7_p1
cdr_ffe_err_level_set7_p1[8:0]
set7 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000980 Register(32 bit) cdr_ffe_err_level_m1m3_set8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a980 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set8_m3 cdr_ffe_err_level_set8_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set8_m3
cdr_ffe_err_level_set8_m3[17:9]
set8 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set8_m1
cdr_ffe_err_level_set8_m1[8:0]
set8 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x00000984 Register(32 bit) cdr_ffe_err_level_p1p3_set8
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a984 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set8_p3 cdr_ffe_err_level_set8_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set8_p3
cdr_ffe_err_level_set8_p3[17:9]
set8 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set8_p1
cdr_ffe_err_level_set8_p1[8:0]
set8 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000988 Register(32 bit) cdr_ffe_err_level_m1m3_set9
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a988 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set9_m3 cdr_ffe_err_level_set9_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set9_m3
cdr_ffe_err_level_set9_m3[17:9]
set9 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set9_m1
cdr_ffe_err_level_set9_m1[8:0]
set9 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x0000098c Register(32 bit) cdr_ffe_err_level_p1p3_set9
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a98c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set9_p3 cdr_ffe_err_level_set9_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set9_p3
cdr_ffe_err_level_set9_p3[17:9]
set9 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set9_p1
cdr_ffe_err_level_set9_p1[8:0]
set9 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000990 Register(32 bit) cdr_ffe_err_level_m1m3_set10
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a990 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set10_m3 cdr_ffe_err_level_set10_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set10_m3
cdr_ffe_err_level_set10_m3[17:9]
set10 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set10_m1
cdr_ffe_err_level_set10_m1[8:0]
set10 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x00000994 Register(32 bit) cdr_ffe_err_level_p1p3_set10
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a994 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set10_p3 cdr_ffe_err_level_set10_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set10_p3
cdr_ffe_err_level_set10_p3[17:9]
set10 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set10_p1
cdr_ffe_err_level_set10_p1[8:0]
set10 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x00000998 Register(32 bit) cdr_ffe_err_level_m1m3_set11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a998 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set11_m3 cdr_ffe_err_level_set11_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set11_m3
cdr_ffe_err_level_set11_m3[17:9]
set11 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set11_m1
cdr_ffe_err_level_set11_m1[8:0]
set11 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x0000099c Register(32 bit) cdr_ffe_err_level_p1p3_set11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a99c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set11_p3 cdr_ffe_err_level_set11_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set11_p3
cdr_ffe_err_level_set11_p3[17:9]
set11 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set11_p1
cdr_ffe_err_level_set11_p1[8:0]
set11 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x000009a0 Register(32 bit) cdr_ffe_err_level_m1m3_set12
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9a0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set12_m3 cdr_ffe_err_level_set12_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set12_m3
cdr_ffe_err_level_set12_m3[17:9]
set12 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set12_m1
cdr_ffe_err_level_set12_m1[8:0]
set12 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x000009a4 Register(32 bit) cdr_ffe_err_level_p1p3_set12
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9a4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set12_p3 cdr_ffe_err_level_set12_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set12_p3
cdr_ffe_err_level_set12_p3[17:9]
set12 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set12_p1
cdr_ffe_err_level_set12_p1[8:0]
set12 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x000009a8 Register(32 bit) cdr_ffe_err_level_m1m3_set13
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9a8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set13_m3 cdr_ffe_err_level_set13_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set13_m3
cdr_ffe_err_level_set13_m3[17:9]
set13 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set13_m1
cdr_ffe_err_level_set13_m1[8:0]
set13 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x000009ac Register(32 bit) cdr_ffe_err_level_p1p3_set13
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9ac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set13_p3 cdr_ffe_err_level_set13_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set13_p3
cdr_ffe_err_level_set13_p3[17:9]
set13 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set13_p1
cdr_ffe_err_level_set13_p1[8:0]
set13 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x000009b0 Register(32 bit) cdr_ffe_err_level_m1m3_set14
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9b0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set14_m3 cdr_ffe_err_level_set14_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set14_m3
cdr_ffe_err_level_set14_m3[17:9]
set14 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set14_m1
cdr_ffe_err_level_set14_m1[8:0]
set14 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x000009b4 Register(32 bit) cdr_ffe_err_level_p1p3_set14
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9b4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set14_p3 cdr_ffe_err_level_set14_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set14_p3
cdr_ffe_err_level_set14_p3[17:9]
set14 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set14_p1
cdr_ffe_err_level_set14_p1[8:0]
set14 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x000009b8 Register(32 bit) cdr_ffe_err_level_m1m3_set15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9b8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000209a8
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0
Name - cdr_ffe_err_level_set15_m3 cdr_ffe_err_level_set15_m1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set15_m3
cdr_ffe_err_level_set15_m3[17:9]
set15 of cdr ffe error -3 slicer level

Reset: hex:0x104;

[08:00]
RW/V

cdr_ffe_err_level_set15_m1
cdr_ffe_err_level_set15_m1[8:0]
set15 of cdr ffe error -1 slicer level

Reset: hex:0x1a8;

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+0x000009c0 Register(32 bit) cdr_ffe_err_level_p1p3_set15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9c0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001f058
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0 0
Name - cdr_ffe_err_level_set15_p3 cdr_ffe_err_level_set15_p1
Access - RW/V RW/V

[17:09]
RW/V

cdr_ffe_err_level_set15_p3
cdr_ffe_err_level_set15_p3[17:9]
set15 of cdr ffe error +3 slicer level

Reset: hex:0x0f8;

[08:00]
RW/V

cdr_ffe_err_level_set15_p1
cdr_ffe_err_level_set15_p1[8:0]
set15 of cdr ffe error +1 slicer level

Reset: hex:0x058;

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+0x000009c8 Register(32 bit) cdr_ffe_post1_set0to3
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9c8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post1_coeff_set3 cdr_ffe_post1_coeff_set2 cdr_ffe_post1_coeff_set1 cdr_ffe_post1_coeff_set0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post1_coeff_set3
cdr_ffe_post1_coeff_set3[31:24]
set3 of cdr ffe post1 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post1_coeff_set2
cdr_ffe_post1_coeff_set2[23:16]
set2 of cdr ffe post1 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post1_coeff_set1
cdr_ffe_post1_coeff_set1[15:8]
set1 of cdr ffe post1 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post1_coeff_set0
cdr_ffe_post1_coeff_set0[7:0]
set0 of cdr ffe post1 coeff

Reset: hex:0x00;

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+0x000009cc Register(32 bit) cdr_ffe_post1_set4to7
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9cc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post1_coeff_set7 cdr_ffe_post1_coeff_set6 cdr_ffe_post1_coeff_set5 cdr_ffe_post1_coeff_set4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post1_coeff_set7
cdr_ffe_post1_coeff_set7[31:24]
set7 of cdr ffe post1 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post1_coeff_set6
cdr_ffe_post1_coeff_set6[23:16]
set6 of cdr ffe post1 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post1_coeff_set5
cdr_ffe_post1_coeff_set5[15:8]
set5 of cdr ffe post1 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post1_coeff_set4
cdr_ffe_post1_coeff_set4[7:0]
set4 of cdr ffe post1 coeff

Reset: hex:0x00;

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+0x000009d0 Register(32 bit) cdr_ffe_post1_set8to11
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9d0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post1_coeff_set11 cdr_ffe_post1_coeff_set10 cdr_ffe_post1_coeff_set9 cdr_ffe_post1_coeff_set8
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post1_coeff_set11
cdr_ffe_post1_coeff_set11[31:24]
set11 of cdr ffe post1 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post1_coeff_set10
cdr_ffe_post1_coeff_set10[23:16]
set10 of cdr ffe post1 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post1_coeff_set9
cdr_ffe_post1_coeff_set9[15:8]
set9 of cdr ffe post1 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post1_coeff_set8
cdr_ffe_post1_coeff_set8[7:0]
set8 of cdr ffe post1 coeff

Reset: hex:0x00;

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+0x000009d4 Register(32 bit) cdr_ffe_post1_set12to15
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9d4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post1_coeff_set15 cdr_ffe_post1_coeff_set14 cdr_ffe_post1_coeff_set13 cdr_ffe_post1_coeff_set12
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post1_coeff_set15
cdr_ffe_post1_coeff_set15[31:24]
set15 of cdr ffe post1 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post1_coeff_set14
cdr_ffe_post1_coeff_set14[23:16]
set14 of cdr ffe post1 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post1_coeff_set13
cdr_ffe_post1_coeff_set13[15:8]
set13 of cdr ffe post1 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post1_coeff_set12
cdr_ffe_post1_coeff_set12[7:0]
set12 of cdr ffe post1 coeff

Reset: hex:0x00;

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+0x000009d8 Register(32 bit) cdr_ffe_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9d8 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x04080000
Unaffected 0x80000802
Undefined 0x80000802

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 0 0 - 0
Name - cdr_ffe_updn_inv_cb cdr_ffe_timer_max cdr_ffe_stats_max - cdr_ffe_hold_en cdr_ffe_post1_up_dis cdr_ffe_pre1_up_dis - cdr_ffe_7tap_mode
Access - RW RW RW - RW RW RW - RW

[30:30]
RW

cdr_ffe_updn_inv_cb
cdr_ffe_updn_inv_cb[30:30]
Chicken bit to invert up/down

Reset: hex:0x0;

[29:22]
RW

cdr_ffe_timer_max
cdr_ffe_timer_max[29:22]
CDR FFE delay timer threshold

Reset: hex:0x10;

[21:12]
RW

cdr_ffe_stats_max
cdr_ffe_stats_max[21:12]
CDR FFE stats counter threshold

Reset: hex:0x080;

[10:04]
RW

cdr_ffe_hold_en
cdr_ffe_hold_en[10:4]
Hold static taps accumulators

Reset: hex:0x00;

[03:03]
RW

cdr_ffe_post1_up_dis
cdr_ffe_post1_up_dis[3:3]
Disable CDR FFE Post1 Tap update

Reset: hex:0x0;

[02:02]
RW

cdr_ffe_pre1_up_dis
cdr_ffe_pre1_up_dis[2:2]
Disable CDR FFE Pre1 Tap update

Reset: hex:0x0;

[00:00]
RW

cdr_ffe_7tap_mode
cdr_ffe_7tap_mode[0:0]
Enable 7 taps CDR FFE. Default=0 as 2 taps mode

Reset: hex:0x0;

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+0x000009dc Register(32 bit) cdr_ffe_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9dc at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010410
Unaffected 0xfffe0000
Undefined 0xfffe0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
Name - cdr_ffe_coarse_mu_en cdr_ffe_mu_fine cdr_ffe_mu_coarse
Access - RW RW RW

[16:16]
RW

cdr_ffe_coarse_mu_en
cdr_ffe_coarse_mu_en[16:16]
Select between coarse and fine update gains

Reset: hex:0x1;

[15:08]
RW

cdr_ffe_mu_fine
cdr_ffe_mu_fine[15:8]
Update gain fine value

Reset: hex:0x04;

[07:00]
RW

cdr_ffe_mu_coarse
cdr_ffe_mu_coarse[7:0]
Update gain coarse value

Reset: hex:0x10;

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+0x000009e0 Register(32 bit) cdr_ffe_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9e0 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000201f
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 0 0 0 0 0 0 - - 1 0 0 0 0 0 - - 0 1 1 1 1 1
Name - cdr_ffe_init_val_w0 - cdr_ffe_tap_min_w0 - cdr_ffe_tap_max_w0
Access - RW - RW - RW

[21:16]
RW

cdr_ffe_init_val_w0
cdr_ffe_init_val_w0[21:16]
Initial value for the CDR FFE Coefficient

Reset: hex:0x00;

[13:08]
RW

cdr_ffe_tap_min_w0
cdr_ffe_tap_min_w0[13:8]
update accum saturation at min width

Reset: hex:0x20;

[05:00]
RW

cdr_ffe_tap_max_w0
cdr_ffe_tap_max_w0[5:0]
update accum saturation at max width

Reset: hex:0x1f;

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+0x000009e4 Register(32 bit) lms_avg_updn_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9e4 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_ofc_avg_updn adcofc_avg_updn ofc_avg_updn cdr_ffe_vref_avg_updn edgvref_avg_updn cdr_ffe_avg_updn
Access RO/V RO/V RO/V RO/V RO/V RO/V

[31:26]
RO/V

cdr_ffe_ofc_avg_updn
cdr_ffe_ofc_avg_updn[31:26]
CDR FFE OFC Up-Down decisions per tap

Reset: hex:0x00;

[25:20]
RO/V

adcofc_avg_updn
adcofc_avg_updn[25:20]
ADC OFC Up-Down decisions per tap

Reset: hex:0x00;

[19:14]
RO/V

ofc_avg_updn
ofc_avg_updn[19:14]
OFC Up-Down decisions per tap

Reset: hex:0x00;

[13:10]
RO/V

cdr_ffe_vref_avg_updn
cdr_ffe_vref_avg_updn[13:10]
CDR FFE VREF Up-Down decision per tap

Reset: hex:0x0;

[09:07]
RO/V

edgvref_avg_updn
edgvref_avg_updn[9:7]
EDGE VREF Up-Down decisions per tap

Reset: hex:0x0;

[06:00]
RO/V

cdr_ffe_avg_updn
cdr_ffe_avg_updn[6:0]
CDR FFE Up-Down decisions per tap

Reset: hex:0x00;

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+0x000009e8 Register(32 bit) cdr_ffe_vref_control_1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9e8 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000040
Unaffected 0xfffff800
Undefined 0xfffff800

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 1 0 0 0 0 0 0
Name - cdr_ffe_vref_int_iter_max cdr_ffe_vref_int_iter_bypass cdr_ffe_vref_hold_en cdr_ffe_vref_pos_updn_inv_cb cdr_ffe_vref_neg_updn_inv_cb
Access - RW RW RW RW RW

[10:07]
RW

cdr_ffe_vref_int_iter_max
cdr_ffe_vref_int_iter_max[10:7]
CDR FFE VRef internal iterator max count. Actual number of iteration is N+1

Reset: hex:0x0;

[06:06]
RW

cdr_ffe_vref_int_iter_bypass
cdr_ffe_vref_int_iter_bypass[6:6]
CDR FFE VRef internal iterator bypass

Reset: hex:0x1;

[05:02]
RW

cdr_ffe_vref_hold_en
cdr_ffe_vref_hold_en[5:2]
CDR FFE VRef hold tap accumulator

Reset: hex:0x0;

[01:01]
RW

cdr_ffe_vref_pos_updn_inv_cb
cdr_ffe_vref_pos_updn_inv_cb[1:1]
CDR FFE VRef Pos chicken bit to invert up/down

Reset: hex:0x0;

[00:00]
RW

cdr_ffe_vref_neg_updn_inv_cb
cdr_ffe_vref_neg_updn_inv_cb[0:0]
CDR FFE VRef Neg chicken bit to invert up/down

Reset: hex:0x0;

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+0x000009ec Register(32 bit) cdr_ffe_vref_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9ec at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00036120
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 1 0 1 1 0 0 0 0 1 0 0 1 0 0 0 0 0
Name - cdr_ffe_vref_init_val_1 cdr_ffe_vref_init_val_0
Access - RW RW

[17:09]
RW

cdr_ffe_vref_init_val_1
cdr_ffe_vref_init_val_1[17:9]
CDR_FFE_VREFinitial values for Vrefs

Reset: hex:0x1b0;

[08:00]
RW

cdr_ffe_vref_init_val_0
cdr_ffe_vref_init_val_0[8:0]
CDR_FFE_VREFinitial values for Vrefs

Reset: hex:0x120;

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+0x000009f0 Register(32 bit) cdr_ffe_vref_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9f0 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0001c050
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 1 1 1 0 0 0 0 0 0 0 1 0 1 0 0 0 0
Name - cdr_ffe_vref_init_val_3 cdr_ffe_vref_init_val_2
Access - RW RW

[17:09]
RW

cdr_ffe_vref_init_val_3
cdr_ffe_vref_init_val_3[17:9]
CDR_FFE_VREFinitial values for Vrefs

Reset: hex:0x0e0;

[08:00]
RW

cdr_ffe_vref_init_val_2
cdr_ffe_vref_init_val_2[8:0]
CDR_FFE_VREFinitial values for Vrefs

Reset: hex:0x050;

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+0x000009f4 Register(32 bit) cdr_ffe_vref_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9f4 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00004008
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0
Name - cdr_ffe_vref_stats_max cdr_ffe_vref_timer_max
Access - RW RW

[17:08]
RW

cdr_ffe_vref_stats_max
cdr_ffe_vref_stats_max[17:8]
CDR_FFE_VREFstats counter

Reset: hex:0x040;

[07:00]
RW

cdr_ffe_vref_timer_max
cdr_ffe_vref_timer_max[7:0]
CDR_FFE_VREFdelay timer

Reset: hex:0x08;

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+0x000009f8 Register(32 bit) cdr_ffe_vref_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9f8 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000200ff
Unaffected 0xfffc0000
Undefined 0xfffc0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Name - cdr_ffe_vref_tap_min cdr_ffe_vref_tap_max
Access - RW RW

[17:09]
RW

cdr_ffe_vref_tap_min
cdr_ffe_vref_tap_min[17:9]
CDR_FFE_VREFupdate accum saturation

Reset: hex:0x100;

[08:00]
RW

cdr_ffe_vref_tap_max
cdr_ffe_vref_tap_max[8:0]
CDR_FFE_VREFupdate accum saturation

Reset: hex:0x0ff;

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+0x000009fc Register(32 bit) cdr_ffe_vref_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702a9fc at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00001021
Unaffected 0xffec0200
Undefined 0xffec0200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - 0 - - 0 0 0 0 0 1 0 0 - 0 0 0 1 0 0 0 0 1
Name - cdr_ffe_vref_thrs_sel - cdr_ffe_vref_mu_fine - cdr_ffe_vref_mu_coarse cdr_ffe_vref_coarse_mu_en
Access - RW - RW - RW RW

[20:20]
RW

cdr_ffe_vref_thrs_sel
cdr_ffe_vref_thrs_sel[20:20]
Selection CDR_FFE_VREF thrs from ofc adaptive lms or from average of CDR_FFE_VREF taps. 0-default, from CDR_FFE_VREF average taps; 1-from ofc average taps

Reset: hex:0x0;

[17:10]
RW

cdr_ffe_vref_mu_fine
cdr_ffe_vref_mu_fine[17:10]
CDR_FFE_VREFupdate gain value for fine run

Reset: hex:0x04;

[08:01]
RW

cdr_ffe_vref_mu_coarse
cdr_ffe_vref_mu_coarse[8:1]
CDR_FFE_VREFupdate gain value for coarse run

Reset: hex:0x10;

[00:00]
RW

cdr_ffe_vref_coarse_mu_en
cdr_ffe_vref_coarse_mu_en[0:0]
use coarse mu for CDR_FFE_VREF

Reset: hex:0x1;

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+0x00000a04 Register(32 bit) cdr_ffe_ofc_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa04 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010020
Unaffected 0xf0380000
Undefined 0xf0380000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 - - - 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
Name - cdr_ffe_ofc_hold_en - cdr_ffe_ofc_stats_max cdr_ffe_ofc_timer_max cdr_ffe_ofc_updn_inv_cb
Access - RW - RW RW RW

[27:22]
RW

cdr_ffe_ofc_hold_en
cdr_ffe_ofc_hold_en[27:22]
Hold cdr_ffe_ofc taps accumulators

Reset: hex:0x00;

[18:09]
RW

cdr_ffe_ofc_stats_max
cdr_ffe_ofc_stats_max[18:9]
cdr_ffe_ofc stats counter threshold

Reset: hex:0x080;

[08:01]
RW

cdr_ffe_ofc_timer_max
cdr_ffe_ofc_timer_max[8:1]
cdr_ffe_ofc delay timer threshold

Reset: hex:0x10;

[00:00]
RW

cdr_ffe_ofc_updn_inv_cb
cdr_ffe_ofc_updn_inv_cb[0:0]
Chicken bit to invert up/down

Reset: hex:0x0;

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+0x00000a08 Register(32 bit) cdr_ffe_ofc_control_1a
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa08 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0005a168
Unaffected 0xe0080200
Undefined 0xe0080200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - 0 0 0 0 0 0 0 0 0 - 1 0 1 1 0 1 0 0 0 - 1 0 1 1 0 1 0 0 0
Name - cdr_ffe_ofc_init_val_2 - cdr_ffe_ofc_init_val_1 - cdr_ffe_ofc_init_val_0
Access - RW - RW - RW

[28:20]
RW

cdr_ffe_ofc_init_val_2
cdr_ffe_ofc_init_val_2[28:20]
Initial value for cdr_ffe_ofc_2 coeff

Reset: hex:0x000;

[18:10]
RW

cdr_ffe_ofc_init_val_1
cdr_ffe_ofc_init_val_1[18:10]
Initial value for cdr_ffe_ofc_1 coeff

Reset: hex:0x168;

[08:00]
RW

cdr_ffe_ofc_init_val_0
cdr_ffe_ofc_init_val_0[8:0]
Initial value for cdr_ffe_ofc_0 coeff

Reset: hex:0x168;

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+0x00000a0c Register(32 bit) cdr_ffe_ofc_control_1b
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa0c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x09826000
Unaffected 0xe0080200
Undefined 0xe0080200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - 0 1 0 0 1 1 0 0 0 - 0 1 0 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0
Name - cdr_ffe_ofc_init_val_5 - cdr_ffe_ofc_init_val_4 - cdr_ffe_ofc_init_val_3
Access - RW - RW - RW

[28:20]
RW

cdr_ffe_ofc_init_val_5
cdr_ffe_ofc_init_val_5[28:20]
Initial value for cdr_ffe_ofc_5 coeff

Reset: hex:0x098;

[18:10]
RW

cdr_ffe_ofc_init_val_4
cdr_ffe_ofc_init_val_4[18:10]
Initial value for cdr_ffe_ofc_4 coeff

Reset: hex:0x098;

[08:00]
RW

cdr_ffe_ofc_init_val_3
cdr_ffe_ofc_init_val_3[8:0]
Initial value for cdr_ffe_ofc_3 coeff

Reset: hex:0x000;

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+0x00000a10 Register(32 bit) cdr_ffe_ofc_control_2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa10 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00010410
Unaffected 0xfffe0000
Undefined 0xfffe0000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0
Name - cdr_ffe_ofc_coarse_mu_en cdr_ffe_ofc_mu_fine cdr_ffe_ofc_mu_coarse
Access - RW RW RW

[16:16]
RW

cdr_ffe_ofc_coarse_mu_en
cdr_ffe_ofc_coarse_mu_en[16:16]
Select between coarse and fine update gains

Reset: hex:0x1;

[15:08]
RW

cdr_ffe_ofc_mu_fine
cdr_ffe_ofc_mu_fine[15:8]
Update cdr_ffe_ofc gain fine value

Reset: hex:0x04;

[07:00]
RW

cdr_ffe_ofc_mu_coarse
cdr_ffe_ofc_mu_coarse[7:0]
Update cdr_ffe_ofc vgain coarse value

Reset: hex:0x10;

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+0x00000a14 Register(32 bit) cdr_ffe_ofc_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa14 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000400ff
Unaffected 0xfff80200
Undefined 0xfff80200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - 1 0 0 0 0 0 0 0 0 - 0 1 1 1 1 1 1 1 1
Name - cdr_ffe_ofc_tap_min - cdr_ffe_ofc_tap_max
Access - RW - RW

[18:10]
RW

cdr_ffe_ofc_tap_min
cdr_ffe_ofc_tap_min[18:10]
update cdr_ffe_ofc accum saturation at min width

Reset: hex:0x100;

[08:00]
RW

cdr_ffe_ofc_tap_max
cdr_ffe_ofc_tap_max[8:0]
update cdr_ffe_ofc accum saturation at max width

Reset: hex:0x0ff;

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+0x00000a18 Register(32 bit) cdr_ffe_ofc_status_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa18 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xe0080200
Undefined 0xe0080200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - 0 0 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 0 0
Name - cdr_ffe_ofc_tap_zr - cdr_ffe_ofc_tap_lo - cdr_ffe_ofc_tap_hi
Access - RO/V - RO/V - RO/V

[28:20]
RO/V

cdr_ffe_ofc_tap_zr
cdr_ffe_ofc_tap_zr[28:20]
cdr_ffe_ofc tap_zero

Reset: hex:0x000;

[18:10]
RO/V

cdr_ffe_ofc_tap_lo
cdr_ffe_ofc_tap_lo[18:10]
cdr_ffe_ofc tap_low

Reset: hex:0x000;

[08:00]
RO/V

cdr_ffe_ofc_tap_hi
cdr_ffe_ofc_tap_hi[8:0]
cdr_ffe_ofc tap high

Reset: hex:0x000;

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+0x00000a1c Register(32 bit) cdr_ffe_pre1_set0to3_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa1c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre1_coeff_set3_frac cdr_ffe_pre1_coeff_set2_frac cdr_ffe_pre1_coeff_set1_frac cdr_ffe_pre1_coeff_set0_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre1_coeff_set3_frac
cdr_ffe_pre1_coeff_set3_frac[31:24]
set3 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre1_coeff_set2_frac
cdr_ffe_pre1_coeff_set2_frac[23:16]
set2 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre1_coeff_set1_frac
cdr_ffe_pre1_coeff_set1_frac[15:8]
set1 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre1_coeff_set0_frac
cdr_ffe_pre1_coeff_set0_frac[7:0]
set0 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

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+0x00000a20 Register(32 bit) cdr_ffe_pre1_set4to7_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa20 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre1_coeff_set7_frac cdr_ffe_pre1_coeff_set6_frac cdr_ffe_pre1_coeff_set5_frac cdr_ffe_pre1_coeff_set4_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre1_coeff_set7_frac
cdr_ffe_pre1_coeff_set7_frac[31:24]
set7 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre1_coeff_set6_frac
cdr_ffe_pre1_coeff_set6_frac[23:16]
set6 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre1_coeff_set5_frac
cdr_ffe_pre1_coeff_set5_frac[15:8]
set5 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre1_coeff_set4_frac
cdr_ffe_pre1_coeff_set4_frac[7:0]
set4 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

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+0x00000a24 Register(32 bit) cdr_ffe_pre1_set8to11_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa24 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre1_coeff_set11_frac cdr_ffe_pre1_coeff_set10_frac cdr_ffe_pre1_coeff_set9_frac cdr_ffe_pre1_coeff_set8_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre1_coeff_set11_frac
cdr_ffe_pre1_coeff_set11_frac[31:24]
set11 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre1_coeff_set10_frac
cdr_ffe_pre1_coeff_set10_frac[23:16]
set10 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre1_coeff_set9_frac
cdr_ffe_pre1_coeff_set9_frac[15:8]
set9 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre1_coeff_set8_frac
cdr_ffe_pre1_coeff_set8_frac[7:0]
set8 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

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+0x00000a28 Register(32 bit) cdr_ffe_pre1_set12to15_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa28 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre1_coeff_set15_frac cdr_ffe_pre1_coeff_set14_frac cdr_ffe_pre1_coeff_set13_frac cdr_ffe_pre1_coeff_set12_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre1_coeff_set15_frac
cdr_ffe_pre1_coeff_set15_frac[31:24]
set15 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre1_coeff_set14_frac
cdr_ffe_pre1_coeff_set14_frac[23:16]
set14 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre1_coeff_set13_frac
cdr_ffe_pre1_coeff_set13_frac[15:8]
set13 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre1_coeff_set12_frac
cdr_ffe_pre1_coeff_set12_frac[7:0]
set12 of cdr ffe pre1 coeff frac

Reset: hex:0x00;

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+0x00000a2c Register(32 bit) cdr_ffe_post1_set0to3_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa2c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post1_coeff_set3_frac cdr_ffe_post1_coeff_set2_frac cdr_ffe_post1_coeff_set1_frac cdr_ffe_post1_coeff_set0_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post1_coeff_set3_frac
cdr_ffe_post1_coeff_set3_frac[31:24]
set3 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post1_coeff_set2_frac
cdr_ffe_post1_coeff_set2_frac[23:16]
set2 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post1_coeff_set1_frac
cdr_ffe_post1_coeff_set1_frac[15:8]
set1 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post1_coeff_set0_frac
cdr_ffe_post1_coeff_set0_frac[7:0]
set0 of cdr ffe post1 coeff frac

Reset: hex:0x00;

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+0x00000a30 Register(32 bit) cdr_ffe_post1_set4to7_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa30 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post1_coeff_set7_frac cdr_ffe_post1_coeff_set6_frac cdr_ffe_post1_coeff_set5_frac cdr_ffe_post1_coeff_set4_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post1_coeff_set7_frac
cdr_ffe_post1_coeff_set7_frac[31:24]
set7 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post1_coeff_set6_frac
cdr_ffe_post1_coeff_set6_frac[23:16]
set6 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post1_coeff_set5_frac
cdr_ffe_post1_coeff_set5_frac[15:8]
set5 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post1_coeff_set4_frac
cdr_ffe_post1_coeff_set4_frac[7:0]
set4 of cdr ffe post1 coeff frac

Reset: hex:0x00;

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+0x00000a34 Register(32 bit) cdr_ffe_post1_set8to11_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa34 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post1_coeff_set11_frac cdr_ffe_post1_coeff_set10_frac cdr_ffe_post1_coeff_set9_frac cdr_ffe_post1_coeff_set8_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post1_coeff_set11_frac
cdr_ffe_post1_coeff_set11_frac[31:24]
set11 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post1_coeff_set10_frac
cdr_ffe_post1_coeff_set10_frac[23:16]
set10 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post1_coeff_set9_frac
cdr_ffe_post1_coeff_set9_frac[15:8]
set9 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post1_coeff_set8_frac
cdr_ffe_post1_coeff_set8_frac[7:0]
set8 of cdr ffe post1 coeff frac

Reset: hex:0x00;

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+0x00000a38 Register(32 bit) cdr_ffe_post1_set12to15_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa38 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post1_coeff_set15_frac cdr_ffe_post1_coeff_set14_frac cdr_ffe_post1_coeff_set13_frac cdr_ffe_post1_coeff_set12_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post1_coeff_set15_frac
cdr_ffe_post1_coeff_set15_frac[31:24]
set15 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post1_coeff_set14_frac
cdr_ffe_post1_coeff_set14_frac[23:16]
set14 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post1_coeff_set13_frac
cdr_ffe_post1_coeff_set13_frac[15:8]
set13 of cdr ffe post1 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post1_coeff_set12_frac
cdr_ffe_post1_coeff_set12_frac[7:0]
set12 of cdr ffe post1 coeff frac

Reset: hex:0x00;

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+0x00000a3c Register(32 bit) cdr_ffe_err_level_frac_set0_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa3c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set0_p3 cdr_ffe_err_level_frac_set0_p1 cdr_ffe_err_level_frac_set0_m1 cdr_ffe_err_level_frac_set0_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set0_p3
cdr_ffe_err_level_frac_set0_p3[31:24]
CDR FFE VREF set0 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set0_p1
cdr_ffe_err_level_frac_set0_p1[23:16]
CDR FFE VREF set0 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set0_m1
cdr_ffe_err_level_frac_set0_m1[15:8]
CDR FFE VREF set0 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set0_m3
cdr_ffe_err_level_frac_set0_m3[7:0]
CDR FFE VREF set0 level m3 fractional part

Reset: hex:0x00;

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+0x00000a40 Register(32 bit) cdr_ffe_err_level_frac_set1_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa40 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set1_p3 cdr_ffe_err_level_frac_set1_p1 cdr_ffe_err_level_frac_set1_m1 cdr_ffe_err_level_frac_set1_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set1_p3
cdr_ffe_err_level_frac_set1_p3[31:24]
CDR FFE VREF set1 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set1_p1
cdr_ffe_err_level_frac_set1_p1[23:16]
CDR FFE VREF set1 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set1_m1
cdr_ffe_err_level_frac_set1_m1[15:8]
CDR FFE VREF set1 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set1_m3
cdr_ffe_err_level_frac_set1_m3[7:0]
CDR FFE VREF set1 level m3 fractional part

Reset: hex:0x00;

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+0x00000a44 Register(32 bit) cdr_ffe_err_level_frac_set2_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa44 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set2_p3 cdr_ffe_err_level_frac_set2_p1 cdr_ffe_err_level_frac_set2_m1 cdr_ffe_err_level_frac_set2_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set2_p3
cdr_ffe_err_level_frac_set2_p3[31:24]
CDR FFE VREF set2 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set2_p1
cdr_ffe_err_level_frac_set2_p1[23:16]
CDR FFE VREF set2 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set2_m1
cdr_ffe_err_level_frac_set2_m1[15:8]
CDR FFE VREF set2 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set2_m3
cdr_ffe_err_level_frac_set2_m3[7:0]
CDR FFE VREF set2 level m3 fractional part

Reset: hex:0x00;

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+0x00000a48 Register(32 bit) cdr_ffe_err_level_frac_set3_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa48 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set3_p3 cdr_ffe_err_level_frac_set3_p1 cdr_ffe_err_level_frac_set3_m1 cdr_ffe_err_level_frac_set3_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set3_p3
cdr_ffe_err_level_frac_set3_p3[31:24]
CDR FFE VREF set3 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set3_p1
cdr_ffe_err_level_frac_set3_p1[23:16]
CDR FFE VREF set3 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set3_m1
cdr_ffe_err_level_frac_set3_m1[15:8]
CDR FFE VREF set3 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set3_m3
cdr_ffe_err_level_frac_set3_m3[7:0]
CDR FFE VREF set3 level m3 fractional part

Reset: hex:0x00;

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+0x00000a4c Register(32 bit) cdr_ffe_err_level_frac_set4_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa4c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set4_p3 cdr_ffe_err_level_frac_set4_p1 cdr_ffe_err_level_frac_set4_m1 cdr_ffe_err_level_frac_set4_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set4_p3
cdr_ffe_err_level_frac_set4_p3[31:24]
CDR FFE VREF set4 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set4_p1
cdr_ffe_err_level_frac_set4_p1[23:16]
CDR FFE VREF set4 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set4_m1
cdr_ffe_err_level_frac_set4_m1[15:8]
CDR FFE VREF set4 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set4_m3
cdr_ffe_err_level_frac_set4_m3[7:0]
CDR FFE VREF set4 level m3 fractional part

Reset: hex:0x00;

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+0x00000a50 Register(32 bit) cdr_ffe_err_level_frac_set5_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa50 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set5_p3 cdr_ffe_err_level_frac_set5_p1 cdr_ffe_err_level_frac_set5_m1 cdr_ffe_err_level_frac_set5_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set5_p3
cdr_ffe_err_level_frac_set5_p3[31:24]
CDR FFE VREF set5 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set5_p1
cdr_ffe_err_level_frac_set5_p1[23:16]
CDR FFE VREF set5 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set5_m1
cdr_ffe_err_level_frac_set5_m1[15:8]
CDR FFE VREF set5 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set5_m3
cdr_ffe_err_level_frac_set5_m3[7:0]
CDR FFE VREF set5 level m3 fractional part

Reset: hex:0x00;

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+0x00000a54 Register(32 bit) cdr_ffe_err_level_frac_set6_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa54 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set6_p3 cdr_ffe_err_level_frac_set6_p1 cdr_ffe_err_level_frac_set6_m1 cdr_ffe_err_level_frac_set6_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set6_p3
cdr_ffe_err_level_frac_set6_p3[31:24]
CDR FFE VREF set6 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set6_p1
cdr_ffe_err_level_frac_set6_p1[23:16]
CDR FFE VREF set6 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set6_m1
cdr_ffe_err_level_frac_set6_m1[15:8]
CDR FFE VREF set6 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set6_m3
cdr_ffe_err_level_frac_set6_m3[7:0]
CDR FFE VREF set6 level m3 fractional part

Reset: hex:0x00;

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+0x00000a58 Register(32 bit) cdr_ffe_err_level_frac_set7_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa58 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set7_p3 cdr_ffe_err_level_frac_set7_p1 cdr_ffe_err_level_frac_set7_m1 cdr_ffe_err_level_frac_set7_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set7_p3
cdr_ffe_err_level_frac_set7_p3[31:24]
CDR FFE VREF set7 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set7_p1
cdr_ffe_err_level_frac_set7_p1[23:16]
CDR FFE VREF set7 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set7_m1
cdr_ffe_err_level_frac_set7_m1[15:8]
CDR FFE VREF set7 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set7_m3
cdr_ffe_err_level_frac_set7_m3[7:0]
CDR FFE VREF set7 level m3 fractional part

Reset: hex:0x00;

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+0x00000a5c Register(32 bit) cdr_ffe_err_level_frac_set8_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa5c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set8_p3 cdr_ffe_err_level_frac_set8_p1 cdr_ffe_err_level_frac_set8_m1 cdr_ffe_err_level_frac_set8_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set8_p3
cdr_ffe_err_level_frac_set8_p3[31:24]
CDR FFE VREF set8 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set8_p1
cdr_ffe_err_level_frac_set8_p1[23:16]
CDR FFE VREF set8 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set8_m1
cdr_ffe_err_level_frac_set8_m1[15:8]
CDR FFE VREF set8 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set8_m3
cdr_ffe_err_level_frac_set8_m3[7:0]
CDR FFE VREF set8 level m3 fractional part

Reset: hex:0x00;

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+0x00000a60 Register(32 bit) cdr_ffe_err_level_frac_set9_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa60 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set9_p3 cdr_ffe_err_level_frac_set9_p1 cdr_ffe_err_level_frac_set9_m1 cdr_ffe_err_level_frac_set9_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set9_p3
cdr_ffe_err_level_frac_set9_p3[31:24]
CDR FFE VREF set9 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set9_p1
cdr_ffe_err_level_frac_set9_p1[23:16]
CDR FFE VREF set9 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set9_m1
cdr_ffe_err_level_frac_set9_m1[15:8]
CDR FFE VREF set9 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set9_m3
cdr_ffe_err_level_frac_set9_m3[7:0]
CDR FFE VREF set9 level m3 fractional part

Reset: hex:0x00;

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+0x00000a64 Register(32 bit) cdr_ffe_err_level_frac_set10_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa64 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set10_p3 cdr_ffe_err_level_frac_set10_p1 cdr_ffe_err_level_frac_set10_m1 cdr_ffe_err_level_frac_set10_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set10_p3
cdr_ffe_err_level_frac_set10_p3[31:24]
CDR FFE VREF set10 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set10_p1
cdr_ffe_err_level_frac_set10_p1[23:16]
CDR FFE VREF set10 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set10_m1
cdr_ffe_err_level_frac_set10_m1[15:8]
CDR FFE VREF set10 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set10_m3
cdr_ffe_err_level_frac_set10_m3[7:0]
CDR FFE VREF set10 level m3 fractional part

Reset: hex:0x00;

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+0x00000a68 Register(32 bit) cdr_ffe_err_level_frac_set11_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa68 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set11_p3 cdr_ffe_err_level_frac_set11_p1 cdr_ffe_err_level_frac_set11_m1 cdr_ffe_err_level_frac_set11_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set11_p3
cdr_ffe_err_level_frac_set11_p3[31:24]
CDR FFE VREF set11 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set11_p1
cdr_ffe_err_level_frac_set11_p1[23:16]
CDR FFE VREF set11 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set11_m1
cdr_ffe_err_level_frac_set11_m1[15:8]
CDR FFE VREF set11 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set11_m3
cdr_ffe_err_level_frac_set11_m3[7:0]
CDR FFE VREF set11 level m3 fractional part

Reset: hex:0x00;

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+0x00000a6c Register(32 bit) cdr_ffe_err_level_frac_set12_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa6c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set12_p3 cdr_ffe_err_level_frac_set12_p1 cdr_ffe_err_level_frac_set12_m1 cdr_ffe_err_level_frac_set12_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set12_p3
cdr_ffe_err_level_frac_set12_p3[31:24]
CDR FFE VREF set12 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set12_p1
cdr_ffe_err_level_frac_set12_p1[23:16]
CDR FFE VREF set12 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set12_m1
cdr_ffe_err_level_frac_set12_m1[15:8]
CDR FFE VREF set12 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set12_m3
cdr_ffe_err_level_frac_set12_m3[7:0]
CDR FFE VREF set12 level m3 fractional part

Reset: hex:0x00;

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+0x00000a70 Register(32 bit) cdr_ffe_err_level_frac_set13_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa70 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set13_p3 cdr_ffe_err_level_frac_set13_p1 cdr_ffe_err_level_frac_set13_m1 cdr_ffe_err_level_frac_set13_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set13_p3
cdr_ffe_err_level_frac_set13_p3[31:24]
CDR FFE VREF set13 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set13_p1
cdr_ffe_err_level_frac_set13_p1[23:16]
CDR FFE VREF set13 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set13_m1
cdr_ffe_err_level_frac_set13_m1[15:8]
CDR FFE VREF set13 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set13_m3
cdr_ffe_err_level_frac_set13_m3[7:0]
CDR FFE VREF set13 level m3 fractional part

Reset: hex:0x00;

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+0x00000a74 Register(32 bit) cdr_ffe_err_level_frac_set14_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa74 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set14_p3 cdr_ffe_err_level_frac_set14_p1 cdr_ffe_err_level_frac_set14_m1 cdr_ffe_err_level_frac_set14_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set14_p3
cdr_ffe_err_level_frac_set14_p3[31:24]
CDR FFE VREF set14 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set14_p1
cdr_ffe_err_level_frac_set14_p1[23:16]
CDR FFE VREF set14 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set14_m1
cdr_ffe_err_level_frac_set14_m1[15:8]
CDR FFE VREF set14 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set14_m3
cdr_ffe_err_level_frac_set14_m3[7:0]
CDR FFE VREF set14 level m3 fractional part

Reset: hex:0x00;

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+0x00000a78 Register(32 bit) cdr_ffe_err_level_frac_set15_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa78 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_err_level_frac_set15_p3 cdr_ffe_err_level_frac_set15_p1 cdr_ffe_err_level_frac_set15_m1 cdr_ffe_err_level_frac_set15_m3
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_err_level_frac_set15_p3
cdr_ffe_err_level_frac_set15_p3[31:24]
CDR FFE VREF set15 level p3 fractional part

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_err_level_frac_set15_p1
cdr_ffe_err_level_frac_set15_p1[23:16]
CDR FFE VREF set15 level p1 fractional part

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_err_level_frac_set15_m1
cdr_ffe_err_level_frac_set15_m1[15:8]
CDR FFE VREF set15 level m1 fractional part

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_err_level_frac_set15_m3
cdr_ffe_err_level_frac_set15_m3[7:0]
CDR FFE VREF set15 level m3 fractional part

Reset: hex:0x00;

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+0x00000a7c Register(32 bit) cdr_ffe_control_3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa7c at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0000c03f
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1
Name - cdr_ffe_init_val_w1 cdr_ffe_tap_min_w1 cdr_ffe_tap_max_w1
Access - RW RW RW

[23:16]
RW

cdr_ffe_init_val_w1
cdr_ffe_init_val_w1[23:16]
Initial value for the CDR FFE Coefficient

Reset: hex:0x00;

[15:08]
RW

cdr_ffe_tap_min_w1
cdr_ffe_tap_min_w1[15:8]
update accum saturation at min width

Reset: hex:0xc0;

[07:00]
RW

cdr_ffe_tap_max_w1
cdr_ffe_tap_max_w1[7:0]
update accum saturation at max width

Reset: hex:0x3f;

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+0x00000a80 Register(32 bit) cdr_ffe_pre3_set0to3
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa80 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_pre3_coeff_set3 - cdr_ffe_pre3_coeff_set2 - cdr_ffe_pre3_coeff_set1 - cdr_ffe_pre3_coeff_set0
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_pre3_coeff_set3
cdr_ffe_pre3_coeff_set3[29:24]
set3 of cdr ffe pre3 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_pre3_coeff_set2
cdr_ffe_pre3_coeff_set2[21:16]
set2 of cdr ffe pre3 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_pre3_coeff_set1
cdr_ffe_pre3_coeff_set1[13:8]
set1 of cdr ffe pre3 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_pre3_coeff_set0
cdr_ffe_pre3_coeff_set0[5:0]
set0 of cdr ffe pre3 coeff

Reset: hex:0x00;

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+0x00000a84 Register(32 bit) cdr_ffe_pre3_set4to7
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa84 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_pre3_coeff_set7 - cdr_ffe_pre3_coeff_set6 - cdr_ffe_pre3_coeff_set5 - cdr_ffe_pre3_coeff_set4
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_pre3_coeff_set7
cdr_ffe_pre3_coeff_set7[29:24]
set7 of cdr ffe pre3 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_pre3_coeff_set6
cdr_ffe_pre3_coeff_set6[21:16]
set6 of cdr ffe pre3 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_pre3_coeff_set5
cdr_ffe_pre3_coeff_set5[13:8]
set5 of cdr ffe pre3 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_pre3_coeff_set4
cdr_ffe_pre3_coeff_set4[5:0]
set4 of cdr ffe pre3 coeff

Reset: hex:0x00;

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+0x00000a88 Register(32 bit) cdr_ffe_pre3_set8to11
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa88 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_pre3_coeff_set11 - cdr_ffe_pre3_coeff_set10 - cdr_ffe_pre3_coeff_set9 - cdr_ffe_pre3_coeff_set8
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_pre3_coeff_set11
cdr_ffe_pre3_coeff_set11[29:24]
set11 of cdr ffe pre3 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_pre3_coeff_set10
cdr_ffe_pre3_coeff_set10[21:16]
set10 of cdr ffe pre3 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_pre3_coeff_set9
cdr_ffe_pre3_coeff_set9[13:8]
set9 of cdr ffe pre3 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_pre3_coeff_set8
cdr_ffe_pre3_coeff_set8[5:0]
set8 of cdr ffe pre3 coeff

Reset: hex:0x00;

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+0x00000a8c Register(32 bit) cdr_ffe_pre3_set12to15
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa8c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_pre3_coeff_set15 - cdr_ffe_pre3_coeff_set14 - cdr_ffe_pre3_coeff_set13 - cdr_ffe_pre3_coeff_set12
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_pre3_coeff_set15
cdr_ffe_pre3_coeff_set15[29:24]
set15 of cdr ffe pre3 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_pre3_coeff_set14
cdr_ffe_pre3_coeff_set14[21:16]
set14 of cdr ffe pre3 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_pre3_coeff_set13
cdr_ffe_pre3_coeff_set13[13:8]
set13 of cdr ffe pre3 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_pre3_coeff_set12
cdr_ffe_pre3_coeff_set12[5:0]
set12 of cdr ffe pre3 coeff

Reset: hex:0x00;

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+0x00000a90 Register(32 bit) cdr_ffe_pre2_set0to3
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa90 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_pre2_coeff_set3 - cdr_ffe_pre2_coeff_set2 - cdr_ffe_pre2_coeff_set1 - cdr_ffe_pre2_coeff_set0
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_pre2_coeff_set3
cdr_ffe_pre2_coeff_set3[29:24]
set3 of cdr ffe pre2 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_pre2_coeff_set2
cdr_ffe_pre2_coeff_set2[21:16]
set2 of cdr ffe pre2 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_pre2_coeff_set1
cdr_ffe_pre2_coeff_set1[13:8]
set1 of cdr ffe pre2 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_pre2_coeff_set0
cdr_ffe_pre2_coeff_set0[5:0]
set0 of cdr ffe pre2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000a94 Register(32 bit) cdr_ffe_pre2_set4to7
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa94 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_pre2_coeff_set7 - cdr_ffe_pre2_coeff_set6 - cdr_ffe_pre2_coeff_set5 - cdr_ffe_pre2_coeff_set4
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_pre2_coeff_set7
cdr_ffe_pre2_coeff_set7[29:24]
set7 of cdr ffe pre2 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_pre2_coeff_set6
cdr_ffe_pre2_coeff_set6[21:16]
set6 of cdr ffe pre2 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_pre2_coeff_set5
cdr_ffe_pre2_coeff_set5[13:8]
set5 of cdr ffe pre2 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_pre2_coeff_set4
cdr_ffe_pre2_coeff_set4[5:0]
set4 of cdr ffe pre2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000a98 Register(32 bit) cdr_ffe_pre2_set8to11
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa98 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_pre2_coeff_set11 - cdr_ffe_pre2_coeff_set10 - cdr_ffe_pre2_coeff_set9 - cdr_ffe_pre2_coeff_set8
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_pre2_coeff_set11
cdr_ffe_pre2_coeff_set11[29:24]
set11 of cdr ffe pre2 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_pre2_coeff_set10
cdr_ffe_pre2_coeff_set10[21:16]
set10 of cdr ffe pre2 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_pre2_coeff_set9
cdr_ffe_pre2_coeff_set9[13:8]
set9 of cdr ffe pre2 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_pre2_coeff_set8
cdr_ffe_pre2_coeff_set8[5:0]
set8 of cdr ffe pre2 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000a9c Register(32 bit) cdr_ffe_pre2_set12to15
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aa9c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_pre2_coeff_set15 - cdr_ffe_pre2_coeff_set14 - cdr_ffe_pre2_coeff_set13 - cdr_ffe_pre2_coeff_set12
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_pre2_coeff_set15
cdr_ffe_pre2_coeff_set15[29:24]
set15 of cdr ffe pre2 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_pre2_coeff_set14
cdr_ffe_pre2_coeff_set14[21:16]
set14 of cdr ffe pre2 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_pre2_coeff_set13
cdr_ffe_pre2_coeff_set13[13:8]
set13 of cdr ffe pre2 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_pre2_coeff_set12
cdr_ffe_pre2_coeff_set12[5:0]
set12 of cdr ffe pre2 coeff

Reset: hex:0x00;

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+0x00000aa0 Register(32 bit) cdr_ffe_post2_set0to3
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aaa0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post2_coeff_set3 cdr_ffe_post2_coeff_set2 cdr_ffe_post2_coeff_set1 cdr_ffe_post2_coeff_set0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post2_coeff_set3
cdr_ffe_post2_coeff_set3[31:24]
set3 of cdr ffe post2 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post2_coeff_set2
cdr_ffe_post2_coeff_set2[23:16]
set2 of cdr ffe post2 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post2_coeff_set1
cdr_ffe_post2_coeff_set1[15:8]
set1 of cdr ffe post2 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post2_coeff_set0
cdr_ffe_post2_coeff_set0[7:0]
set0 of cdr ffe post2 coeff

Reset: hex:0x00;

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+0x00000aa4 Register(32 bit) cdr_ffe_post2_set4to7
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aaa4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post2_coeff_set7 cdr_ffe_post2_coeff_set6 cdr_ffe_post2_coeff_set5 cdr_ffe_post2_coeff_set4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post2_coeff_set7
cdr_ffe_post2_coeff_set7[31:24]
set7 of cdr ffe post2 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post2_coeff_set6
cdr_ffe_post2_coeff_set6[23:16]
set6 of cdr ffe post2 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post2_coeff_set5
cdr_ffe_post2_coeff_set5[15:8]
set5 of cdr ffe post2 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post2_coeff_set4
cdr_ffe_post2_coeff_set4[7:0]
set4 of cdr ffe post2 coeff

Reset: hex:0x00;

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+0x00000aa8 Register(32 bit) cdr_ffe_post2_set8to11
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aaa8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post2_coeff_set11 cdr_ffe_post2_coeff_set10 cdr_ffe_post2_coeff_set9 cdr_ffe_post2_coeff_set8
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post2_coeff_set11
cdr_ffe_post2_coeff_set11[31:24]
set11 of cdr ffe post2 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post2_coeff_set10
cdr_ffe_post2_coeff_set10[23:16]
set10 of cdr ffe post2 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post2_coeff_set9
cdr_ffe_post2_coeff_set9[15:8]
set9 of cdr ffe post2 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post2_coeff_set8
cdr_ffe_post2_coeff_set8[7:0]
set8 of cdr ffe post2 coeff

Reset: hex:0x00;

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+0x00000aac Register(32 bit) cdr_ffe_post2_set12to15
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aaac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post2_coeff_set15 cdr_ffe_post2_coeff_set14 cdr_ffe_post2_coeff_set13 cdr_ffe_post2_coeff_set12
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post2_coeff_set15
cdr_ffe_post2_coeff_set15[31:24]
set15 of cdr ffe post2 coeff

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post2_coeff_set14
cdr_ffe_post2_coeff_set14[23:16]
set14 of cdr ffe post2 coeff

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post2_coeff_set13
cdr_ffe_post2_coeff_set13[15:8]
set13 of cdr ffe post2 coeff

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post2_coeff_set12
cdr_ffe_post2_coeff_set12[7:0]
set12 of cdr ffe post2 coeff

Reset: hex:0x00;

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+0x00000ab0 Register(32 bit) cdr_ffe_post3_set0to3
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aab0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_post3_coeff_set3 - cdr_ffe_post3_coeff_set2 - cdr_ffe_post3_coeff_set1 - cdr_ffe_post3_coeff_set0
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_post3_coeff_set3
cdr_ffe_post3_coeff_set3[29:24]
set3 of cdr ffe post3 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_post3_coeff_set2
cdr_ffe_post3_coeff_set2[21:16]
set2 of cdr ffe post3 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_post3_coeff_set1
cdr_ffe_post3_coeff_set1[13:8]
set1 of cdr ffe post3 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_post3_coeff_set0
cdr_ffe_post3_coeff_set0[5:0]
set0 of cdr ffe post3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000ab4 Register(32 bit) cdr_ffe_post3_set4to7
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aab4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_post3_coeff_set7 - cdr_ffe_post3_coeff_set6 - cdr_ffe_post3_coeff_set5 - cdr_ffe_post3_coeff_set4
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_post3_coeff_set7
cdr_ffe_post3_coeff_set7[29:24]
set7 of cdr ffe post3 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_post3_coeff_set6
cdr_ffe_post3_coeff_set6[21:16]
set6 of cdr ffe post3 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_post3_coeff_set5
cdr_ffe_post3_coeff_set5[13:8]
set5 of cdr ffe post3 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_post3_coeff_set4
cdr_ffe_post3_coeff_set4[5:0]
set4 of cdr ffe post3 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000ab8 Register(32 bit) cdr_ffe_post3_set8to11
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aab8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_post3_coeff_set11 - cdr_ffe_post3_coeff_set10 - cdr_ffe_post3_coeff_set9 - cdr_ffe_post3_coeff_set8
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_post3_coeff_set11
cdr_ffe_post3_coeff_set11[29:24]
set11 of cdr ffe post3 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_post3_coeff_set10
cdr_ffe_post3_coeff_set10[21:16]
set10 of cdr ffe post3 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_post3_coeff_set9
cdr_ffe_post3_coeff_set9[13:8]
set9 of cdr ffe post3 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_post3_coeff_set8
cdr_ffe_post3_coeff_set8[5:0]
set8 of cdr ffe post3 coeff

Reset: hex:0x00;

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+0x00000abc Register(32 bit) cdr_ffe_post3_set12to15
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aabc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_post3_coeff_set15 - cdr_ffe_post3_coeff_set14 - cdr_ffe_post3_coeff_set13 - cdr_ffe_post3_coeff_set12
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_post3_coeff_set15
cdr_ffe_post3_coeff_set15[29:24]
set15 of cdr ffe post3 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_post3_coeff_set14
cdr_ffe_post3_coeff_set14[21:16]
set14 of cdr ffe post3 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_post3_coeff_set13
cdr_ffe_post3_coeff_set13[13:8]
set13 of cdr ffe post3 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_post3_coeff_set12
cdr_ffe_post3_coeff_set12[5:0]
set12 of cdr ffe post3 coeff

Reset: hex:0x00;

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+0x00000ac0 Register(32 bit) cdr_ffe_post4_set0to3
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aac0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_post4_coeff_set3 - cdr_ffe_post4_coeff_set2 - cdr_ffe_post4_coeff_set1 - cdr_ffe_post4_coeff_set0
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_post4_coeff_set3
cdr_ffe_post4_coeff_set3[29:24]
set3 of cdr ffe post4 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_post4_coeff_set2
cdr_ffe_post4_coeff_set2[21:16]
set2 of cdr ffe post4 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_post4_coeff_set1
cdr_ffe_post4_coeff_set1[13:8]
set1 of cdr ffe post4 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_post4_coeff_set0
cdr_ffe_post4_coeff_set0[5:0]
set0 of cdr ffe post4 coeff

Reset: hex:0x00;

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+0x00000ac4 Register(32 bit) cdr_ffe_post4_set4to7
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aac4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_post4_coeff_set7 - cdr_ffe_post4_coeff_set6 - cdr_ffe_post4_coeff_set5 - cdr_ffe_post4_coeff_set4
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_post4_coeff_set7
cdr_ffe_post4_coeff_set7[29:24]
set7 of cdr ffe post4 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_post4_coeff_set6
cdr_ffe_post4_coeff_set6[21:16]
set6 of cdr ffe post4 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_post4_coeff_set5
cdr_ffe_post4_coeff_set5[13:8]
set5 of cdr ffe post4 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_post4_coeff_set4
cdr_ffe_post4_coeff_set4[5:0]
set4 of cdr ffe post4 coeff

Reset: hex:0x00;

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+0x00000ac8 Register(32 bit) cdr_ffe_post4_set8to11
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aac8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_post4_coeff_set11 - cdr_ffe_post4_coeff_set10 - cdr_ffe_post4_coeff_set9 - cdr_ffe_post4_coeff_set8
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_post4_coeff_set11
cdr_ffe_post4_coeff_set11[29:24]
set11 of cdr ffe post4 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_post4_coeff_set10
cdr_ffe_post4_coeff_set10[21:16]
set10 of cdr ffe post4 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_post4_coeff_set9
cdr_ffe_post4_coeff_set9[13:8]
set9 of cdr ffe post4 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_post4_coeff_set8
cdr_ffe_post4_coeff_set8[5:0]
set8 of cdr ffe post4 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000acc Register(32 bit) cdr_ffe_post4_set12to15
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aacc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xc0c0c0c0
Undefined 0xc0c0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0 - - 0 0 0 0 0 0
Name - cdr_ffe_post4_coeff_set15 - cdr_ffe_post4_coeff_set14 - cdr_ffe_post4_coeff_set13 - cdr_ffe_post4_coeff_set12
Access - RW/V - RW/V - RW/V - RW/V

[29:24]
RW/V

cdr_ffe_post4_coeff_set15
cdr_ffe_post4_coeff_set15[29:24]
set15 of cdr ffe post4 coeff

Reset: hex:0x00;

[21:16]
RW/V

cdr_ffe_post4_coeff_set14
cdr_ffe_post4_coeff_set14[21:16]
set14 of cdr ffe post4 coeff

Reset: hex:0x00;

[13:08]
RW/V

cdr_ffe_post4_coeff_set13
cdr_ffe_post4_coeff_set13[13:8]
set13 of cdr ffe post4 coeff

Reset: hex:0x00;

[05:00]
RW/V

cdr_ffe_post4_coeff_set12
cdr_ffe_post4_coeff_set12[5:0]
set12 of cdr ffe post4 coeff

Reset: hex:0x00;

Back to AddressMap

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+0x00000ad0 Register(32 bit) cdr_ffe_pre3_set0to3_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aad0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre3_coeff_set3_frac cdr_ffe_pre3_coeff_set2_frac cdr_ffe_pre3_coeff_set1_frac cdr_ffe_pre3_coeff_set0_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre3_coeff_set3_frac
cdr_ffe_pre3_coeff_set3_frac[31:24]
set3 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre3_coeff_set2_frac
cdr_ffe_pre3_coeff_set2_frac[23:16]
set2 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre3_coeff_set1_frac
cdr_ffe_pre3_coeff_set1_frac[15:8]
set1 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre3_coeff_set0_frac
cdr_ffe_pre3_coeff_set0_frac[7:0]
set0 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

Back to AddressMap

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+0x00000ad4 Register(32 bit) cdr_ffe_pre3_set4to7_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aad4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre3_coeff_set7_frac cdr_ffe_pre3_coeff_set6_frac cdr_ffe_pre3_coeff_set5_frac cdr_ffe_pre3_coeff_set4_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre3_coeff_set7_frac
cdr_ffe_pre3_coeff_set7_frac[31:24]
set7 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre3_coeff_set6_frac
cdr_ffe_pre3_coeff_set6_frac[23:16]
set6 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre3_coeff_set5_frac
cdr_ffe_pre3_coeff_set5_frac[15:8]
set5 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre3_coeff_set4_frac
cdr_ffe_pre3_coeff_set4_frac[7:0]
set4 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

Back to AddressMap

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+0x00000ad8 Register(32 bit) cdr_ffe_pre3_set8to11_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aad8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre3_coeff_set11_frac cdr_ffe_pre3_coeff_set10_frac cdr_ffe_pre3_coeff_set9_frac cdr_ffe_pre3_coeff_set8_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre3_coeff_set11_frac
cdr_ffe_pre3_coeff_set11_frac[31:24]
set11 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre3_coeff_set10_frac
cdr_ffe_pre3_coeff_set10_frac[23:16]
set10 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre3_coeff_set9_frac
cdr_ffe_pre3_coeff_set9_frac[15:8]
set9 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre3_coeff_set8_frac
cdr_ffe_pre3_coeff_set8_frac[7:0]
set8 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

Back to AddressMap

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+0x00000adc Register(32 bit) cdr_ffe_pre3_set12to15_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aadc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre3_coeff_set15_frac cdr_ffe_pre3_coeff_set14_frac cdr_ffe_pre3_coeff_set13_frac cdr_ffe_pre3_coeff_set12_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre3_coeff_set15_frac
cdr_ffe_pre3_coeff_set15_frac[31:24]
set15 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre3_coeff_set14_frac
cdr_ffe_pre3_coeff_set14_frac[23:16]
set14 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre3_coeff_set13_frac
cdr_ffe_pre3_coeff_set13_frac[15:8]
set13 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre3_coeff_set12_frac
cdr_ffe_pre3_coeff_set12_frac[7:0]
set12 of cdr ffe pre3 coeff frac

Reset: hex:0x00;

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+0x00000ae0 Register(32 bit) cdr_ffe_pre2_set0to3_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aae0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre2_coeff_set3_frac cdr_ffe_pre2_coeff_set2_frac cdr_ffe_pre2_coeff_set1_frac cdr_ffe_pre2_coeff_set0_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre2_coeff_set3_frac
cdr_ffe_pre2_coeff_set3_frac[31:24]
set3 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre2_coeff_set2_frac
cdr_ffe_pre2_coeff_set2_frac[23:16]
set2 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre2_coeff_set1_frac
cdr_ffe_pre2_coeff_set1_frac[15:8]
set1 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre2_coeff_set0_frac
cdr_ffe_pre2_coeff_set0_frac[7:0]
set0 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

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+0x00000ae4 Register(32 bit) cdr_ffe_pre2_set4to7_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aae4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre2_coeff_set7_frac cdr_ffe_pre2_coeff_set6_frac cdr_ffe_pre2_coeff_set5_frac cdr_ffe_pre2_coeff_set4_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre2_coeff_set7_frac
cdr_ffe_pre2_coeff_set7_frac[31:24]
set7 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre2_coeff_set6_frac
cdr_ffe_pre2_coeff_set6_frac[23:16]
set6 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre2_coeff_set5_frac
cdr_ffe_pre2_coeff_set5_frac[15:8]
set5 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre2_coeff_set4_frac
cdr_ffe_pre2_coeff_set4_frac[7:0]
set4 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

Back to AddressMap

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+0x00000ae8 Register(32 bit) cdr_ffe_pre2_set8to11_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aae8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre2_coeff_set11_frac cdr_ffe_pre2_coeff_set10_frac cdr_ffe_pre2_coeff_set9_frac cdr_ffe_pre2_coeff_set8_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre2_coeff_set11_frac
cdr_ffe_pre2_coeff_set11_frac[31:24]
set11 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre2_coeff_set10_frac
cdr_ffe_pre2_coeff_set10_frac[23:16]
set10 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre2_coeff_set9_frac
cdr_ffe_pre2_coeff_set9_frac[15:8]
set9 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre2_coeff_set8_frac
cdr_ffe_pre2_coeff_set8_frac[7:0]
set8 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

Back to AddressMap

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+0x00000aec Register(32 bit) cdr_ffe_pre2_set12to15_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aaec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_pre2_coeff_set15_frac cdr_ffe_pre2_coeff_set14_frac cdr_ffe_pre2_coeff_set13_frac cdr_ffe_pre2_coeff_set12_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_pre2_coeff_set15_frac
cdr_ffe_pre2_coeff_set15_frac[31:24]
set15 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_pre2_coeff_set14_frac
cdr_ffe_pre2_coeff_set14_frac[23:16]
set14 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_pre2_coeff_set13_frac
cdr_ffe_pre2_coeff_set13_frac[15:8]
set13 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_pre2_coeff_set12_frac
cdr_ffe_pre2_coeff_set12_frac[7:0]
set12 of cdr ffe pre2 coeff frac

Reset: hex:0x00;

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+0x00000af0 Register(32 bit) cdr_ffe_post2_set0to3_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aaf0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post2_coeff_set3_frac cdr_ffe_post2_coeff_set2_frac cdr_ffe_post2_coeff_set1_frac cdr_ffe_post2_coeff_set0_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post2_coeff_set3_frac
cdr_ffe_post2_coeff_set3_frac[31:24]
set3 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post2_coeff_set2_frac
cdr_ffe_post2_coeff_set2_frac[23:16]
set2 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post2_coeff_set1_frac
cdr_ffe_post2_coeff_set1_frac[15:8]
set1 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post2_coeff_set0_frac
cdr_ffe_post2_coeff_set0_frac[7:0]
set0 of cdr ffe post2 coeff frac

Reset: hex:0x00;

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+0x00000af4 Register(32 bit) cdr_ffe_post2_set4to7_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aaf4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post2_coeff_set7_frac cdr_ffe_post2_coeff_set6_frac cdr_ffe_post2_coeff_set5_frac cdr_ffe_post2_coeff_set4_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post2_coeff_set7_frac
cdr_ffe_post2_coeff_set7_frac[31:24]
set7 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post2_coeff_set6_frac
cdr_ffe_post2_coeff_set6_frac[23:16]
set6 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post2_coeff_set5_frac
cdr_ffe_post2_coeff_set5_frac[15:8]
set5 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post2_coeff_set4_frac
cdr_ffe_post2_coeff_set4_frac[7:0]
set4 of cdr ffe post2 coeff frac

Reset: hex:0x00;

Back to AddressMap

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+0x00000af8 Register(32 bit) cdr_ffe_post2_set8to11_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aaf8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post2_coeff_set11_frac cdr_ffe_post2_coeff_set10_frac cdr_ffe_post2_coeff_set9_frac cdr_ffe_post2_coeff_set8_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post2_coeff_set11_frac
cdr_ffe_post2_coeff_set11_frac[31:24]
set11 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post2_coeff_set10_frac
cdr_ffe_post2_coeff_set10_frac[23:16]
set10 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post2_coeff_set9_frac
cdr_ffe_post2_coeff_set9_frac[15:8]
set9 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post2_coeff_set8_frac
cdr_ffe_post2_coeff_set8_frac[7:0]
set8 of cdr ffe post2 coeff frac

Reset: hex:0x00;

Back to AddressMap

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+0x00000afc Register(32 bit) cdr_ffe_post2_set12to15_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aafc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post2_coeff_set15_frac cdr_ffe_post2_coeff_set14_frac cdr_ffe_post2_coeff_set13_frac cdr_ffe_post2_coeff_set12_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post2_coeff_set15_frac
cdr_ffe_post2_coeff_set15_frac[31:24]
set15 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post2_coeff_set14_frac
cdr_ffe_post2_coeff_set14_frac[23:16]
set14 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post2_coeff_set13_frac
cdr_ffe_post2_coeff_set13_frac[15:8]
set13 of cdr ffe post2 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post2_coeff_set12_frac
cdr_ffe_post2_coeff_set12_frac[7:0]
set12 of cdr ffe post2 coeff frac

Reset: hex:0x00;

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+0x00000b00 Register(32 bit) cdr_ffe_post3_set0to3_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab00 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post3_coeff_set3_frac cdr_ffe_post3_coeff_set2_frac cdr_ffe_post3_coeff_set1_frac cdr_ffe_post3_coeff_set0_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post3_coeff_set3_frac
cdr_ffe_post3_coeff_set3_frac[31:24]
set3 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post3_coeff_set2_frac
cdr_ffe_post3_coeff_set2_frac[23:16]
set2 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post3_coeff_set1_frac
cdr_ffe_post3_coeff_set1_frac[15:8]
set1 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post3_coeff_set0_frac
cdr_ffe_post3_coeff_set0_frac[7:0]
set0 of cdr ffe post3 coeff frac

Reset: hex:0x00;

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+0x00000b04 Register(32 bit) cdr_ffe_post3_set4to7_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab04 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post3_coeff_set7_frac cdr_ffe_post3_coeff_set6_frac cdr_ffe_post3_coeff_set5_frac cdr_ffe_post3_coeff_set4_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post3_coeff_set7_frac
cdr_ffe_post3_coeff_set7_frac[31:24]
set7 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post3_coeff_set6_frac
cdr_ffe_post3_coeff_set6_frac[23:16]
set6 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post3_coeff_set5_frac
cdr_ffe_post3_coeff_set5_frac[15:8]
set5 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post3_coeff_set4_frac
cdr_ffe_post3_coeff_set4_frac[7:0]
set4 of cdr ffe post3 coeff frac

Reset: hex:0x00;

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+0x00000b08 Register(32 bit) cdr_ffe_post3_set8to11_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab08 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post3_coeff_set11_frac cdr_ffe_post3_coeff_set10_frac cdr_ffe_post3_coeff_set9_frac cdr_ffe_post3_coeff_set8_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post3_coeff_set11_frac
cdr_ffe_post3_coeff_set11_frac[31:24]
set11 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post3_coeff_set10_frac
cdr_ffe_post3_coeff_set10_frac[23:16]
set10 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post3_coeff_set9_frac
cdr_ffe_post3_coeff_set9_frac[15:8]
set9 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post3_coeff_set8_frac
cdr_ffe_post3_coeff_set8_frac[7:0]
set8 of cdr ffe post3 coeff frac

Reset: hex:0x00;

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+0x00000b0c Register(32 bit) cdr_ffe_post3_set12to15_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab0c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post3_coeff_set15_frac cdr_ffe_post3_coeff_set14_frac cdr_ffe_post3_coeff_set13_frac cdr_ffe_post3_coeff_set12_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post3_coeff_set15_frac
cdr_ffe_post3_coeff_set15_frac[31:24]
set15 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post3_coeff_set14_frac
cdr_ffe_post3_coeff_set14_frac[23:16]
set14 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post3_coeff_set13_frac
cdr_ffe_post3_coeff_set13_frac[15:8]
set13 of cdr ffe post3 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post3_coeff_set12_frac
cdr_ffe_post3_coeff_set12_frac[7:0]
set12 of cdr ffe post3 coeff frac

Reset: hex:0x00;

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+0x00000b10 Register(32 bit) cdr_ffe_post4_set0to3_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab10 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post4_coeff_set3_frac cdr_ffe_post4_coeff_set2_frac cdr_ffe_post4_coeff_set1_frac cdr_ffe_post4_coeff_set0_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post4_coeff_set3_frac
cdr_ffe_post4_coeff_set3_frac[31:24]
set3 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post4_coeff_set2_frac
cdr_ffe_post4_coeff_set2_frac[23:16]
set2 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post4_coeff_set1_frac
cdr_ffe_post4_coeff_set1_frac[15:8]
set1 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post4_coeff_set0_frac
cdr_ffe_post4_coeff_set0_frac[7:0]
set0 of cdr ffe post4 coeff frac

Reset: hex:0x00;

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+0x00000b14 Register(32 bit) cdr_ffe_post4_set4to7_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab14 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post4_coeff_set7_frac cdr_ffe_post4_coeff_set6_frac cdr_ffe_post4_coeff_set5_frac cdr_ffe_post4_coeff_set4_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post4_coeff_set7_frac
cdr_ffe_post4_coeff_set7_frac[31:24]
set7 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post4_coeff_set6_frac
cdr_ffe_post4_coeff_set6_frac[23:16]
set6 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post4_coeff_set5_frac
cdr_ffe_post4_coeff_set5_frac[15:8]
set5 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post4_coeff_set4_frac
cdr_ffe_post4_coeff_set4_frac[7:0]
set4 of cdr ffe post4 coeff frac

Reset: hex:0x00;

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+0x00000b18 Register(32 bit) cdr_ffe_post4_set8to11_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab18 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post4_coeff_set11_frac cdr_ffe_post4_coeff_set10_frac cdr_ffe_post4_coeff_set9_frac cdr_ffe_post4_coeff_set8_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post4_coeff_set11_frac
cdr_ffe_post4_coeff_set11_frac[31:24]
set11 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post4_coeff_set10_frac
cdr_ffe_post4_coeff_set10_frac[23:16]
set10 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post4_coeff_set9_frac
cdr_ffe_post4_coeff_set9_frac[15:8]
set9 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post4_coeff_set8_frac
cdr_ffe_post4_coeff_set8_frac[7:0]
set8 of cdr ffe post4 coeff frac

Reset: hex:0x00;

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+0x00000b1c Register(32 bit) cdr_ffe_post4_set12to15_frac
Rx SAR Array valid
Rx SAR Array valid

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab1c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name cdr_ffe_post4_coeff_set15_frac cdr_ffe_post4_coeff_set14_frac cdr_ffe_post4_coeff_set13_frac cdr_ffe_post4_coeff_set12_frac
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

cdr_ffe_post4_coeff_set15_frac
cdr_ffe_post4_coeff_set15_frac[31:24]
set15 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[23:16]
RW/V

cdr_ffe_post4_coeff_set14_frac
cdr_ffe_post4_coeff_set14_frac[23:16]
set14 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_post4_coeff_set13_frac
cdr_ffe_post4_coeff_set13_frac[15:8]
set13 of cdr ffe post4 coeff frac

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_post4_coeff_set12_frac
cdr_ffe_post4_coeff_set12_frac[7:0]
set12 of cdr ffe post4 coeff frac

Reset: hex:0x00;

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+0x00000b20 Register(32 bit) saturation_status_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab20 at NOC.jesd__axi (Mem)

Access RO/C/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffff80
Undefined 0xffffff80

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0 0 0
Name - cdr_ffe_tap_post4_sat cdr_ffe_tap_post3_sat cdr_ffe_tap_post2_sat cdr_ffe_tap_post1_sat cdr_ffe_tap_pre1_sat cdr_ffe_tap_pre2_sat cdr_ffe_tap_pre3_sat
Access - RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V

[06:06]
RO/C/V

cdr_ffe_tap_post4_sat
cdr_ffe_tap_post4_sat[6:6]
cdr_ffe_tap_post4 saturated

Reset: hex:0x0;

[05:05]
RO/C/V

cdr_ffe_tap_post3_sat
cdr_ffe_tap_post3_sat[5:5]
cdr_ffe_tap_post3 saturated

Reset: hex:0x0;

[04:04]
RO/C/V

cdr_ffe_tap_post2_sat
cdr_ffe_tap_post2_sat[4:4]
cdr_ffe_tap_post2 saturated

Reset: hex:0x0;

[03:03]
RO/C/V

cdr_ffe_tap_post1_sat
cdr_ffe_tap_post1_sat[3:3]
cdr_ffe_tap_post1 saturated

Reset: hex:0x0;

[02:02]
RO/C/V

cdr_ffe_tap_pre1_sat
cdr_ffe_tap_pre1_sat[2:2]
cdr_ffe_tap_pre1 saturated

Reset: hex:0x0;

[01:01]
RO/C/V

cdr_ffe_tap_pre2_sat
cdr_ffe_tap_pre2_sat[1:1]
cdr_ffe_tap_pre2 saturated

Reset: hex:0x0;

[00:00]
RO/C/V

cdr_ffe_tap_pre3_sat
cdr_ffe_tap_pre3_sat[0:0]
cdr_ffe_tap_pre3 saturated

Reset: hex:0x0;

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+0x00000b24 Register(32 bit) affe_if_control_0
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab24 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xfffffffc
Undefined 0xfffffffc

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0
Name - affe_taps_backup_load affe_taps_backup
Access - RW/V RW/V

[01:01]
RW/V

affe_taps_backup_load
affe_taps_backup_load[1:1]
Write one to load backup sets of cached affe taps to current affe taps, self cleared

Reset: hex:0x0;

[00:00]
RW/V

affe_taps_backup
affe_taps_backup[0:0]
Write one to backup all sets of current affe taps to HW cache, self cleared

Reset: hex:0x0;

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+0x00000b28 Register(32 bit) ops_taps_b0_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab28 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g0_sar3 ops_taps_b0_g0_sar2 ops_taps_b0_g0_sar1 ops_taps_b0_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g0_sar3
ops_taps_b0_g0_sar3[31:24]
OPS Sar3 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g0_sar2
ops_taps_b0_g0_sar2[23:16]
OPS Sar2 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g0_sar1
ops_taps_b0_g0_sar1[15:8]
OPS Sar1 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g0_sar0
ops_taps_b0_g0_sar0[7:0]
OPS Sar0 tap value on bit 0

Reset: hex:0x00;

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+0x00000b2c Register(32 bit) ops_taps_b0_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab2c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g0_sar7 ops_taps_b0_g0_sar6 ops_taps_b0_g0_sar5 ops_taps_b0_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g0_sar7
ops_taps_b0_g0_sar7[31:24]
OPS Sar7 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g0_sar6
ops_taps_b0_g0_sar6[23:16]
OPS Sar6 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g0_sar5
ops_taps_b0_g0_sar5[15:8]
OPS Sar5 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g0_sar4
ops_taps_b0_g0_sar4[7:0]
OPS Sar4 tap value on bit 0

Reset: hex:0x00;

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+0x00000b30 Register(32 bit) ops_taps_b0_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab30 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g1_sar3 ops_taps_b0_g1_sar2 ops_taps_b0_g1_sar1 ops_taps_b0_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g1_sar3
ops_taps_b0_g1_sar3[31:24]
OPS Sar11 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g1_sar2
ops_taps_b0_g1_sar2[23:16]
OPS Sar10 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g1_sar1
ops_taps_b0_g1_sar1[15:8]
OPS Sar9 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g1_sar0
ops_taps_b0_g1_sar0[7:0]
OPS Sar8 tap value on bit 0

Reset: hex:0x00;

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+0x00000b34 Register(32 bit) ops_taps_b0_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab34 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g1_sar7 ops_taps_b0_g1_sar6 ops_taps_b0_g1_sar5 ops_taps_b0_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g1_sar7
ops_taps_b0_g1_sar7[31:24]
OPS Sar15 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g1_sar6
ops_taps_b0_g1_sar6[23:16]
OPS Sar14 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g1_sar5
ops_taps_b0_g1_sar5[15:8]
OPS Sar13 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g1_sar4
ops_taps_b0_g1_sar4[7:0]
OPS Sar12 tap value on bit 0

Reset: hex:0x00;

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+0x00000b38 Register(32 bit) ops_taps_b0_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab38 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g2_sar3 ops_taps_b0_g2_sar2 ops_taps_b0_g2_sar1 ops_taps_b0_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g2_sar3
ops_taps_b0_g2_sar3[31:24]
OPS Sar19 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g2_sar2
ops_taps_b0_g2_sar2[23:16]
OPS Sar18 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g2_sar1
ops_taps_b0_g2_sar1[15:8]
OPS Sar17 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g2_sar0
ops_taps_b0_g2_sar0[7:0]
OPS Sar16 tap value on bit 0

Reset: hex:0x00;

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+0x00000b3c Register(32 bit) ops_taps_b0_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab3c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g2_sar7 ops_taps_b0_g2_sar6 ops_taps_b0_g2_sar5 ops_taps_b0_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g2_sar7
ops_taps_b0_g2_sar7[31:24]
OPS Sar23 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g2_sar6
ops_taps_b0_g2_sar6[23:16]
OPS Sar22 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g2_sar5
ops_taps_b0_g2_sar5[15:8]
OPS Sar21 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g2_sar4
ops_taps_b0_g2_sar4[7:0]
OPS Sar20 tap value on bit 0

Reset: hex:0x00;

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+0x00000b40 Register(32 bit) ops_taps_b0_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab40 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g3_sar3 ops_taps_b0_g3_sar2 ops_taps_b0_g3_sar1 ops_taps_b0_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g3_sar3
ops_taps_b0_g3_sar3[31:24]
OPS Sar27 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g3_sar2
ops_taps_b0_g3_sar2[23:16]
OPS Sar26 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g3_sar1
ops_taps_b0_g3_sar1[15:8]
OPS Sar25 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g3_sar0
ops_taps_b0_g3_sar0[7:0]
OPS Sar24 tap value on bit 0

Reset: hex:0x00;

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+0x00000b44 Register(32 bit) ops_taps_b0_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab44 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g3_sar7 ops_taps_b0_g3_sar6 ops_taps_b0_g3_sar5 ops_taps_b0_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g3_sar7
ops_taps_b0_g3_sar7[31:24]
OPS Sar31 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g3_sar6
ops_taps_b0_g3_sar6[23:16]
OPS Sar30 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g3_sar5
ops_taps_b0_g3_sar5[15:8]
OPS Sar29 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g3_sar4
ops_taps_b0_g3_sar4[7:0]
OPS Sar28 tap value on bit 0

Reset: hex:0x00;

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+0x00000b48 Register(32 bit) ops_taps_b0_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab48 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g4_sar3 ops_taps_b0_g4_sar2 ops_taps_b0_g4_sar1 ops_taps_b0_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g4_sar3
ops_taps_b0_g4_sar3[31:24]
OPS Sar35 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g4_sar2
ops_taps_b0_g4_sar2[23:16]
OPS Sar34 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g4_sar1
ops_taps_b0_g4_sar1[15:8]
OPS Sar33 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g4_sar0
ops_taps_b0_g4_sar0[7:0]
OPS Sar32 tap value on bit 0

Reset: hex:0x00;

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+0x00000b4c Register(32 bit) ops_taps_b0_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab4c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g4_sar7 ops_taps_b0_g4_sar6 ops_taps_b0_g4_sar5 ops_taps_b0_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g4_sar7
ops_taps_b0_g4_sar7[31:24]
OPS Sar39 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g4_sar6
ops_taps_b0_g4_sar6[23:16]
OPS Sar38 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g4_sar5
ops_taps_b0_g4_sar5[15:8]
OPS Sar37 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g4_sar4
ops_taps_b0_g4_sar4[7:0]
OPS Sar36 tap value on bit 0

Reset: hex:0x00;

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+0x00000b50 Register(32 bit) ops_taps_b0_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab50 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g5_sar3 ops_taps_b0_g5_sar2 ops_taps_b0_g5_sar1 ops_taps_b0_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g5_sar3
ops_taps_b0_g5_sar3[31:24]
OPS Sar43 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g5_sar2
ops_taps_b0_g5_sar2[23:16]
OPS Sar42 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g5_sar1
ops_taps_b0_g5_sar1[15:8]
OPS Sar41 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g5_sar0
ops_taps_b0_g5_sar0[7:0]
OPS Sar40 tap value on bit 0

Reset: hex:0x00;

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+0x00000b54 Register(32 bit) ops_taps_b0_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab54 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g5_sar7 ops_taps_b0_g5_sar6 ops_taps_b0_g5_sar5 ops_taps_b0_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g5_sar7
ops_taps_b0_g5_sar7[31:24]
OPS Sar47 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g5_sar6
ops_taps_b0_g5_sar6[23:16]
OPS Sar46 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g5_sar5
ops_taps_b0_g5_sar5[15:8]
OPS Sar45 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g5_sar4
ops_taps_b0_g5_sar4[7:0]
OPS Sar44 tap value on bit 0

Reset: hex:0x00;

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+0x00000b58 Register(32 bit) ops_taps_b0_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab58 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g6_sar3 ops_taps_b0_g6_sar2 ops_taps_b0_g6_sar1 ops_taps_b0_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g6_sar3
ops_taps_b0_g6_sar3[31:24]
OPS Sar51 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g6_sar2
ops_taps_b0_g6_sar2[23:16]
OPS Sar50 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g6_sar1
ops_taps_b0_g6_sar1[15:8]
OPS Sar49 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g6_sar0
ops_taps_b0_g6_sar0[7:0]
OPS Sar48 tap value on bit 0

Reset: hex:0x00;

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+0x00000b5c Register(32 bit) ops_taps_b0_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab5c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g6_sar7 ops_taps_b0_g6_sar6 ops_taps_b0_g6_sar5 ops_taps_b0_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g6_sar7
ops_taps_b0_g6_sar7[31:24]
OPS Sar55 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g6_sar6
ops_taps_b0_g6_sar6[23:16]
OPS Sar54 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g6_sar5
ops_taps_b0_g6_sar5[15:8]
OPS Sar53 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g6_sar4
ops_taps_b0_g6_sar4[7:0]
OPS Sar52 tap value on bit 0

Reset: hex:0x00;

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+0x00000b60 Register(32 bit) ops_taps_b0_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab60 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g7_sar3 ops_taps_b0_g7_sar2 ops_taps_b0_g7_sar1 ops_taps_b0_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g7_sar3
ops_taps_b0_g7_sar3[31:24]
OPS Sar59 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g7_sar2
ops_taps_b0_g7_sar2[23:16]
OPS Sar58 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g7_sar1
ops_taps_b0_g7_sar1[15:8]
OPS Sar57 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g7_sar0
ops_taps_b0_g7_sar0[7:0]
OPS Sar56 tap value on bit 0

Reset: hex:0x00;

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+0x00000b64 Register(32 bit) ops_taps_b0_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab64 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b0_g7_sar7 ops_taps_b0_g7_sar6 ops_taps_b0_g7_sar5 ops_taps_b0_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b0_g7_sar7
ops_taps_b0_g7_sar7[31:24]
OPS Sar63 tap value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b0_g7_sar6
ops_taps_b0_g7_sar6[23:16]
OPS Sar62 tap value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b0_g7_sar5
ops_taps_b0_g7_sar5[15:8]
OPS Sar61 tap value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b0_g7_sar4
ops_taps_b0_g7_sar4[7:0]
OPS Sar60 tap value on bit 0

Reset: hex:0x00;

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+0x00000b68 Register(32 bit) ops_taps_b1_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab68 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g0_sar3 ops_taps_b1_g0_sar2 ops_taps_b1_g0_sar1 ops_taps_b1_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g0_sar3
ops_taps_b1_g0_sar3[31:24]
OPS Sar3 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g0_sar2
ops_taps_b1_g0_sar2[23:16]
OPS Sar2 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g0_sar1
ops_taps_b1_g0_sar1[15:8]
OPS Sar1 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g0_sar0
ops_taps_b1_g0_sar0[7:0]
OPS Sar0 tap value on bit 1

Reset: hex:0x00;

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+0x00000b6c Register(32 bit) ops_taps_b1_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab6c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g0_sar7 ops_taps_b1_g0_sar6 ops_taps_b1_g0_sar5 ops_taps_b1_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g0_sar7
ops_taps_b1_g0_sar7[31:24]
OPS Sar7 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g0_sar6
ops_taps_b1_g0_sar6[23:16]
OPS Sar6 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g0_sar5
ops_taps_b1_g0_sar5[15:8]
OPS Sar5 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g0_sar4
ops_taps_b1_g0_sar4[7:0]
OPS Sar4 tap value on bit 1

Reset: hex:0x00;

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+0x00000b70 Register(32 bit) ops_taps_b1_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab70 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g1_sar3 ops_taps_b1_g1_sar2 ops_taps_b1_g1_sar1 ops_taps_b1_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g1_sar3
ops_taps_b1_g1_sar3[31:24]
OPS Sar11 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g1_sar2
ops_taps_b1_g1_sar2[23:16]
OPS Sar10 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g1_sar1
ops_taps_b1_g1_sar1[15:8]
OPS Sar9 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g1_sar0
ops_taps_b1_g1_sar0[7:0]
OPS Sar8 tap value on bit 1

Reset: hex:0x00;

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+0x00000b74 Register(32 bit) ops_taps_b1_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab74 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g1_sar7 ops_taps_b1_g1_sar6 ops_taps_b1_g1_sar5 ops_taps_b1_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g1_sar7
ops_taps_b1_g1_sar7[31:24]
OPS Sar15 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g1_sar6
ops_taps_b1_g1_sar6[23:16]
OPS Sar14 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g1_sar5
ops_taps_b1_g1_sar5[15:8]
OPS Sar13 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g1_sar4
ops_taps_b1_g1_sar4[7:0]
OPS Sar12 tap value on bit 1

Reset: hex:0x00;

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+0x00000b78 Register(32 bit) ops_taps_b1_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab78 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g2_sar3 ops_taps_b1_g2_sar2 ops_taps_b1_g2_sar1 ops_taps_b1_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g2_sar3
ops_taps_b1_g2_sar3[31:24]
OPS Sar19 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g2_sar2
ops_taps_b1_g2_sar2[23:16]
OPS Sar18 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g2_sar1
ops_taps_b1_g2_sar1[15:8]
OPS Sar17 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g2_sar0
ops_taps_b1_g2_sar0[7:0]
OPS Sar16 tap value on bit 1

Reset: hex:0x00;

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+0x00000b7c Register(32 bit) ops_taps_b1_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab7c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g2_sar7 ops_taps_b1_g2_sar6 ops_taps_b1_g2_sar5 ops_taps_b1_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g2_sar7
ops_taps_b1_g2_sar7[31:24]
OPS Sar23 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g2_sar6
ops_taps_b1_g2_sar6[23:16]
OPS Sar22 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g2_sar5
ops_taps_b1_g2_sar5[15:8]
OPS Sar21 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g2_sar4
ops_taps_b1_g2_sar4[7:0]
OPS Sar20 tap value on bit 1

Reset: hex:0x00;

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+0x00000b80 Register(32 bit) ops_taps_b1_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab80 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g3_sar3 ops_taps_b1_g3_sar2 ops_taps_b1_g3_sar1 ops_taps_b1_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g3_sar3
ops_taps_b1_g3_sar3[31:24]
OPS Sar27 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g3_sar2
ops_taps_b1_g3_sar2[23:16]
OPS Sar26 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g3_sar1
ops_taps_b1_g3_sar1[15:8]
OPS Sar25 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g3_sar0
ops_taps_b1_g3_sar0[7:0]
OPS Sar24 tap value on bit 1

Reset: hex:0x00;

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+0x00000b84 Register(32 bit) ops_taps_b1_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab84 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g3_sar7 ops_taps_b1_g3_sar6 ops_taps_b1_g3_sar5 ops_taps_b1_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g3_sar7
ops_taps_b1_g3_sar7[31:24]
OPS Sar31 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g3_sar6
ops_taps_b1_g3_sar6[23:16]
OPS Sar30 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g3_sar5
ops_taps_b1_g3_sar5[15:8]
OPS Sar29 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g3_sar4
ops_taps_b1_g3_sar4[7:0]
OPS Sar28 tap value on bit 1

Reset: hex:0x00;

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+0x00000b88 Register(32 bit) ops_taps_b1_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab88 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g4_sar3 ops_taps_b1_g4_sar2 ops_taps_b1_g4_sar1 ops_taps_b1_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g4_sar3
ops_taps_b1_g4_sar3[31:24]
OPS Sar35 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g4_sar2
ops_taps_b1_g4_sar2[23:16]
OPS Sar34 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g4_sar1
ops_taps_b1_g4_sar1[15:8]
OPS Sar33 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g4_sar0
ops_taps_b1_g4_sar0[7:0]
OPS Sar32 tap value on bit 1

Reset: hex:0x00;

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+0x00000b8c Register(32 bit) ops_taps_b1_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab8c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g4_sar7 ops_taps_b1_g4_sar6 ops_taps_b1_g4_sar5 ops_taps_b1_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g4_sar7
ops_taps_b1_g4_sar7[31:24]
OPS Sar39 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g4_sar6
ops_taps_b1_g4_sar6[23:16]
OPS Sar38 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g4_sar5
ops_taps_b1_g4_sar5[15:8]
OPS Sar37 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g4_sar4
ops_taps_b1_g4_sar4[7:0]
OPS Sar36 tap value on bit 1

Reset: hex:0x00;

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+0x00000b90 Register(32 bit) ops_taps_b1_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab90 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g5_sar3 ops_taps_b1_g5_sar2 ops_taps_b1_g5_sar1 ops_taps_b1_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g5_sar3
ops_taps_b1_g5_sar3[31:24]
OPS Sar43 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g5_sar2
ops_taps_b1_g5_sar2[23:16]
OPS Sar42 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g5_sar1
ops_taps_b1_g5_sar1[15:8]
OPS Sar41 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g5_sar0
ops_taps_b1_g5_sar0[7:0]
OPS Sar40 tap value on bit 1

Reset: hex:0x00;

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+0x00000b94 Register(32 bit) ops_taps_b1_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab94 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g5_sar7 ops_taps_b1_g5_sar6 ops_taps_b1_g5_sar5 ops_taps_b1_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g5_sar7
ops_taps_b1_g5_sar7[31:24]
OPS Sar47 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g5_sar6
ops_taps_b1_g5_sar6[23:16]
OPS Sar46 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g5_sar5
ops_taps_b1_g5_sar5[15:8]
OPS Sar45 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g5_sar4
ops_taps_b1_g5_sar4[7:0]
OPS Sar44 tap value on bit 1

Reset: hex:0x00;

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+0x00000b98 Register(32 bit) ops_taps_b1_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab98 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g6_sar3 ops_taps_b1_g6_sar2 ops_taps_b1_g6_sar1 ops_taps_b1_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g6_sar3
ops_taps_b1_g6_sar3[31:24]
OPS Sar51 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g6_sar2
ops_taps_b1_g6_sar2[23:16]
OPS Sar50 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g6_sar1
ops_taps_b1_g6_sar1[15:8]
OPS Sar49 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g6_sar0
ops_taps_b1_g6_sar0[7:0]
OPS Sar48 tap value on bit 1

Reset: hex:0x00;

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+0x00000b9c Register(32 bit) ops_taps_b1_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ab9c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g6_sar7 ops_taps_b1_g6_sar6 ops_taps_b1_g6_sar5 ops_taps_b1_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g6_sar7
ops_taps_b1_g6_sar7[31:24]
OPS Sar55 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g6_sar6
ops_taps_b1_g6_sar6[23:16]
OPS Sar54 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g6_sar5
ops_taps_b1_g6_sar5[15:8]
OPS Sar53 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g6_sar4
ops_taps_b1_g6_sar4[7:0]
OPS Sar52 tap value on bit 1

Reset: hex:0x00;

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+0x00000ba0 Register(32 bit) ops_taps_b1_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aba0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g7_sar3 ops_taps_b1_g7_sar2 ops_taps_b1_g7_sar1 ops_taps_b1_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g7_sar3
ops_taps_b1_g7_sar3[31:24]
OPS Sar59 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g7_sar2
ops_taps_b1_g7_sar2[23:16]
OPS Sar58 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g7_sar1
ops_taps_b1_g7_sar1[15:8]
OPS Sar57 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g7_sar0
ops_taps_b1_g7_sar0[7:0]
OPS Sar56 tap value on bit 1

Reset: hex:0x00;

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+0x00000ba4 Register(32 bit) ops_taps_b1_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aba4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b1_g7_sar7 ops_taps_b1_g7_sar6 ops_taps_b1_g7_sar5 ops_taps_b1_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b1_g7_sar7
ops_taps_b1_g7_sar7[31:24]
OPS Sar63 tap value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b1_g7_sar6
ops_taps_b1_g7_sar6[23:16]
OPS Sar62 tap value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b1_g7_sar5
ops_taps_b1_g7_sar5[15:8]
OPS Sar61 tap value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b1_g7_sar4
ops_taps_b1_g7_sar4[7:0]
OPS Sar60 tap value on bit 1

Reset: hex:0x00;

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+0x00000ba8 Register(32 bit) ops_taps_b2_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aba8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g0_sar3 ops_taps_b2_g0_sar2 ops_taps_b2_g0_sar1 ops_taps_b2_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g0_sar3
ops_taps_b2_g0_sar3[31:24]
OPS Sar3 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g0_sar2
ops_taps_b2_g0_sar2[23:16]
OPS Sar2 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g0_sar1
ops_taps_b2_g0_sar1[15:8]
OPS Sar1 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g0_sar0
ops_taps_b2_g0_sar0[7:0]
OPS Sar0 tap value on bit 2

Reset: hex:0x00;

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+0x00000bac Register(32 bit) ops_taps_b2_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g0_sar7 ops_taps_b2_g0_sar6 ops_taps_b2_g0_sar5 ops_taps_b2_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g0_sar7
ops_taps_b2_g0_sar7[31:24]
OPS Sar7 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g0_sar6
ops_taps_b2_g0_sar6[23:16]
OPS Sar6 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g0_sar5
ops_taps_b2_g0_sar5[15:8]
OPS Sar5 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g0_sar4
ops_taps_b2_g0_sar4[7:0]
OPS Sar4 tap value on bit 2

Reset: hex:0x00;

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+0x00000bb0 Register(32 bit) ops_taps_b2_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abb0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g1_sar3 ops_taps_b2_g1_sar2 ops_taps_b2_g1_sar1 ops_taps_b2_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g1_sar3
ops_taps_b2_g1_sar3[31:24]
OPS Sar11 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g1_sar2
ops_taps_b2_g1_sar2[23:16]
OPS Sar10 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g1_sar1
ops_taps_b2_g1_sar1[15:8]
OPS Sar9 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g1_sar0
ops_taps_b2_g1_sar0[7:0]
OPS Sar8 tap value on bit 2

Reset: hex:0x00;

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+0x00000bb4 Register(32 bit) ops_taps_b2_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abb4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g1_sar7 ops_taps_b2_g1_sar6 ops_taps_b2_g1_sar5 ops_taps_b2_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g1_sar7
ops_taps_b2_g1_sar7[31:24]
OPS Sar15 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g1_sar6
ops_taps_b2_g1_sar6[23:16]
OPS Sar14 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g1_sar5
ops_taps_b2_g1_sar5[15:8]
OPS Sar13 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g1_sar4
ops_taps_b2_g1_sar4[7:0]
OPS Sar12 tap value on bit 2

Reset: hex:0x00;

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+0x00000bb8 Register(32 bit) ops_taps_b2_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abb8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g2_sar3 ops_taps_b2_g2_sar2 ops_taps_b2_g2_sar1 ops_taps_b2_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g2_sar3
ops_taps_b2_g2_sar3[31:24]
OPS Sar19 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g2_sar2
ops_taps_b2_g2_sar2[23:16]
OPS Sar18 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g2_sar1
ops_taps_b2_g2_sar1[15:8]
OPS Sar17 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g2_sar0
ops_taps_b2_g2_sar0[7:0]
OPS Sar16 tap value on bit 2

Reset: hex:0x00;

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+0x00000bbc Register(32 bit) ops_taps_b2_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abbc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g2_sar7 ops_taps_b2_g2_sar6 ops_taps_b2_g2_sar5 ops_taps_b2_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g2_sar7
ops_taps_b2_g2_sar7[31:24]
OPS Sar23 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g2_sar6
ops_taps_b2_g2_sar6[23:16]
OPS Sar22 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g2_sar5
ops_taps_b2_g2_sar5[15:8]
OPS Sar21 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g2_sar4
ops_taps_b2_g2_sar4[7:0]
OPS Sar20 tap value on bit 2

Reset: hex:0x00;

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+0x00000bc0 Register(32 bit) ops_taps_b2_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abc0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g3_sar3 ops_taps_b2_g3_sar2 ops_taps_b2_g3_sar1 ops_taps_b2_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g3_sar3
ops_taps_b2_g3_sar3[31:24]
OPS Sar27 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g3_sar2
ops_taps_b2_g3_sar2[23:16]
OPS Sar26 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g3_sar1
ops_taps_b2_g3_sar1[15:8]
OPS Sar25 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g3_sar0
ops_taps_b2_g3_sar0[7:0]
OPS Sar24 tap value on bit 2

Reset: hex:0x00;

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+0x00000bc4 Register(32 bit) ops_taps_b2_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abc4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g3_sar7 ops_taps_b2_g3_sar6 ops_taps_b2_g3_sar5 ops_taps_b2_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g3_sar7
ops_taps_b2_g3_sar7[31:24]
OPS Sar31 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g3_sar6
ops_taps_b2_g3_sar6[23:16]
OPS Sar30 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g3_sar5
ops_taps_b2_g3_sar5[15:8]
OPS Sar29 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g3_sar4
ops_taps_b2_g3_sar4[7:0]
OPS Sar28 tap value on bit 2

Reset: hex:0x00;

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+0x00000bc8 Register(32 bit) ops_taps_b2_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abc8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g4_sar3 ops_taps_b2_g4_sar2 ops_taps_b2_g4_sar1 ops_taps_b2_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g4_sar3
ops_taps_b2_g4_sar3[31:24]
OPS Sar35 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g4_sar2
ops_taps_b2_g4_sar2[23:16]
OPS Sar34 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g4_sar1
ops_taps_b2_g4_sar1[15:8]
OPS Sar33 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g4_sar0
ops_taps_b2_g4_sar0[7:0]
OPS Sar32 tap value on bit 2

Reset: hex:0x00;

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+0x00000bcc Register(32 bit) ops_taps_b2_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abcc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g4_sar7 ops_taps_b2_g4_sar6 ops_taps_b2_g4_sar5 ops_taps_b2_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g4_sar7
ops_taps_b2_g4_sar7[31:24]
OPS Sar39 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g4_sar6
ops_taps_b2_g4_sar6[23:16]
OPS Sar38 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g4_sar5
ops_taps_b2_g4_sar5[15:8]
OPS Sar37 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g4_sar4
ops_taps_b2_g4_sar4[7:0]
OPS Sar36 tap value on bit 2

Reset: hex:0x00;

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+0x00000bd0 Register(32 bit) ops_taps_b2_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abd0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g5_sar3 ops_taps_b2_g5_sar2 ops_taps_b2_g5_sar1 ops_taps_b2_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g5_sar3
ops_taps_b2_g5_sar3[31:24]
OPS Sar43 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g5_sar2
ops_taps_b2_g5_sar2[23:16]
OPS Sar42 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g5_sar1
ops_taps_b2_g5_sar1[15:8]
OPS Sar41 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g5_sar0
ops_taps_b2_g5_sar0[7:0]
OPS Sar40 tap value on bit 2

Reset: hex:0x00;

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+0x00000bd4 Register(32 bit) ops_taps_b2_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abd4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g5_sar7 ops_taps_b2_g5_sar6 ops_taps_b2_g5_sar5 ops_taps_b2_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g5_sar7
ops_taps_b2_g5_sar7[31:24]
OPS Sar47 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g5_sar6
ops_taps_b2_g5_sar6[23:16]
OPS Sar46 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g5_sar5
ops_taps_b2_g5_sar5[15:8]
OPS Sar45 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g5_sar4
ops_taps_b2_g5_sar4[7:0]
OPS Sar44 tap value on bit 2

Reset: hex:0x00;

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+0x00000bd8 Register(32 bit) ops_taps_b2_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abd8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g6_sar3 ops_taps_b2_g6_sar2 ops_taps_b2_g6_sar1 ops_taps_b2_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g6_sar3
ops_taps_b2_g6_sar3[31:24]
OPS Sar51 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g6_sar2
ops_taps_b2_g6_sar2[23:16]
OPS Sar50 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g6_sar1
ops_taps_b2_g6_sar1[15:8]
OPS Sar49 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g6_sar0
ops_taps_b2_g6_sar0[7:0]
OPS Sar48 tap value on bit 2

Reset: hex:0x00;

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+0x00000bdc Register(32 bit) ops_taps_b2_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abdc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g6_sar7 ops_taps_b2_g6_sar6 ops_taps_b2_g6_sar5 ops_taps_b2_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g6_sar7
ops_taps_b2_g6_sar7[31:24]
OPS Sar55 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g6_sar6
ops_taps_b2_g6_sar6[23:16]
OPS Sar54 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g6_sar5
ops_taps_b2_g6_sar5[15:8]
OPS Sar53 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g6_sar4
ops_taps_b2_g6_sar4[7:0]
OPS Sar52 tap value on bit 2

Reset: hex:0x00;

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+0x00000be0 Register(32 bit) ops_taps_b2_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abe0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g7_sar3 ops_taps_b2_g7_sar2 ops_taps_b2_g7_sar1 ops_taps_b2_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g7_sar3
ops_taps_b2_g7_sar3[31:24]
OPS Sar59 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g7_sar2
ops_taps_b2_g7_sar2[23:16]
OPS Sar58 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g7_sar1
ops_taps_b2_g7_sar1[15:8]
OPS Sar57 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g7_sar0
ops_taps_b2_g7_sar0[7:0]
OPS Sar56 tap value on bit 2

Reset: hex:0x00;

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+0x00000be4 Register(32 bit) ops_taps_b2_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abe4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b2_g7_sar7 ops_taps_b2_g7_sar6 ops_taps_b2_g7_sar5 ops_taps_b2_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b2_g7_sar7
ops_taps_b2_g7_sar7[31:24]
OPS Sar63 tap value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b2_g7_sar6
ops_taps_b2_g7_sar6[23:16]
OPS Sar62 tap value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b2_g7_sar5
ops_taps_b2_g7_sar5[15:8]
OPS Sar61 tap value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b2_g7_sar4
ops_taps_b2_g7_sar4[7:0]
OPS Sar60 tap value on bit 2

Reset: hex:0x00;

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+0x00000be8 Register(32 bit) ops_taps_b3_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abe8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g0_sar3 ops_taps_b3_g0_sar2 ops_taps_b3_g0_sar1 ops_taps_b3_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g0_sar3
ops_taps_b3_g0_sar3[31:24]
OPS Sar3 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g0_sar2
ops_taps_b3_g0_sar2[23:16]
OPS Sar2 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g0_sar1
ops_taps_b3_g0_sar1[15:8]
OPS Sar1 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g0_sar0
ops_taps_b3_g0_sar0[7:0]
OPS Sar0 tap value on bit 3

Reset: hex:0x00;

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+0x00000bec Register(32 bit) ops_taps_b3_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g0_sar7 ops_taps_b3_g0_sar6 ops_taps_b3_g0_sar5 ops_taps_b3_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g0_sar7
ops_taps_b3_g0_sar7[31:24]
OPS Sar7 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g0_sar6
ops_taps_b3_g0_sar6[23:16]
OPS Sar6 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g0_sar5
ops_taps_b3_g0_sar5[15:8]
OPS Sar5 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g0_sar4
ops_taps_b3_g0_sar4[7:0]
OPS Sar4 tap value on bit 3

Reset: hex:0x00;

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+0x00000bf0 Register(32 bit) ops_taps_b3_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abf0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g1_sar3 ops_taps_b3_g1_sar2 ops_taps_b3_g1_sar1 ops_taps_b3_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g1_sar3
ops_taps_b3_g1_sar3[31:24]
OPS Sar11 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g1_sar2
ops_taps_b3_g1_sar2[23:16]
OPS Sar10 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g1_sar1
ops_taps_b3_g1_sar1[15:8]
OPS Sar9 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g1_sar0
ops_taps_b3_g1_sar0[7:0]
OPS Sar8 tap value on bit 3

Reset: hex:0x00;

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+0x00000bf4 Register(32 bit) ops_taps_b3_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abf4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g1_sar7 ops_taps_b3_g1_sar6 ops_taps_b3_g1_sar5 ops_taps_b3_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g1_sar7
ops_taps_b3_g1_sar7[31:24]
OPS Sar15 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g1_sar6
ops_taps_b3_g1_sar6[23:16]
OPS Sar14 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g1_sar5
ops_taps_b3_g1_sar5[15:8]
OPS Sar13 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g1_sar4
ops_taps_b3_g1_sar4[7:0]
OPS Sar12 tap value on bit 3

Reset: hex:0x00;

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+0x00000bf8 Register(32 bit) ops_taps_b3_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abf8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g2_sar3 ops_taps_b3_g2_sar2 ops_taps_b3_g2_sar1 ops_taps_b3_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g2_sar3
ops_taps_b3_g2_sar3[31:24]
OPS Sar19 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g2_sar2
ops_taps_b3_g2_sar2[23:16]
OPS Sar18 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g2_sar1
ops_taps_b3_g2_sar1[15:8]
OPS Sar17 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g2_sar0
ops_taps_b3_g2_sar0[7:0]
OPS Sar16 tap value on bit 3

Reset: hex:0x00;

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+0x00000bfc Register(32 bit) ops_taps_b3_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702abfc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g2_sar7 ops_taps_b3_g2_sar6 ops_taps_b3_g2_sar5 ops_taps_b3_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g2_sar7
ops_taps_b3_g2_sar7[31:24]
OPS Sar23 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g2_sar6
ops_taps_b3_g2_sar6[23:16]
OPS Sar22 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g2_sar5
ops_taps_b3_g2_sar5[15:8]
OPS Sar21 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g2_sar4
ops_taps_b3_g2_sar4[7:0]
OPS Sar20 tap value on bit 3

Reset: hex:0x00;

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+0x00000c00 Register(32 bit) ops_taps_b3_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac00 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g3_sar3 ops_taps_b3_g3_sar2 ops_taps_b3_g3_sar1 ops_taps_b3_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g3_sar3
ops_taps_b3_g3_sar3[31:24]
OPS Sar27 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g3_sar2
ops_taps_b3_g3_sar2[23:16]
OPS Sar26 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g3_sar1
ops_taps_b3_g3_sar1[15:8]
OPS Sar25 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g3_sar0
ops_taps_b3_g3_sar0[7:0]
OPS Sar24 tap value on bit 3

Reset: hex:0x00;

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+0x00000c04 Register(32 bit) ops_taps_b3_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac04 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g3_sar7 ops_taps_b3_g3_sar6 ops_taps_b3_g3_sar5 ops_taps_b3_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g3_sar7
ops_taps_b3_g3_sar7[31:24]
OPS Sar31 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g3_sar6
ops_taps_b3_g3_sar6[23:16]
OPS Sar30 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g3_sar5
ops_taps_b3_g3_sar5[15:8]
OPS Sar29 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g3_sar4
ops_taps_b3_g3_sar4[7:0]
OPS Sar28 tap value on bit 3

Reset: hex:0x00;

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+0x00000c08 Register(32 bit) ops_taps_b3_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac08 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g4_sar3 ops_taps_b3_g4_sar2 ops_taps_b3_g4_sar1 ops_taps_b3_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g4_sar3
ops_taps_b3_g4_sar3[31:24]
OPS Sar35 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g4_sar2
ops_taps_b3_g4_sar2[23:16]
OPS Sar34 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g4_sar1
ops_taps_b3_g4_sar1[15:8]
OPS Sar33 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g4_sar0
ops_taps_b3_g4_sar0[7:0]
OPS Sar32 tap value on bit 3

Reset: hex:0x00;

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+0x00000c0c Register(32 bit) ops_taps_b3_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac0c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g4_sar7 ops_taps_b3_g4_sar6 ops_taps_b3_g4_sar5 ops_taps_b3_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g4_sar7
ops_taps_b3_g4_sar7[31:24]
OPS Sar39 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g4_sar6
ops_taps_b3_g4_sar6[23:16]
OPS Sar38 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g4_sar5
ops_taps_b3_g4_sar5[15:8]
OPS Sar37 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g4_sar4
ops_taps_b3_g4_sar4[7:0]
OPS Sar36 tap value on bit 3

Reset: hex:0x00;

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+0x00000c10 Register(32 bit) ops_taps_b3_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac10 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g5_sar3 ops_taps_b3_g5_sar2 ops_taps_b3_g5_sar1 ops_taps_b3_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g5_sar3
ops_taps_b3_g5_sar3[31:24]
OPS Sar43 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g5_sar2
ops_taps_b3_g5_sar2[23:16]
OPS Sar42 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g5_sar1
ops_taps_b3_g5_sar1[15:8]
OPS Sar41 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g5_sar0
ops_taps_b3_g5_sar0[7:0]
OPS Sar40 tap value on bit 3

Reset: hex:0x00;

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+0x00000c14 Register(32 bit) ops_taps_b3_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac14 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g5_sar7 ops_taps_b3_g5_sar6 ops_taps_b3_g5_sar5 ops_taps_b3_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g5_sar7
ops_taps_b3_g5_sar7[31:24]
OPS Sar47 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g5_sar6
ops_taps_b3_g5_sar6[23:16]
OPS Sar46 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g5_sar5
ops_taps_b3_g5_sar5[15:8]
OPS Sar45 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g5_sar4
ops_taps_b3_g5_sar4[7:0]
OPS Sar44 tap value on bit 3

Reset: hex:0x00;

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+0x00000c18 Register(32 bit) ops_taps_b3_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac18 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g6_sar3 ops_taps_b3_g6_sar2 ops_taps_b3_g6_sar1 ops_taps_b3_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g6_sar3
ops_taps_b3_g6_sar3[31:24]
OPS Sar51 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g6_sar2
ops_taps_b3_g6_sar2[23:16]
OPS Sar50 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g6_sar1
ops_taps_b3_g6_sar1[15:8]
OPS Sar49 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g6_sar0
ops_taps_b3_g6_sar0[7:0]
OPS Sar48 tap value on bit 3

Reset: hex:0x00;

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+0x00000c1c Register(32 bit) ops_taps_b3_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac1c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g6_sar7 ops_taps_b3_g6_sar6 ops_taps_b3_g6_sar5 ops_taps_b3_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g6_sar7
ops_taps_b3_g6_sar7[31:24]
OPS Sar55 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g6_sar6
ops_taps_b3_g6_sar6[23:16]
OPS Sar54 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g6_sar5
ops_taps_b3_g6_sar5[15:8]
OPS Sar53 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g6_sar4
ops_taps_b3_g6_sar4[7:0]
OPS Sar52 tap value on bit 3

Reset: hex:0x00;

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+0x00000c20 Register(32 bit) ops_taps_b3_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac20 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g7_sar3 ops_taps_b3_g7_sar2 ops_taps_b3_g7_sar1 ops_taps_b3_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g7_sar3
ops_taps_b3_g7_sar3[31:24]
OPS Sar59 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g7_sar2
ops_taps_b3_g7_sar2[23:16]
OPS Sar58 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g7_sar1
ops_taps_b3_g7_sar1[15:8]
OPS Sar57 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g7_sar0
ops_taps_b3_g7_sar0[7:0]
OPS Sar56 tap value on bit 3

Reset: hex:0x00;

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+0x00000c24 Register(32 bit) ops_taps_b3_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac24 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b3_g7_sar7 ops_taps_b3_g7_sar6 ops_taps_b3_g7_sar5 ops_taps_b3_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b3_g7_sar7
ops_taps_b3_g7_sar7[31:24]
OPS Sar63 tap value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b3_g7_sar6
ops_taps_b3_g7_sar6[23:16]
OPS Sar62 tap value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b3_g7_sar5
ops_taps_b3_g7_sar5[15:8]
OPS Sar61 tap value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b3_g7_sar4
ops_taps_b3_g7_sar4[7:0]
OPS Sar60 tap value on bit 3

Reset: hex:0x00;

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+0x00000c28 Register(32 bit) ops_taps_b4_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac28 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g0_sar3 ops_taps_b4_g0_sar2 ops_taps_b4_g0_sar1 ops_taps_b4_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g0_sar3
ops_taps_b4_g0_sar3[31:24]
OPS Sar3 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g0_sar2
ops_taps_b4_g0_sar2[23:16]
OPS Sar2 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g0_sar1
ops_taps_b4_g0_sar1[15:8]
OPS Sar1 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g0_sar0
ops_taps_b4_g0_sar0[7:0]
OPS Sar0 tap value on bit 4

Reset: hex:0x00;

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+0x00000c2c Register(32 bit) ops_taps_b4_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac2c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g0_sar7 ops_taps_b4_g0_sar6 ops_taps_b4_g0_sar5 ops_taps_b4_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g0_sar7
ops_taps_b4_g0_sar7[31:24]
OPS Sar7 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g0_sar6
ops_taps_b4_g0_sar6[23:16]
OPS Sar6 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g0_sar5
ops_taps_b4_g0_sar5[15:8]
OPS Sar5 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g0_sar4
ops_taps_b4_g0_sar4[7:0]
OPS Sar4 tap value on bit 4

Reset: hex:0x00;

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+0x00000c30 Register(32 bit) ops_taps_b4_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac30 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g1_sar3 ops_taps_b4_g1_sar2 ops_taps_b4_g1_sar1 ops_taps_b4_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g1_sar3
ops_taps_b4_g1_sar3[31:24]
OPS Sar11 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g1_sar2
ops_taps_b4_g1_sar2[23:16]
OPS Sar10 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g1_sar1
ops_taps_b4_g1_sar1[15:8]
OPS Sar9 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g1_sar0
ops_taps_b4_g1_sar0[7:0]
OPS Sar8 tap value on bit 4

Reset: hex:0x00;

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+0x00000c34 Register(32 bit) ops_taps_b4_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac34 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g1_sar7 ops_taps_b4_g1_sar6 ops_taps_b4_g1_sar5 ops_taps_b4_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g1_sar7
ops_taps_b4_g1_sar7[31:24]
OPS Sar15 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g1_sar6
ops_taps_b4_g1_sar6[23:16]
OPS Sar14 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g1_sar5
ops_taps_b4_g1_sar5[15:8]
OPS Sar13 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g1_sar4
ops_taps_b4_g1_sar4[7:0]
OPS Sar12 tap value on bit 4

Reset: hex:0x00;

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+0x00000c38 Register(32 bit) ops_taps_b4_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac38 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g2_sar3 ops_taps_b4_g2_sar2 ops_taps_b4_g2_sar1 ops_taps_b4_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g2_sar3
ops_taps_b4_g2_sar3[31:24]
OPS Sar19 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g2_sar2
ops_taps_b4_g2_sar2[23:16]
OPS Sar18 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g2_sar1
ops_taps_b4_g2_sar1[15:8]
OPS Sar17 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g2_sar0
ops_taps_b4_g2_sar0[7:0]
OPS Sar16 tap value on bit 4

Reset: hex:0x00;

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+0x00000c3c Register(32 bit) ops_taps_b4_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac3c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g2_sar7 ops_taps_b4_g2_sar6 ops_taps_b4_g2_sar5 ops_taps_b4_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g2_sar7
ops_taps_b4_g2_sar7[31:24]
OPS Sar23 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g2_sar6
ops_taps_b4_g2_sar6[23:16]
OPS Sar22 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g2_sar5
ops_taps_b4_g2_sar5[15:8]
OPS Sar21 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g2_sar4
ops_taps_b4_g2_sar4[7:0]
OPS Sar20 tap value on bit 4

Reset: hex:0x00;

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+0x00000c40 Register(32 bit) ops_taps_b4_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac40 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g3_sar3 ops_taps_b4_g3_sar2 ops_taps_b4_g3_sar1 ops_taps_b4_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g3_sar3
ops_taps_b4_g3_sar3[31:24]
OPS Sar27 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g3_sar2
ops_taps_b4_g3_sar2[23:16]
OPS Sar26 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g3_sar1
ops_taps_b4_g3_sar1[15:8]
OPS Sar25 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g3_sar0
ops_taps_b4_g3_sar0[7:0]
OPS Sar24 tap value on bit 4

Reset: hex:0x00;

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+0x00000c44 Register(32 bit) ops_taps_b4_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac44 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g3_sar7 ops_taps_b4_g3_sar6 ops_taps_b4_g3_sar5 ops_taps_b4_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g3_sar7
ops_taps_b4_g3_sar7[31:24]
OPS Sar31 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g3_sar6
ops_taps_b4_g3_sar6[23:16]
OPS Sar30 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g3_sar5
ops_taps_b4_g3_sar5[15:8]
OPS Sar29 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g3_sar4
ops_taps_b4_g3_sar4[7:0]
OPS Sar28 tap value on bit 4

Reset: hex:0x00;

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+0x00000c48 Register(32 bit) ops_taps_b4_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac48 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g4_sar3 ops_taps_b4_g4_sar2 ops_taps_b4_g4_sar1 ops_taps_b4_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g4_sar3
ops_taps_b4_g4_sar3[31:24]
OPS Sar35 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g4_sar2
ops_taps_b4_g4_sar2[23:16]
OPS Sar34 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g4_sar1
ops_taps_b4_g4_sar1[15:8]
OPS Sar33 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g4_sar0
ops_taps_b4_g4_sar0[7:0]
OPS Sar32 tap value on bit 4

Reset: hex:0x00;

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+0x00000c4c Register(32 bit) ops_taps_b4_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac4c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g4_sar7 ops_taps_b4_g4_sar6 ops_taps_b4_g4_sar5 ops_taps_b4_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g4_sar7
ops_taps_b4_g4_sar7[31:24]
OPS Sar39 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g4_sar6
ops_taps_b4_g4_sar6[23:16]
OPS Sar38 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g4_sar5
ops_taps_b4_g4_sar5[15:8]
OPS Sar37 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g4_sar4
ops_taps_b4_g4_sar4[7:0]
OPS Sar36 tap value on bit 4

Reset: hex:0x00;

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+0x00000c50 Register(32 bit) ops_taps_b4_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac50 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g5_sar3 ops_taps_b4_g5_sar2 ops_taps_b4_g5_sar1 ops_taps_b4_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g5_sar3
ops_taps_b4_g5_sar3[31:24]
OPS Sar43 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g5_sar2
ops_taps_b4_g5_sar2[23:16]
OPS Sar42 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g5_sar1
ops_taps_b4_g5_sar1[15:8]
OPS Sar41 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g5_sar0
ops_taps_b4_g5_sar0[7:0]
OPS Sar40 tap value on bit 4

Reset: hex:0x00;

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+0x00000c54 Register(32 bit) ops_taps_b4_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac54 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g5_sar7 ops_taps_b4_g5_sar6 ops_taps_b4_g5_sar5 ops_taps_b4_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g5_sar7
ops_taps_b4_g5_sar7[31:24]
OPS Sar47 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g5_sar6
ops_taps_b4_g5_sar6[23:16]
OPS Sar46 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g5_sar5
ops_taps_b4_g5_sar5[15:8]
OPS Sar45 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g5_sar4
ops_taps_b4_g5_sar4[7:0]
OPS Sar44 tap value on bit 4

Reset: hex:0x00;

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+0x00000c58 Register(32 bit) ops_taps_b4_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac58 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g6_sar3 ops_taps_b4_g6_sar2 ops_taps_b4_g6_sar1 ops_taps_b4_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g6_sar3
ops_taps_b4_g6_sar3[31:24]
OPS Sar51 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g6_sar2
ops_taps_b4_g6_sar2[23:16]
OPS Sar50 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g6_sar1
ops_taps_b4_g6_sar1[15:8]
OPS Sar49 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g6_sar0
ops_taps_b4_g6_sar0[7:0]
OPS Sar48 tap value on bit 4

Reset: hex:0x00;

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+0x00000c5c Register(32 bit) ops_taps_b4_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac5c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g6_sar7 ops_taps_b4_g6_sar6 ops_taps_b4_g6_sar5 ops_taps_b4_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g6_sar7
ops_taps_b4_g6_sar7[31:24]
OPS Sar55 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g6_sar6
ops_taps_b4_g6_sar6[23:16]
OPS Sar54 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g6_sar5
ops_taps_b4_g6_sar5[15:8]
OPS Sar53 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g6_sar4
ops_taps_b4_g6_sar4[7:0]
OPS Sar52 tap value on bit 4

Reset: hex:0x00;

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+0x00000c60 Register(32 bit) ops_taps_b4_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac60 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g7_sar3 ops_taps_b4_g7_sar2 ops_taps_b4_g7_sar1 ops_taps_b4_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g7_sar3
ops_taps_b4_g7_sar3[31:24]
OPS Sar59 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g7_sar2
ops_taps_b4_g7_sar2[23:16]
OPS Sar58 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g7_sar1
ops_taps_b4_g7_sar1[15:8]
OPS Sar57 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g7_sar0
ops_taps_b4_g7_sar0[7:0]
OPS Sar56 tap value on bit 4

Reset: hex:0x00;

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+0x00000c64 Register(32 bit) ops_taps_b4_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac64 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b4_g7_sar7 ops_taps_b4_g7_sar6 ops_taps_b4_g7_sar5 ops_taps_b4_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b4_g7_sar7
ops_taps_b4_g7_sar7[31:24]
OPS Sar63 tap value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b4_g7_sar6
ops_taps_b4_g7_sar6[23:16]
OPS Sar62 tap value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b4_g7_sar5
ops_taps_b4_g7_sar5[15:8]
OPS Sar61 tap value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b4_g7_sar4
ops_taps_b4_g7_sar4[7:0]
OPS Sar60 tap value on bit 4

Reset: hex:0x00;

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+0x00000c68 Register(32 bit) ops_taps_b5_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac68 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g0_sar3 ops_taps_b5_g0_sar2 ops_taps_b5_g0_sar1 ops_taps_b5_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g0_sar3
ops_taps_b5_g0_sar3[31:24]
OPS Sar3 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g0_sar2
ops_taps_b5_g0_sar2[23:16]
OPS Sar2 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g0_sar1
ops_taps_b5_g0_sar1[15:8]
OPS Sar1 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g0_sar0
ops_taps_b5_g0_sar0[7:0]
OPS Sar0 tap value on bit 5

Reset: hex:0x00;

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+0x00000c6c Register(32 bit) ops_taps_b5_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac6c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g0_sar7 ops_taps_b5_g0_sar6 ops_taps_b5_g0_sar5 ops_taps_b5_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g0_sar7
ops_taps_b5_g0_sar7[31:24]
OPS Sar7 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g0_sar6
ops_taps_b5_g0_sar6[23:16]
OPS Sar6 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g0_sar5
ops_taps_b5_g0_sar5[15:8]
OPS Sar5 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g0_sar4
ops_taps_b5_g0_sar4[7:0]
OPS Sar4 tap value on bit 5

Reset: hex:0x00;

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+0x00000c70 Register(32 bit) ops_taps_b5_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac70 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g1_sar3 ops_taps_b5_g1_sar2 ops_taps_b5_g1_sar1 ops_taps_b5_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g1_sar3
ops_taps_b5_g1_sar3[31:24]
OPS Sar11 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g1_sar2
ops_taps_b5_g1_sar2[23:16]
OPS Sar10 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g1_sar1
ops_taps_b5_g1_sar1[15:8]
OPS Sar9 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g1_sar0
ops_taps_b5_g1_sar0[7:0]
OPS Sar8 tap value on bit 5

Reset: hex:0x00;

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+0x00000c74 Register(32 bit) ops_taps_b5_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac74 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g1_sar7 ops_taps_b5_g1_sar6 ops_taps_b5_g1_sar5 ops_taps_b5_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g1_sar7
ops_taps_b5_g1_sar7[31:24]
OPS Sar15 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g1_sar6
ops_taps_b5_g1_sar6[23:16]
OPS Sar14 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g1_sar5
ops_taps_b5_g1_sar5[15:8]
OPS Sar13 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g1_sar4
ops_taps_b5_g1_sar4[7:0]
OPS Sar12 tap value on bit 5

Reset: hex:0x00;

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+0x00000c78 Register(32 bit) ops_taps_b5_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac78 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g2_sar3 ops_taps_b5_g2_sar2 ops_taps_b5_g2_sar1 ops_taps_b5_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g2_sar3
ops_taps_b5_g2_sar3[31:24]
OPS Sar19 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g2_sar2
ops_taps_b5_g2_sar2[23:16]
OPS Sar18 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g2_sar1
ops_taps_b5_g2_sar1[15:8]
OPS Sar17 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g2_sar0
ops_taps_b5_g2_sar0[7:0]
OPS Sar16 tap value on bit 5

Reset: hex:0x00;

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+0x00000c7c Register(32 bit) ops_taps_b5_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac7c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g2_sar7 ops_taps_b5_g2_sar6 ops_taps_b5_g2_sar5 ops_taps_b5_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g2_sar7
ops_taps_b5_g2_sar7[31:24]
OPS Sar23 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g2_sar6
ops_taps_b5_g2_sar6[23:16]
OPS Sar22 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g2_sar5
ops_taps_b5_g2_sar5[15:8]
OPS Sar21 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g2_sar4
ops_taps_b5_g2_sar4[7:0]
OPS Sar20 tap value on bit 5

Reset: hex:0x00;

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+0x00000c80 Register(32 bit) ops_taps_b5_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac80 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g3_sar3 ops_taps_b5_g3_sar2 ops_taps_b5_g3_sar1 ops_taps_b5_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g3_sar3
ops_taps_b5_g3_sar3[31:24]
OPS Sar27 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g3_sar2
ops_taps_b5_g3_sar2[23:16]
OPS Sar26 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g3_sar1
ops_taps_b5_g3_sar1[15:8]
OPS Sar25 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g3_sar0
ops_taps_b5_g3_sar0[7:0]
OPS Sar24 tap value on bit 5

Reset: hex:0x00;

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+0x00000c84 Register(32 bit) ops_taps_b5_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac84 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g3_sar7 ops_taps_b5_g3_sar6 ops_taps_b5_g3_sar5 ops_taps_b5_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g3_sar7
ops_taps_b5_g3_sar7[31:24]
OPS Sar31 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g3_sar6
ops_taps_b5_g3_sar6[23:16]
OPS Sar30 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g3_sar5
ops_taps_b5_g3_sar5[15:8]
OPS Sar29 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g3_sar4
ops_taps_b5_g3_sar4[7:0]
OPS Sar28 tap value on bit 5

Reset: hex:0x00;

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+0x00000c88 Register(32 bit) ops_taps_b5_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac88 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g4_sar3 ops_taps_b5_g4_sar2 ops_taps_b5_g4_sar1 ops_taps_b5_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g4_sar3
ops_taps_b5_g4_sar3[31:24]
OPS Sar35 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g4_sar2
ops_taps_b5_g4_sar2[23:16]
OPS Sar34 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g4_sar1
ops_taps_b5_g4_sar1[15:8]
OPS Sar33 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g4_sar0
ops_taps_b5_g4_sar0[7:0]
OPS Sar32 tap value on bit 5

Reset: hex:0x00;

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+0x00000c8c Register(32 bit) ops_taps_b5_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac8c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g4_sar7 ops_taps_b5_g4_sar6 ops_taps_b5_g4_sar5 ops_taps_b5_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g4_sar7
ops_taps_b5_g4_sar7[31:24]
OPS Sar39 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g4_sar6
ops_taps_b5_g4_sar6[23:16]
OPS Sar38 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g4_sar5
ops_taps_b5_g4_sar5[15:8]
OPS Sar37 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g4_sar4
ops_taps_b5_g4_sar4[7:0]
OPS Sar36 tap value on bit 5

Reset: hex:0x00;

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+0x00000c90 Register(32 bit) ops_taps_b5_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac90 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g5_sar3 ops_taps_b5_g5_sar2 ops_taps_b5_g5_sar1 ops_taps_b5_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g5_sar3
ops_taps_b5_g5_sar3[31:24]
OPS Sar43 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g5_sar2
ops_taps_b5_g5_sar2[23:16]
OPS Sar42 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g5_sar1
ops_taps_b5_g5_sar1[15:8]
OPS Sar41 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g5_sar0
ops_taps_b5_g5_sar0[7:0]
OPS Sar40 tap value on bit 5

Reset: hex:0x00;

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+0x00000c94 Register(32 bit) ops_taps_b5_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac94 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g5_sar7 ops_taps_b5_g5_sar6 ops_taps_b5_g5_sar5 ops_taps_b5_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g5_sar7
ops_taps_b5_g5_sar7[31:24]
OPS Sar47 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g5_sar6
ops_taps_b5_g5_sar6[23:16]
OPS Sar46 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g5_sar5
ops_taps_b5_g5_sar5[15:8]
OPS Sar45 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g5_sar4
ops_taps_b5_g5_sar4[7:0]
OPS Sar44 tap value on bit 5

Reset: hex:0x00;

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+0x00000c98 Register(32 bit) ops_taps_b5_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac98 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g6_sar3 ops_taps_b5_g6_sar2 ops_taps_b5_g6_sar1 ops_taps_b5_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g6_sar3
ops_taps_b5_g6_sar3[31:24]
OPS Sar51 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g6_sar2
ops_taps_b5_g6_sar2[23:16]
OPS Sar50 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g6_sar1
ops_taps_b5_g6_sar1[15:8]
OPS Sar49 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g6_sar0
ops_taps_b5_g6_sar0[7:0]
OPS Sar48 tap value on bit 5

Reset: hex:0x00;

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+0x00000c9c Register(32 bit) ops_taps_b5_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ac9c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g6_sar7 ops_taps_b5_g6_sar6 ops_taps_b5_g6_sar5 ops_taps_b5_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g6_sar7
ops_taps_b5_g6_sar7[31:24]
OPS Sar55 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g6_sar6
ops_taps_b5_g6_sar6[23:16]
OPS Sar54 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g6_sar5
ops_taps_b5_g6_sar5[15:8]
OPS Sar53 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g6_sar4
ops_taps_b5_g6_sar4[7:0]
OPS Sar52 tap value on bit 5

Reset: hex:0x00;

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+0x00000ca0 Register(32 bit) ops_taps_b5_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aca0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g7_sar3 ops_taps_b5_g7_sar2 ops_taps_b5_g7_sar1 ops_taps_b5_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g7_sar3
ops_taps_b5_g7_sar3[31:24]
OPS Sar59 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g7_sar2
ops_taps_b5_g7_sar2[23:16]
OPS Sar58 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g7_sar1
ops_taps_b5_g7_sar1[15:8]
OPS Sar57 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g7_sar0
ops_taps_b5_g7_sar0[7:0]
OPS Sar56 tap value on bit 5

Reset: hex:0x00;

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+0x00000ca4 Register(32 bit) ops_taps_b5_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aca4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_b5_g7_sar7 ops_taps_b5_g7_sar6 ops_taps_b5_g7_sar5 ops_taps_b5_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_b5_g7_sar7
ops_taps_b5_g7_sar7[31:24]
OPS Sar63 tap value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_b5_g7_sar6
ops_taps_b5_g7_sar6[23:16]
OPS Sar62 tap value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_b5_g7_sar5
ops_taps_b5_g7_sar5[15:8]
OPS Sar61 tap value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_b5_g7_sar4
ops_taps_b5_g7_sar4[7:0]
OPS Sar60 tap value on bit 5

Reset: hex:0x00;

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+0x00000ca8 Register(32 bit) ops_taps_fra_b0_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aca8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g0_sar3 ops_taps_fra_b0_g0_sar2 ops_taps_fra_b0_g0_sar1 ops_taps_fra_b0_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g0_sar3
ops_taps_fra_b0_g0_sar3[31:24]
OPS Sar3 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g0_sar2
ops_taps_fra_b0_g0_sar2[23:16]
OPS Sar2 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g0_sar1
ops_taps_fra_b0_g0_sar1[15:8]
OPS Sar1 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g0_sar0
ops_taps_fra_b0_g0_sar0[7:0]
OPS Sar0 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cac Register(32 bit) ops_taps_fra_b0_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g0_sar7 ops_taps_fra_b0_g0_sar6 ops_taps_fra_b0_g0_sar5 ops_taps_fra_b0_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g0_sar7
ops_taps_fra_b0_g0_sar7[31:24]
OPS Sar7 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g0_sar6
ops_taps_fra_b0_g0_sar6[23:16]
OPS Sar6 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g0_sar5
ops_taps_fra_b0_g0_sar5[15:8]
OPS Sar5 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g0_sar4
ops_taps_fra_b0_g0_sar4[7:0]
OPS Sar4 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cb0 Register(32 bit) ops_taps_fra_b0_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acb0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g1_sar3 ops_taps_fra_b0_g1_sar2 ops_taps_fra_b0_g1_sar1 ops_taps_fra_b0_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g1_sar3
ops_taps_fra_b0_g1_sar3[31:24]
OPS Sar11 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g1_sar2
ops_taps_fra_b0_g1_sar2[23:16]
OPS Sar10 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g1_sar1
ops_taps_fra_b0_g1_sar1[15:8]
OPS Sar9 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g1_sar0
ops_taps_fra_b0_g1_sar0[7:0]
OPS Sar8 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cb4 Register(32 bit) ops_taps_fra_b0_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acb4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g1_sar7 ops_taps_fra_b0_g1_sar6 ops_taps_fra_b0_g1_sar5 ops_taps_fra_b0_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g1_sar7
ops_taps_fra_b0_g1_sar7[31:24]
OPS Sar15 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g1_sar6
ops_taps_fra_b0_g1_sar6[23:16]
OPS Sar14 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g1_sar5
ops_taps_fra_b0_g1_sar5[15:8]
OPS Sar13 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g1_sar4
ops_taps_fra_b0_g1_sar4[7:0]
OPS Sar12 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cb8 Register(32 bit) ops_taps_fra_b0_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acb8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g2_sar3 ops_taps_fra_b0_g2_sar2 ops_taps_fra_b0_g2_sar1 ops_taps_fra_b0_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g2_sar3
ops_taps_fra_b0_g2_sar3[31:24]
OPS Sar19 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g2_sar2
ops_taps_fra_b0_g2_sar2[23:16]
OPS Sar18 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g2_sar1
ops_taps_fra_b0_g2_sar1[15:8]
OPS Sar17 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g2_sar0
ops_taps_fra_b0_g2_sar0[7:0]
OPS Sar16 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cbc Register(32 bit) ops_taps_fra_b0_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acbc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g2_sar7 ops_taps_fra_b0_g2_sar6 ops_taps_fra_b0_g2_sar5 ops_taps_fra_b0_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g2_sar7
ops_taps_fra_b0_g2_sar7[31:24]
OPS Sar23 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g2_sar6
ops_taps_fra_b0_g2_sar6[23:16]
OPS Sar22 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g2_sar5
ops_taps_fra_b0_g2_sar5[15:8]
OPS Sar21 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g2_sar4
ops_taps_fra_b0_g2_sar4[7:0]
OPS Sar20 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cc0 Register(32 bit) ops_taps_fra_b0_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acc0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g3_sar3 ops_taps_fra_b0_g3_sar2 ops_taps_fra_b0_g3_sar1 ops_taps_fra_b0_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g3_sar3
ops_taps_fra_b0_g3_sar3[31:24]
OPS Sar27 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g3_sar2
ops_taps_fra_b0_g3_sar2[23:16]
OPS Sar26 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g3_sar1
ops_taps_fra_b0_g3_sar1[15:8]
OPS Sar25 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g3_sar0
ops_taps_fra_b0_g3_sar0[7:0]
OPS Sar24 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cc4 Register(32 bit) ops_taps_fra_b0_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acc4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g3_sar7 ops_taps_fra_b0_g3_sar6 ops_taps_fra_b0_g3_sar5 ops_taps_fra_b0_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g3_sar7
ops_taps_fra_b0_g3_sar7[31:24]
OPS Sar31 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g3_sar6
ops_taps_fra_b0_g3_sar6[23:16]
OPS Sar30 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g3_sar5
ops_taps_fra_b0_g3_sar5[15:8]
OPS Sar29 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g3_sar4
ops_taps_fra_b0_g3_sar4[7:0]
OPS Sar28 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cc8 Register(32 bit) ops_taps_fra_b0_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acc8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g4_sar3 ops_taps_fra_b0_g4_sar2 ops_taps_fra_b0_g4_sar1 ops_taps_fra_b0_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g4_sar3
ops_taps_fra_b0_g4_sar3[31:24]
OPS Sar35 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g4_sar2
ops_taps_fra_b0_g4_sar2[23:16]
OPS Sar34 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g4_sar1
ops_taps_fra_b0_g4_sar1[15:8]
OPS Sar33 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g4_sar0
ops_taps_fra_b0_g4_sar0[7:0]
OPS Sar32 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000ccc Register(32 bit) ops_taps_fra_b0_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702accc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g4_sar7 ops_taps_fra_b0_g4_sar6 ops_taps_fra_b0_g4_sar5 ops_taps_fra_b0_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g4_sar7
ops_taps_fra_b0_g4_sar7[31:24]
OPS Sar39 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g4_sar6
ops_taps_fra_b0_g4_sar6[23:16]
OPS Sar38 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g4_sar5
ops_taps_fra_b0_g4_sar5[15:8]
OPS Sar37 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g4_sar4
ops_taps_fra_b0_g4_sar4[7:0]
OPS Sar36 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cd0 Register(32 bit) ops_taps_fra_b0_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acd0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g5_sar3 ops_taps_fra_b0_g5_sar2 ops_taps_fra_b0_g5_sar1 ops_taps_fra_b0_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g5_sar3
ops_taps_fra_b0_g5_sar3[31:24]
OPS Sar43 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g5_sar2
ops_taps_fra_b0_g5_sar2[23:16]
OPS Sar42 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g5_sar1
ops_taps_fra_b0_g5_sar1[15:8]
OPS Sar41 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g5_sar0
ops_taps_fra_b0_g5_sar0[7:0]
OPS Sar40 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cd4 Register(32 bit) ops_taps_fra_b0_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acd4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g5_sar7 ops_taps_fra_b0_g5_sar6 ops_taps_fra_b0_g5_sar5 ops_taps_fra_b0_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g5_sar7
ops_taps_fra_b0_g5_sar7[31:24]
OPS Sar47 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g5_sar6
ops_taps_fra_b0_g5_sar6[23:16]
OPS Sar46 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g5_sar5
ops_taps_fra_b0_g5_sar5[15:8]
OPS Sar45 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g5_sar4
ops_taps_fra_b0_g5_sar4[7:0]
OPS Sar44 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cd8 Register(32 bit) ops_taps_fra_b0_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acd8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g6_sar3 ops_taps_fra_b0_g6_sar2 ops_taps_fra_b0_g6_sar1 ops_taps_fra_b0_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g6_sar3
ops_taps_fra_b0_g6_sar3[31:24]
OPS Sar51 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g6_sar2
ops_taps_fra_b0_g6_sar2[23:16]
OPS Sar50 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g6_sar1
ops_taps_fra_b0_g6_sar1[15:8]
OPS Sar49 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g6_sar0
ops_taps_fra_b0_g6_sar0[7:0]
OPS Sar48 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000cdc Register(32 bit) ops_taps_fra_b0_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acdc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g6_sar7 ops_taps_fra_b0_g6_sar6 ops_taps_fra_b0_g6_sar5 ops_taps_fra_b0_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g6_sar7
ops_taps_fra_b0_g6_sar7[31:24]
OPS Sar55 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g6_sar6
ops_taps_fra_b0_g6_sar6[23:16]
OPS Sar54 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g6_sar5
ops_taps_fra_b0_g6_sar5[15:8]
OPS Sar53 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g6_sar4
ops_taps_fra_b0_g6_sar4[7:0]
OPS Sar52 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000ce0 Register(32 bit) ops_taps_fra_b0_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ace0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g7_sar3 ops_taps_fra_b0_g7_sar2 ops_taps_fra_b0_g7_sar1 ops_taps_fra_b0_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g7_sar3
ops_taps_fra_b0_g7_sar3[31:24]
OPS Sar59 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g7_sar2
ops_taps_fra_b0_g7_sar2[23:16]
OPS Sar58 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g7_sar1
ops_taps_fra_b0_g7_sar1[15:8]
OPS Sar57 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g7_sar0
ops_taps_fra_b0_g7_sar0[7:0]
OPS Sar56 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000ce4 Register(32 bit) ops_taps_fra_b0_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ace4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b0_g7_sar7 ops_taps_fra_b0_g7_sar6 ops_taps_fra_b0_g7_sar5 ops_taps_fra_b0_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b0_g7_sar7
ops_taps_fra_b0_g7_sar7[31:24]
OPS Sar63 tap frac value on bit 0

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b0_g7_sar6
ops_taps_fra_b0_g7_sar6[23:16]
OPS Sar62 tap frac value on bit 0

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b0_g7_sar5
ops_taps_fra_b0_g7_sar5[15:8]
OPS Sar61 tap frac value on bit 0

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b0_g7_sar4
ops_taps_fra_b0_g7_sar4[7:0]
OPS Sar60 tap frac value on bit 0

Reset: hex:0x00;

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+0x00000ce8 Register(32 bit) ops_taps_fra_b1_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ace8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g0_sar3 ops_taps_fra_b1_g0_sar2 ops_taps_fra_b1_g0_sar1 ops_taps_fra_b1_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g0_sar3
ops_taps_fra_b1_g0_sar3[31:24]
OPS Sar3 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g0_sar2
ops_taps_fra_b1_g0_sar2[23:16]
OPS Sar2 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g0_sar1
ops_taps_fra_b1_g0_sar1[15:8]
OPS Sar1 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g0_sar0
ops_taps_fra_b1_g0_sar0[7:0]
OPS Sar0 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000cec Register(32 bit) ops_taps_fra_b1_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g0_sar7 ops_taps_fra_b1_g0_sar6 ops_taps_fra_b1_g0_sar5 ops_taps_fra_b1_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g0_sar7
ops_taps_fra_b1_g0_sar7[31:24]
OPS Sar7 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g0_sar6
ops_taps_fra_b1_g0_sar6[23:16]
OPS Sar6 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g0_sar5
ops_taps_fra_b1_g0_sar5[15:8]
OPS Sar5 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g0_sar4
ops_taps_fra_b1_g0_sar4[7:0]
OPS Sar4 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000cf0 Register(32 bit) ops_taps_fra_b1_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acf0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g1_sar3 ops_taps_fra_b1_g1_sar2 ops_taps_fra_b1_g1_sar1 ops_taps_fra_b1_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g1_sar3
ops_taps_fra_b1_g1_sar3[31:24]
OPS Sar11 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g1_sar2
ops_taps_fra_b1_g1_sar2[23:16]
OPS Sar10 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g1_sar1
ops_taps_fra_b1_g1_sar1[15:8]
OPS Sar9 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g1_sar0
ops_taps_fra_b1_g1_sar0[7:0]
OPS Sar8 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000cf4 Register(32 bit) ops_taps_fra_b1_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acf4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g1_sar7 ops_taps_fra_b1_g1_sar6 ops_taps_fra_b1_g1_sar5 ops_taps_fra_b1_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g1_sar7
ops_taps_fra_b1_g1_sar7[31:24]
OPS Sar15 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g1_sar6
ops_taps_fra_b1_g1_sar6[23:16]
OPS Sar14 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g1_sar5
ops_taps_fra_b1_g1_sar5[15:8]
OPS Sar13 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g1_sar4
ops_taps_fra_b1_g1_sar4[7:0]
OPS Sar12 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000cf8 Register(32 bit) ops_taps_fra_b1_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acf8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g2_sar3 ops_taps_fra_b1_g2_sar2 ops_taps_fra_b1_g2_sar1 ops_taps_fra_b1_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g2_sar3
ops_taps_fra_b1_g2_sar3[31:24]
OPS Sar19 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g2_sar2
ops_taps_fra_b1_g2_sar2[23:16]
OPS Sar18 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g2_sar1
ops_taps_fra_b1_g2_sar1[15:8]
OPS Sar17 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g2_sar0
ops_taps_fra_b1_g2_sar0[7:0]
OPS Sar16 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000cfc Register(32 bit) ops_taps_fra_b1_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702acfc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g2_sar7 ops_taps_fra_b1_g2_sar6 ops_taps_fra_b1_g2_sar5 ops_taps_fra_b1_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g2_sar7
ops_taps_fra_b1_g2_sar7[31:24]
OPS Sar23 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g2_sar6
ops_taps_fra_b1_g2_sar6[23:16]
OPS Sar22 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g2_sar5
ops_taps_fra_b1_g2_sar5[15:8]
OPS Sar21 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g2_sar4
ops_taps_fra_b1_g2_sar4[7:0]
OPS Sar20 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d00 Register(32 bit) ops_taps_fra_b1_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad00 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g3_sar3 ops_taps_fra_b1_g3_sar2 ops_taps_fra_b1_g3_sar1 ops_taps_fra_b1_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g3_sar3
ops_taps_fra_b1_g3_sar3[31:24]
OPS Sar27 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g3_sar2
ops_taps_fra_b1_g3_sar2[23:16]
OPS Sar26 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g3_sar1
ops_taps_fra_b1_g3_sar1[15:8]
OPS Sar25 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g3_sar0
ops_taps_fra_b1_g3_sar0[7:0]
OPS Sar24 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d04 Register(32 bit) ops_taps_fra_b1_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad04 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g3_sar7 ops_taps_fra_b1_g3_sar6 ops_taps_fra_b1_g3_sar5 ops_taps_fra_b1_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g3_sar7
ops_taps_fra_b1_g3_sar7[31:24]
OPS Sar31 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g3_sar6
ops_taps_fra_b1_g3_sar6[23:16]
OPS Sar30 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g3_sar5
ops_taps_fra_b1_g3_sar5[15:8]
OPS Sar29 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g3_sar4
ops_taps_fra_b1_g3_sar4[7:0]
OPS Sar28 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d08 Register(32 bit) ops_taps_fra_b1_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad08 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g4_sar3 ops_taps_fra_b1_g4_sar2 ops_taps_fra_b1_g4_sar1 ops_taps_fra_b1_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g4_sar3
ops_taps_fra_b1_g4_sar3[31:24]
OPS Sar35 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g4_sar2
ops_taps_fra_b1_g4_sar2[23:16]
OPS Sar34 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g4_sar1
ops_taps_fra_b1_g4_sar1[15:8]
OPS Sar33 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g4_sar0
ops_taps_fra_b1_g4_sar0[7:0]
OPS Sar32 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d0c Register(32 bit) ops_taps_fra_b1_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad0c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g4_sar7 ops_taps_fra_b1_g4_sar6 ops_taps_fra_b1_g4_sar5 ops_taps_fra_b1_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g4_sar7
ops_taps_fra_b1_g4_sar7[31:24]
OPS Sar39 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g4_sar6
ops_taps_fra_b1_g4_sar6[23:16]
OPS Sar38 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g4_sar5
ops_taps_fra_b1_g4_sar5[15:8]
OPS Sar37 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g4_sar4
ops_taps_fra_b1_g4_sar4[7:0]
OPS Sar36 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d10 Register(32 bit) ops_taps_fra_b1_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad10 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g5_sar3 ops_taps_fra_b1_g5_sar2 ops_taps_fra_b1_g5_sar1 ops_taps_fra_b1_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g5_sar3
ops_taps_fra_b1_g5_sar3[31:24]
OPS Sar43 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g5_sar2
ops_taps_fra_b1_g5_sar2[23:16]
OPS Sar42 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g5_sar1
ops_taps_fra_b1_g5_sar1[15:8]
OPS Sar41 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g5_sar0
ops_taps_fra_b1_g5_sar0[7:0]
OPS Sar40 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d14 Register(32 bit) ops_taps_fra_b1_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad14 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g5_sar7 ops_taps_fra_b1_g5_sar6 ops_taps_fra_b1_g5_sar5 ops_taps_fra_b1_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g5_sar7
ops_taps_fra_b1_g5_sar7[31:24]
OPS Sar47 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g5_sar6
ops_taps_fra_b1_g5_sar6[23:16]
OPS Sar46 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g5_sar5
ops_taps_fra_b1_g5_sar5[15:8]
OPS Sar45 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g5_sar4
ops_taps_fra_b1_g5_sar4[7:0]
OPS Sar44 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d18 Register(32 bit) ops_taps_fra_b1_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad18 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g6_sar3 ops_taps_fra_b1_g6_sar2 ops_taps_fra_b1_g6_sar1 ops_taps_fra_b1_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g6_sar3
ops_taps_fra_b1_g6_sar3[31:24]
OPS Sar51 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g6_sar2
ops_taps_fra_b1_g6_sar2[23:16]
OPS Sar50 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g6_sar1
ops_taps_fra_b1_g6_sar1[15:8]
OPS Sar49 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g6_sar0
ops_taps_fra_b1_g6_sar0[7:0]
OPS Sar48 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d1c Register(32 bit) ops_taps_fra_b1_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad1c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g6_sar7 ops_taps_fra_b1_g6_sar6 ops_taps_fra_b1_g6_sar5 ops_taps_fra_b1_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g6_sar7
ops_taps_fra_b1_g6_sar7[31:24]
OPS Sar55 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g6_sar6
ops_taps_fra_b1_g6_sar6[23:16]
OPS Sar54 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g6_sar5
ops_taps_fra_b1_g6_sar5[15:8]
OPS Sar53 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g6_sar4
ops_taps_fra_b1_g6_sar4[7:0]
OPS Sar52 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d20 Register(32 bit) ops_taps_fra_b1_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad20 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g7_sar3 ops_taps_fra_b1_g7_sar2 ops_taps_fra_b1_g7_sar1 ops_taps_fra_b1_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g7_sar3
ops_taps_fra_b1_g7_sar3[31:24]
OPS Sar59 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g7_sar2
ops_taps_fra_b1_g7_sar2[23:16]
OPS Sar58 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g7_sar1
ops_taps_fra_b1_g7_sar1[15:8]
OPS Sar57 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g7_sar0
ops_taps_fra_b1_g7_sar0[7:0]
OPS Sar56 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d24 Register(32 bit) ops_taps_fra_b1_sar_60to63
placeholder
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Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad24 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b1_g7_sar7 ops_taps_fra_b1_g7_sar6 ops_taps_fra_b1_g7_sar5 ops_taps_fra_b1_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b1_g7_sar7
ops_taps_fra_b1_g7_sar7[31:24]
OPS Sar63 tap frac value on bit 1

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b1_g7_sar6
ops_taps_fra_b1_g7_sar6[23:16]
OPS Sar62 tap frac value on bit 1

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b1_g7_sar5
ops_taps_fra_b1_g7_sar5[15:8]
OPS Sar61 tap frac value on bit 1

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b1_g7_sar4
ops_taps_fra_b1_g7_sar4[7:0]
OPS Sar60 tap frac value on bit 1

Reset: hex:0x00;

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+0x00000d28 Register(32 bit) ops_taps_fra_b2_sar_0to3
placeholder
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Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad28 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g0_sar3 ops_taps_fra_b2_g0_sar2 ops_taps_fra_b2_g0_sar1 ops_taps_fra_b2_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g0_sar3
ops_taps_fra_b2_g0_sar3[31:24]
OPS Sar3 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g0_sar2
ops_taps_fra_b2_g0_sar2[23:16]
OPS Sar2 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g0_sar1
ops_taps_fra_b2_g0_sar1[15:8]
OPS Sar1 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g0_sar0
ops_taps_fra_b2_g0_sar0[7:0]
OPS Sar0 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d2c Register(32 bit) ops_taps_fra_b2_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad2c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g0_sar7 ops_taps_fra_b2_g0_sar6 ops_taps_fra_b2_g0_sar5 ops_taps_fra_b2_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g0_sar7
ops_taps_fra_b2_g0_sar7[31:24]
OPS Sar7 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g0_sar6
ops_taps_fra_b2_g0_sar6[23:16]
OPS Sar6 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g0_sar5
ops_taps_fra_b2_g0_sar5[15:8]
OPS Sar5 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g0_sar4
ops_taps_fra_b2_g0_sar4[7:0]
OPS Sar4 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d30 Register(32 bit) ops_taps_fra_b2_sar_8to11
placeholder
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Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad30 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g1_sar3 ops_taps_fra_b2_g1_sar2 ops_taps_fra_b2_g1_sar1 ops_taps_fra_b2_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g1_sar3
ops_taps_fra_b2_g1_sar3[31:24]
OPS Sar11 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g1_sar2
ops_taps_fra_b2_g1_sar2[23:16]
OPS Sar10 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g1_sar1
ops_taps_fra_b2_g1_sar1[15:8]
OPS Sar9 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g1_sar0
ops_taps_fra_b2_g1_sar0[7:0]
OPS Sar8 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d34 Register(32 bit) ops_taps_fra_b2_sar_12to15
placeholder
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Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad34 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g1_sar7 ops_taps_fra_b2_g1_sar6 ops_taps_fra_b2_g1_sar5 ops_taps_fra_b2_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g1_sar7
ops_taps_fra_b2_g1_sar7[31:24]
OPS Sar15 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g1_sar6
ops_taps_fra_b2_g1_sar6[23:16]
OPS Sar14 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g1_sar5
ops_taps_fra_b2_g1_sar5[15:8]
OPS Sar13 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g1_sar4
ops_taps_fra_b2_g1_sar4[7:0]
OPS Sar12 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d38 Register(32 bit) ops_taps_fra_b2_sar_16to19
placeholder
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Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad38 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g2_sar3 ops_taps_fra_b2_g2_sar2 ops_taps_fra_b2_g2_sar1 ops_taps_fra_b2_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g2_sar3
ops_taps_fra_b2_g2_sar3[31:24]
OPS Sar19 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g2_sar2
ops_taps_fra_b2_g2_sar2[23:16]
OPS Sar18 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g2_sar1
ops_taps_fra_b2_g2_sar1[15:8]
OPS Sar17 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g2_sar0
ops_taps_fra_b2_g2_sar0[7:0]
OPS Sar16 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d3c Register(32 bit) ops_taps_fra_b2_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad3c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g2_sar7 ops_taps_fra_b2_g2_sar6 ops_taps_fra_b2_g2_sar5 ops_taps_fra_b2_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g2_sar7
ops_taps_fra_b2_g2_sar7[31:24]
OPS Sar23 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g2_sar6
ops_taps_fra_b2_g2_sar6[23:16]
OPS Sar22 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g2_sar5
ops_taps_fra_b2_g2_sar5[15:8]
OPS Sar21 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g2_sar4
ops_taps_fra_b2_g2_sar4[7:0]
OPS Sar20 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d40 Register(32 bit) ops_taps_fra_b2_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad40 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g3_sar3 ops_taps_fra_b2_g3_sar2 ops_taps_fra_b2_g3_sar1 ops_taps_fra_b2_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g3_sar3
ops_taps_fra_b2_g3_sar3[31:24]
OPS Sar27 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g3_sar2
ops_taps_fra_b2_g3_sar2[23:16]
OPS Sar26 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g3_sar1
ops_taps_fra_b2_g3_sar1[15:8]
OPS Sar25 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g3_sar0
ops_taps_fra_b2_g3_sar0[7:0]
OPS Sar24 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d44 Register(32 bit) ops_taps_fra_b2_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad44 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g3_sar7 ops_taps_fra_b2_g3_sar6 ops_taps_fra_b2_g3_sar5 ops_taps_fra_b2_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g3_sar7
ops_taps_fra_b2_g3_sar7[31:24]
OPS Sar31 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g3_sar6
ops_taps_fra_b2_g3_sar6[23:16]
OPS Sar30 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g3_sar5
ops_taps_fra_b2_g3_sar5[15:8]
OPS Sar29 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g3_sar4
ops_taps_fra_b2_g3_sar4[7:0]
OPS Sar28 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d48 Register(32 bit) ops_taps_fra_b2_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad48 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g4_sar3 ops_taps_fra_b2_g4_sar2 ops_taps_fra_b2_g4_sar1 ops_taps_fra_b2_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g4_sar3
ops_taps_fra_b2_g4_sar3[31:24]
OPS Sar35 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g4_sar2
ops_taps_fra_b2_g4_sar2[23:16]
OPS Sar34 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g4_sar1
ops_taps_fra_b2_g4_sar1[15:8]
OPS Sar33 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g4_sar0
ops_taps_fra_b2_g4_sar0[7:0]
OPS Sar32 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d4c Register(32 bit) ops_taps_fra_b2_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad4c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g4_sar7 ops_taps_fra_b2_g4_sar6 ops_taps_fra_b2_g4_sar5 ops_taps_fra_b2_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g4_sar7
ops_taps_fra_b2_g4_sar7[31:24]
OPS Sar39 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g4_sar6
ops_taps_fra_b2_g4_sar6[23:16]
OPS Sar38 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g4_sar5
ops_taps_fra_b2_g4_sar5[15:8]
OPS Sar37 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g4_sar4
ops_taps_fra_b2_g4_sar4[7:0]
OPS Sar36 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d50 Register(32 bit) ops_taps_fra_b2_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad50 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g5_sar3 ops_taps_fra_b2_g5_sar2 ops_taps_fra_b2_g5_sar1 ops_taps_fra_b2_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g5_sar3
ops_taps_fra_b2_g5_sar3[31:24]
OPS Sar43 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g5_sar2
ops_taps_fra_b2_g5_sar2[23:16]
OPS Sar42 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g5_sar1
ops_taps_fra_b2_g5_sar1[15:8]
OPS Sar41 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g5_sar0
ops_taps_fra_b2_g5_sar0[7:0]
OPS Sar40 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d54 Register(32 bit) ops_taps_fra_b2_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad54 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g5_sar7 ops_taps_fra_b2_g5_sar6 ops_taps_fra_b2_g5_sar5 ops_taps_fra_b2_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g5_sar7
ops_taps_fra_b2_g5_sar7[31:24]
OPS Sar47 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g5_sar6
ops_taps_fra_b2_g5_sar6[23:16]
OPS Sar46 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g5_sar5
ops_taps_fra_b2_g5_sar5[15:8]
OPS Sar45 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g5_sar4
ops_taps_fra_b2_g5_sar4[7:0]
OPS Sar44 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d58 Register(32 bit) ops_taps_fra_b2_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad58 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g6_sar3 ops_taps_fra_b2_g6_sar2 ops_taps_fra_b2_g6_sar1 ops_taps_fra_b2_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g6_sar3
ops_taps_fra_b2_g6_sar3[31:24]
OPS Sar51 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g6_sar2
ops_taps_fra_b2_g6_sar2[23:16]
OPS Sar50 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g6_sar1
ops_taps_fra_b2_g6_sar1[15:8]
OPS Sar49 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g6_sar0
ops_taps_fra_b2_g6_sar0[7:0]
OPS Sar48 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d5c Register(32 bit) ops_taps_fra_b2_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad5c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g6_sar7 ops_taps_fra_b2_g6_sar6 ops_taps_fra_b2_g6_sar5 ops_taps_fra_b2_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g6_sar7
ops_taps_fra_b2_g6_sar7[31:24]
OPS Sar55 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g6_sar6
ops_taps_fra_b2_g6_sar6[23:16]
OPS Sar54 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g6_sar5
ops_taps_fra_b2_g6_sar5[15:8]
OPS Sar53 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g6_sar4
ops_taps_fra_b2_g6_sar4[7:0]
OPS Sar52 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d60 Register(32 bit) ops_taps_fra_b2_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad60 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g7_sar3 ops_taps_fra_b2_g7_sar2 ops_taps_fra_b2_g7_sar1 ops_taps_fra_b2_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g7_sar3
ops_taps_fra_b2_g7_sar3[31:24]
OPS Sar59 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g7_sar2
ops_taps_fra_b2_g7_sar2[23:16]
OPS Sar58 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g7_sar1
ops_taps_fra_b2_g7_sar1[15:8]
OPS Sar57 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g7_sar0
ops_taps_fra_b2_g7_sar0[7:0]
OPS Sar56 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d64 Register(32 bit) ops_taps_fra_b2_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad64 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b2_g7_sar7 ops_taps_fra_b2_g7_sar6 ops_taps_fra_b2_g7_sar5 ops_taps_fra_b2_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b2_g7_sar7
ops_taps_fra_b2_g7_sar7[31:24]
OPS Sar63 tap frac value on bit 2

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b2_g7_sar6
ops_taps_fra_b2_g7_sar6[23:16]
OPS Sar62 tap frac value on bit 2

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b2_g7_sar5
ops_taps_fra_b2_g7_sar5[15:8]
OPS Sar61 tap frac value on bit 2

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b2_g7_sar4
ops_taps_fra_b2_g7_sar4[7:0]
OPS Sar60 tap frac value on bit 2

Reset: hex:0x00;

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+0x00000d68 Register(32 bit) ops_taps_fra_b3_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad68 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g0_sar3 ops_taps_fra_b3_g0_sar2 ops_taps_fra_b3_g0_sar1 ops_taps_fra_b3_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g0_sar3
ops_taps_fra_b3_g0_sar3[31:24]
OPS Sar3 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g0_sar2
ops_taps_fra_b3_g0_sar2[23:16]
OPS Sar2 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g0_sar1
ops_taps_fra_b3_g0_sar1[15:8]
OPS Sar1 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g0_sar0
ops_taps_fra_b3_g0_sar0[7:0]
OPS Sar0 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d6c Register(32 bit) ops_taps_fra_b3_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad6c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g0_sar7 ops_taps_fra_b3_g0_sar6 ops_taps_fra_b3_g0_sar5 ops_taps_fra_b3_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g0_sar7
ops_taps_fra_b3_g0_sar7[31:24]
OPS Sar7 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g0_sar6
ops_taps_fra_b3_g0_sar6[23:16]
OPS Sar6 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g0_sar5
ops_taps_fra_b3_g0_sar5[15:8]
OPS Sar5 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g0_sar4
ops_taps_fra_b3_g0_sar4[7:0]
OPS Sar4 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d70 Register(32 bit) ops_taps_fra_b3_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad70 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g1_sar3 ops_taps_fra_b3_g1_sar2 ops_taps_fra_b3_g1_sar1 ops_taps_fra_b3_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g1_sar3
ops_taps_fra_b3_g1_sar3[31:24]
OPS Sar11 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g1_sar2
ops_taps_fra_b3_g1_sar2[23:16]
OPS Sar10 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g1_sar1
ops_taps_fra_b3_g1_sar1[15:8]
OPS Sar9 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g1_sar0
ops_taps_fra_b3_g1_sar0[7:0]
OPS Sar8 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d74 Register(32 bit) ops_taps_fra_b3_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad74 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g1_sar7 ops_taps_fra_b3_g1_sar6 ops_taps_fra_b3_g1_sar5 ops_taps_fra_b3_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g1_sar7
ops_taps_fra_b3_g1_sar7[31:24]
OPS Sar15 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g1_sar6
ops_taps_fra_b3_g1_sar6[23:16]
OPS Sar14 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g1_sar5
ops_taps_fra_b3_g1_sar5[15:8]
OPS Sar13 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g1_sar4
ops_taps_fra_b3_g1_sar4[7:0]
OPS Sar12 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d78 Register(32 bit) ops_taps_fra_b3_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad78 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g2_sar3 ops_taps_fra_b3_g2_sar2 ops_taps_fra_b3_g2_sar1 ops_taps_fra_b3_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g2_sar3
ops_taps_fra_b3_g2_sar3[31:24]
OPS Sar19 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g2_sar2
ops_taps_fra_b3_g2_sar2[23:16]
OPS Sar18 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g2_sar1
ops_taps_fra_b3_g2_sar1[15:8]
OPS Sar17 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g2_sar0
ops_taps_fra_b3_g2_sar0[7:0]
OPS Sar16 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d7c Register(32 bit) ops_taps_fra_b3_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad7c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g2_sar7 ops_taps_fra_b3_g2_sar6 ops_taps_fra_b3_g2_sar5 ops_taps_fra_b3_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g2_sar7
ops_taps_fra_b3_g2_sar7[31:24]
OPS Sar23 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g2_sar6
ops_taps_fra_b3_g2_sar6[23:16]
OPS Sar22 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g2_sar5
ops_taps_fra_b3_g2_sar5[15:8]
OPS Sar21 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g2_sar4
ops_taps_fra_b3_g2_sar4[7:0]
OPS Sar20 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d80 Register(32 bit) ops_taps_fra_b3_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad80 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g3_sar3 ops_taps_fra_b3_g3_sar2 ops_taps_fra_b3_g3_sar1 ops_taps_fra_b3_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g3_sar3
ops_taps_fra_b3_g3_sar3[31:24]
OPS Sar27 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g3_sar2
ops_taps_fra_b3_g3_sar2[23:16]
OPS Sar26 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g3_sar1
ops_taps_fra_b3_g3_sar1[15:8]
OPS Sar25 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g3_sar0
ops_taps_fra_b3_g3_sar0[7:0]
OPS Sar24 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d84 Register(32 bit) ops_taps_fra_b3_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad84 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g3_sar7 ops_taps_fra_b3_g3_sar6 ops_taps_fra_b3_g3_sar5 ops_taps_fra_b3_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g3_sar7
ops_taps_fra_b3_g3_sar7[31:24]
OPS Sar31 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g3_sar6
ops_taps_fra_b3_g3_sar6[23:16]
OPS Sar30 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g3_sar5
ops_taps_fra_b3_g3_sar5[15:8]
OPS Sar29 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g3_sar4
ops_taps_fra_b3_g3_sar4[7:0]
OPS Sar28 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d88 Register(32 bit) ops_taps_fra_b3_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad88 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g4_sar3 ops_taps_fra_b3_g4_sar2 ops_taps_fra_b3_g4_sar1 ops_taps_fra_b3_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g4_sar3
ops_taps_fra_b3_g4_sar3[31:24]
OPS Sar35 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g4_sar2
ops_taps_fra_b3_g4_sar2[23:16]
OPS Sar34 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g4_sar1
ops_taps_fra_b3_g4_sar1[15:8]
OPS Sar33 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g4_sar0
ops_taps_fra_b3_g4_sar0[7:0]
OPS Sar32 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d8c Register(32 bit) ops_taps_fra_b3_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad8c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g4_sar7 ops_taps_fra_b3_g4_sar6 ops_taps_fra_b3_g4_sar5 ops_taps_fra_b3_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g4_sar7
ops_taps_fra_b3_g4_sar7[31:24]
OPS Sar39 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g4_sar6
ops_taps_fra_b3_g4_sar6[23:16]
OPS Sar38 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g4_sar5
ops_taps_fra_b3_g4_sar5[15:8]
OPS Sar37 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g4_sar4
ops_taps_fra_b3_g4_sar4[7:0]
OPS Sar36 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d90 Register(32 bit) ops_taps_fra_b3_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad90 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g5_sar3 ops_taps_fra_b3_g5_sar2 ops_taps_fra_b3_g5_sar1 ops_taps_fra_b3_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g5_sar3
ops_taps_fra_b3_g5_sar3[31:24]
OPS Sar43 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g5_sar2
ops_taps_fra_b3_g5_sar2[23:16]
OPS Sar42 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g5_sar1
ops_taps_fra_b3_g5_sar1[15:8]
OPS Sar41 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g5_sar0
ops_taps_fra_b3_g5_sar0[7:0]
OPS Sar40 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d94 Register(32 bit) ops_taps_fra_b3_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad94 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g5_sar7 ops_taps_fra_b3_g5_sar6 ops_taps_fra_b3_g5_sar5 ops_taps_fra_b3_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g5_sar7
ops_taps_fra_b3_g5_sar7[31:24]
OPS Sar47 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g5_sar6
ops_taps_fra_b3_g5_sar6[23:16]
OPS Sar46 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g5_sar5
ops_taps_fra_b3_g5_sar5[15:8]
OPS Sar45 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g5_sar4
ops_taps_fra_b3_g5_sar4[7:0]
OPS Sar44 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d98 Register(32 bit) ops_taps_fra_b3_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad98 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g6_sar3 ops_taps_fra_b3_g6_sar2 ops_taps_fra_b3_g6_sar1 ops_taps_fra_b3_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g6_sar3
ops_taps_fra_b3_g6_sar3[31:24]
OPS Sar51 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g6_sar2
ops_taps_fra_b3_g6_sar2[23:16]
OPS Sar50 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g6_sar1
ops_taps_fra_b3_g6_sar1[15:8]
OPS Sar49 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g6_sar0
ops_taps_fra_b3_g6_sar0[7:0]
OPS Sar48 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000d9c Register(32 bit) ops_taps_fra_b3_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ad9c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g6_sar7 ops_taps_fra_b3_g6_sar6 ops_taps_fra_b3_g6_sar5 ops_taps_fra_b3_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g6_sar7
ops_taps_fra_b3_g6_sar7[31:24]
OPS Sar55 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g6_sar6
ops_taps_fra_b3_g6_sar6[23:16]
OPS Sar54 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g6_sar5
ops_taps_fra_b3_g6_sar5[15:8]
OPS Sar53 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g6_sar4
ops_taps_fra_b3_g6_sar4[7:0]
OPS Sar52 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000da0 Register(32 bit) ops_taps_fra_b3_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ada0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g7_sar3 ops_taps_fra_b3_g7_sar2 ops_taps_fra_b3_g7_sar1 ops_taps_fra_b3_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g7_sar3
ops_taps_fra_b3_g7_sar3[31:24]
OPS Sar59 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g7_sar2
ops_taps_fra_b3_g7_sar2[23:16]
OPS Sar58 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g7_sar1
ops_taps_fra_b3_g7_sar1[15:8]
OPS Sar57 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g7_sar0
ops_taps_fra_b3_g7_sar0[7:0]
OPS Sar56 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000da4 Register(32 bit) ops_taps_fra_b3_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ada4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b3_g7_sar7 ops_taps_fra_b3_g7_sar6 ops_taps_fra_b3_g7_sar5 ops_taps_fra_b3_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b3_g7_sar7
ops_taps_fra_b3_g7_sar7[31:24]
OPS Sar63 tap frac value on bit 3

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b3_g7_sar6
ops_taps_fra_b3_g7_sar6[23:16]
OPS Sar62 tap frac value on bit 3

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b3_g7_sar5
ops_taps_fra_b3_g7_sar5[15:8]
OPS Sar61 tap frac value on bit 3

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b3_g7_sar4
ops_taps_fra_b3_g7_sar4[7:0]
OPS Sar60 tap frac value on bit 3

Reset: hex:0x00;

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+0x00000da8 Register(32 bit) ops_taps_fra_b4_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ada8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g0_sar3 ops_taps_fra_b4_g0_sar2 ops_taps_fra_b4_g0_sar1 ops_taps_fra_b4_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g0_sar3
ops_taps_fra_b4_g0_sar3[31:24]
OPS Sar3 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g0_sar2
ops_taps_fra_b4_g0_sar2[23:16]
OPS Sar2 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g0_sar1
ops_taps_fra_b4_g0_sar1[15:8]
OPS Sar1 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g0_sar0
ops_taps_fra_b4_g0_sar0[7:0]
OPS Sar0 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000dac Register(32 bit) ops_taps_fra_b4_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adac at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g0_sar7 ops_taps_fra_b4_g0_sar6 ops_taps_fra_b4_g0_sar5 ops_taps_fra_b4_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g0_sar7
ops_taps_fra_b4_g0_sar7[31:24]
OPS Sar7 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g0_sar6
ops_taps_fra_b4_g0_sar6[23:16]
OPS Sar6 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g0_sar5
ops_taps_fra_b4_g0_sar5[15:8]
OPS Sar5 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g0_sar4
ops_taps_fra_b4_g0_sar4[7:0]
OPS Sar4 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000db0 Register(32 bit) ops_taps_fra_b4_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adb0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g1_sar3 ops_taps_fra_b4_g1_sar2 ops_taps_fra_b4_g1_sar1 ops_taps_fra_b4_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g1_sar3
ops_taps_fra_b4_g1_sar3[31:24]
OPS Sar11 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g1_sar2
ops_taps_fra_b4_g1_sar2[23:16]
OPS Sar10 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g1_sar1
ops_taps_fra_b4_g1_sar1[15:8]
OPS Sar9 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g1_sar0
ops_taps_fra_b4_g1_sar0[7:0]
OPS Sar8 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000db4 Register(32 bit) ops_taps_fra_b4_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adb4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g1_sar7 ops_taps_fra_b4_g1_sar6 ops_taps_fra_b4_g1_sar5 ops_taps_fra_b4_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g1_sar7
ops_taps_fra_b4_g1_sar7[31:24]
OPS Sar15 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g1_sar6
ops_taps_fra_b4_g1_sar6[23:16]
OPS Sar14 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g1_sar5
ops_taps_fra_b4_g1_sar5[15:8]
OPS Sar13 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g1_sar4
ops_taps_fra_b4_g1_sar4[7:0]
OPS Sar12 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000db8 Register(32 bit) ops_taps_fra_b4_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adb8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g2_sar3 ops_taps_fra_b4_g2_sar2 ops_taps_fra_b4_g2_sar1 ops_taps_fra_b4_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g2_sar3
ops_taps_fra_b4_g2_sar3[31:24]
OPS Sar19 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g2_sar2
ops_taps_fra_b4_g2_sar2[23:16]
OPS Sar18 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g2_sar1
ops_taps_fra_b4_g2_sar1[15:8]
OPS Sar17 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g2_sar0
ops_taps_fra_b4_g2_sar0[7:0]
OPS Sar16 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000dbc Register(32 bit) ops_taps_fra_b4_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adbc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g2_sar7 ops_taps_fra_b4_g2_sar6 ops_taps_fra_b4_g2_sar5 ops_taps_fra_b4_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g2_sar7
ops_taps_fra_b4_g2_sar7[31:24]
OPS Sar23 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g2_sar6
ops_taps_fra_b4_g2_sar6[23:16]
OPS Sar22 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g2_sar5
ops_taps_fra_b4_g2_sar5[15:8]
OPS Sar21 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g2_sar4
ops_taps_fra_b4_g2_sar4[7:0]
OPS Sar20 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000dc0 Register(32 bit) ops_taps_fra_b4_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adc0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g3_sar3 ops_taps_fra_b4_g3_sar2 ops_taps_fra_b4_g3_sar1 ops_taps_fra_b4_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g3_sar3
ops_taps_fra_b4_g3_sar3[31:24]
OPS Sar27 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g3_sar2
ops_taps_fra_b4_g3_sar2[23:16]
OPS Sar26 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g3_sar1
ops_taps_fra_b4_g3_sar1[15:8]
OPS Sar25 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g3_sar0
ops_taps_fra_b4_g3_sar0[7:0]
OPS Sar24 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000dc4 Register(32 bit) ops_taps_fra_b4_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adc4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g3_sar7 ops_taps_fra_b4_g3_sar6 ops_taps_fra_b4_g3_sar5 ops_taps_fra_b4_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g3_sar7
ops_taps_fra_b4_g3_sar7[31:24]
OPS Sar31 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g3_sar6
ops_taps_fra_b4_g3_sar6[23:16]
OPS Sar30 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g3_sar5
ops_taps_fra_b4_g3_sar5[15:8]
OPS Sar29 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g3_sar4
ops_taps_fra_b4_g3_sar4[7:0]
OPS Sar28 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000dc8 Register(32 bit) ops_taps_fra_b4_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adc8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g4_sar3 ops_taps_fra_b4_g4_sar2 ops_taps_fra_b4_g4_sar1 ops_taps_fra_b4_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g4_sar3
ops_taps_fra_b4_g4_sar3[31:24]
OPS Sar35 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g4_sar2
ops_taps_fra_b4_g4_sar2[23:16]
OPS Sar34 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g4_sar1
ops_taps_fra_b4_g4_sar1[15:8]
OPS Sar33 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g4_sar0
ops_taps_fra_b4_g4_sar0[7:0]
OPS Sar32 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000dcc Register(32 bit) ops_taps_fra_b4_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adcc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g4_sar7 ops_taps_fra_b4_g4_sar6 ops_taps_fra_b4_g4_sar5 ops_taps_fra_b4_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g4_sar7
ops_taps_fra_b4_g4_sar7[31:24]
OPS Sar39 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g4_sar6
ops_taps_fra_b4_g4_sar6[23:16]
OPS Sar38 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g4_sar5
ops_taps_fra_b4_g4_sar5[15:8]
OPS Sar37 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g4_sar4
ops_taps_fra_b4_g4_sar4[7:0]
OPS Sar36 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000dd0 Register(32 bit) ops_taps_fra_b4_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702add0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g5_sar3 ops_taps_fra_b4_g5_sar2 ops_taps_fra_b4_g5_sar1 ops_taps_fra_b4_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g5_sar3
ops_taps_fra_b4_g5_sar3[31:24]
OPS Sar43 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g5_sar2
ops_taps_fra_b4_g5_sar2[23:16]
OPS Sar42 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g5_sar1
ops_taps_fra_b4_g5_sar1[15:8]
OPS Sar41 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g5_sar0
ops_taps_fra_b4_g5_sar0[7:0]
OPS Sar40 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000dd4 Register(32 bit) ops_taps_fra_b4_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702add4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g5_sar7 ops_taps_fra_b4_g5_sar6 ops_taps_fra_b4_g5_sar5 ops_taps_fra_b4_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g5_sar7
ops_taps_fra_b4_g5_sar7[31:24]
OPS Sar47 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g5_sar6
ops_taps_fra_b4_g5_sar6[23:16]
OPS Sar46 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g5_sar5
ops_taps_fra_b4_g5_sar5[15:8]
OPS Sar45 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g5_sar4
ops_taps_fra_b4_g5_sar4[7:0]
OPS Sar44 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000dd8 Register(32 bit) ops_taps_fra_b4_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702add8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g6_sar3 ops_taps_fra_b4_g6_sar2 ops_taps_fra_b4_g6_sar1 ops_taps_fra_b4_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g6_sar3
ops_taps_fra_b4_g6_sar3[31:24]
OPS Sar51 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g6_sar2
ops_taps_fra_b4_g6_sar2[23:16]
OPS Sar50 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g6_sar1
ops_taps_fra_b4_g6_sar1[15:8]
OPS Sar49 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g6_sar0
ops_taps_fra_b4_g6_sar0[7:0]
OPS Sar48 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000ddc Register(32 bit) ops_taps_fra_b4_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702addc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g6_sar7 ops_taps_fra_b4_g6_sar6 ops_taps_fra_b4_g6_sar5 ops_taps_fra_b4_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g6_sar7
ops_taps_fra_b4_g6_sar7[31:24]
OPS Sar55 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g6_sar6
ops_taps_fra_b4_g6_sar6[23:16]
OPS Sar54 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g6_sar5
ops_taps_fra_b4_g6_sar5[15:8]
OPS Sar53 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g6_sar4
ops_taps_fra_b4_g6_sar4[7:0]
OPS Sar52 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000de0 Register(32 bit) ops_taps_fra_b4_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ade0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g7_sar3 ops_taps_fra_b4_g7_sar2 ops_taps_fra_b4_g7_sar1 ops_taps_fra_b4_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g7_sar3
ops_taps_fra_b4_g7_sar3[31:24]
OPS Sar59 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g7_sar2
ops_taps_fra_b4_g7_sar2[23:16]
OPS Sar58 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g7_sar1
ops_taps_fra_b4_g7_sar1[15:8]
OPS Sar57 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g7_sar0
ops_taps_fra_b4_g7_sar0[7:0]
OPS Sar56 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000de4 Register(32 bit) ops_taps_fra_b4_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ade4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b4_g7_sar7 ops_taps_fra_b4_g7_sar6 ops_taps_fra_b4_g7_sar5 ops_taps_fra_b4_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b4_g7_sar7
ops_taps_fra_b4_g7_sar7[31:24]
OPS Sar63 tap frac value on bit 4

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b4_g7_sar6
ops_taps_fra_b4_g7_sar6[23:16]
OPS Sar62 tap frac value on bit 4

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b4_g7_sar5
ops_taps_fra_b4_g7_sar5[15:8]
OPS Sar61 tap frac value on bit 4

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b4_g7_sar4
ops_taps_fra_b4_g7_sar4[7:0]
OPS Sar60 tap frac value on bit 4

Reset: hex:0x00;

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+0x00000de8 Register(32 bit) ops_taps_fra_b5_sar_0to3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ade8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g0_sar3 ops_taps_fra_b5_g0_sar2 ops_taps_fra_b5_g0_sar1 ops_taps_fra_b5_g0_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g0_sar3
ops_taps_fra_b5_g0_sar3[31:24]
OPS Sar3 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g0_sar2
ops_taps_fra_b5_g0_sar2[23:16]
OPS Sar2 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g0_sar1
ops_taps_fra_b5_g0_sar1[15:8]
OPS Sar1 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g0_sar0
ops_taps_fra_b5_g0_sar0[7:0]
OPS Sar0 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000dec Register(32 bit) ops_taps_fra_b5_sar_4to7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adec at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g0_sar7 ops_taps_fra_b5_g0_sar6 ops_taps_fra_b5_g0_sar5 ops_taps_fra_b5_g0_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g0_sar7
ops_taps_fra_b5_g0_sar7[31:24]
OPS Sar7 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g0_sar6
ops_taps_fra_b5_g0_sar6[23:16]
OPS Sar6 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g0_sar5
ops_taps_fra_b5_g0_sar5[15:8]
OPS Sar5 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g0_sar4
ops_taps_fra_b5_g0_sar4[7:0]
OPS Sar4 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000df0 Register(32 bit) ops_taps_fra_b5_sar_8to11
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adf0 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g1_sar3 ops_taps_fra_b5_g1_sar2 ops_taps_fra_b5_g1_sar1 ops_taps_fra_b5_g1_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g1_sar3
ops_taps_fra_b5_g1_sar3[31:24]
OPS Sar11 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g1_sar2
ops_taps_fra_b5_g1_sar2[23:16]
OPS Sar10 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g1_sar1
ops_taps_fra_b5_g1_sar1[15:8]
OPS Sar9 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g1_sar0
ops_taps_fra_b5_g1_sar0[7:0]
OPS Sar8 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000df4 Register(32 bit) ops_taps_fra_b5_sar_12to15
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adf4 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g1_sar7 ops_taps_fra_b5_g1_sar6 ops_taps_fra_b5_g1_sar5 ops_taps_fra_b5_g1_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g1_sar7
ops_taps_fra_b5_g1_sar7[31:24]
OPS Sar15 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g1_sar6
ops_taps_fra_b5_g1_sar6[23:16]
OPS Sar14 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g1_sar5
ops_taps_fra_b5_g1_sar5[15:8]
OPS Sar13 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g1_sar4
ops_taps_fra_b5_g1_sar4[7:0]
OPS Sar12 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000df8 Register(32 bit) ops_taps_fra_b5_sar_16to19
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adf8 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g2_sar3 ops_taps_fra_b5_g2_sar2 ops_taps_fra_b5_g2_sar1 ops_taps_fra_b5_g2_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g2_sar3
ops_taps_fra_b5_g2_sar3[31:24]
OPS Sar19 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g2_sar2
ops_taps_fra_b5_g2_sar2[23:16]
OPS Sar18 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g2_sar1
ops_taps_fra_b5_g2_sar1[15:8]
OPS Sar17 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g2_sar0
ops_taps_fra_b5_g2_sar0[7:0]
OPS Sar16 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000dfc Register(32 bit) ops_taps_fra_b5_sar_20to23
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702adfc at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g2_sar7 ops_taps_fra_b5_g2_sar6 ops_taps_fra_b5_g2_sar5 ops_taps_fra_b5_g2_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g2_sar7
ops_taps_fra_b5_g2_sar7[31:24]
OPS Sar23 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g2_sar6
ops_taps_fra_b5_g2_sar6[23:16]
OPS Sar22 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g2_sar5
ops_taps_fra_b5_g2_sar5[15:8]
OPS Sar21 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g2_sar4
ops_taps_fra_b5_g2_sar4[7:0]
OPS Sar20 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e00 Register(32 bit) ops_taps_fra_b5_sar_24to27
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae00 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g3_sar3 ops_taps_fra_b5_g3_sar2 ops_taps_fra_b5_g3_sar1 ops_taps_fra_b5_g3_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g3_sar3
ops_taps_fra_b5_g3_sar3[31:24]
OPS Sar27 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g3_sar2
ops_taps_fra_b5_g3_sar2[23:16]
OPS Sar26 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g3_sar1
ops_taps_fra_b5_g3_sar1[15:8]
OPS Sar25 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g3_sar0
ops_taps_fra_b5_g3_sar0[7:0]
OPS Sar24 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e04 Register(32 bit) ops_taps_fra_b5_sar_28to31
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae04 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g3_sar7 ops_taps_fra_b5_g3_sar6 ops_taps_fra_b5_g3_sar5 ops_taps_fra_b5_g3_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g3_sar7
ops_taps_fra_b5_g3_sar7[31:24]
OPS Sar31 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g3_sar6
ops_taps_fra_b5_g3_sar6[23:16]
OPS Sar30 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g3_sar5
ops_taps_fra_b5_g3_sar5[15:8]
OPS Sar29 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g3_sar4
ops_taps_fra_b5_g3_sar4[7:0]
OPS Sar28 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e08 Register(32 bit) ops_taps_fra_b5_sar_32to35
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae08 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g4_sar3 ops_taps_fra_b5_g4_sar2 ops_taps_fra_b5_g4_sar1 ops_taps_fra_b5_g4_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g4_sar3
ops_taps_fra_b5_g4_sar3[31:24]
OPS Sar35 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g4_sar2
ops_taps_fra_b5_g4_sar2[23:16]
OPS Sar34 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g4_sar1
ops_taps_fra_b5_g4_sar1[15:8]
OPS Sar33 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g4_sar0
ops_taps_fra_b5_g4_sar0[7:0]
OPS Sar32 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e0c Register(32 bit) ops_taps_fra_b5_sar_36to39
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae0c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g4_sar7 ops_taps_fra_b5_g4_sar6 ops_taps_fra_b5_g4_sar5 ops_taps_fra_b5_g4_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g4_sar7
ops_taps_fra_b5_g4_sar7[31:24]
OPS Sar39 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g4_sar6
ops_taps_fra_b5_g4_sar6[23:16]
OPS Sar38 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g4_sar5
ops_taps_fra_b5_g4_sar5[15:8]
OPS Sar37 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g4_sar4
ops_taps_fra_b5_g4_sar4[7:0]
OPS Sar36 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e10 Register(32 bit) ops_taps_fra_b5_sar_40to43
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae10 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g5_sar3 ops_taps_fra_b5_g5_sar2 ops_taps_fra_b5_g5_sar1 ops_taps_fra_b5_g5_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g5_sar3
ops_taps_fra_b5_g5_sar3[31:24]
OPS Sar43 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g5_sar2
ops_taps_fra_b5_g5_sar2[23:16]
OPS Sar42 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g5_sar1
ops_taps_fra_b5_g5_sar1[15:8]
OPS Sar41 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g5_sar0
ops_taps_fra_b5_g5_sar0[7:0]
OPS Sar40 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e14 Register(32 bit) ops_taps_fra_b5_sar_44to47
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae14 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g5_sar7 ops_taps_fra_b5_g5_sar6 ops_taps_fra_b5_g5_sar5 ops_taps_fra_b5_g5_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g5_sar7
ops_taps_fra_b5_g5_sar7[31:24]
OPS Sar47 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g5_sar6
ops_taps_fra_b5_g5_sar6[23:16]
OPS Sar46 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g5_sar5
ops_taps_fra_b5_g5_sar5[15:8]
OPS Sar45 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g5_sar4
ops_taps_fra_b5_g5_sar4[7:0]
OPS Sar44 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e18 Register(32 bit) ops_taps_fra_b5_sar_48to51
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae18 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g6_sar3 ops_taps_fra_b5_g6_sar2 ops_taps_fra_b5_g6_sar1 ops_taps_fra_b5_g6_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g6_sar3
ops_taps_fra_b5_g6_sar3[31:24]
OPS Sar51 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g6_sar2
ops_taps_fra_b5_g6_sar2[23:16]
OPS Sar50 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g6_sar1
ops_taps_fra_b5_g6_sar1[15:8]
OPS Sar49 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g6_sar0
ops_taps_fra_b5_g6_sar0[7:0]
OPS Sar48 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e1c Register(32 bit) ops_taps_fra_b5_sar_52to55
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae1c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g6_sar7 ops_taps_fra_b5_g6_sar6 ops_taps_fra_b5_g6_sar5 ops_taps_fra_b5_g6_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g6_sar7
ops_taps_fra_b5_g6_sar7[31:24]
OPS Sar55 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g6_sar6
ops_taps_fra_b5_g6_sar6[23:16]
OPS Sar54 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g6_sar5
ops_taps_fra_b5_g6_sar5[15:8]
OPS Sar53 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g6_sar4
ops_taps_fra_b5_g6_sar4[7:0]
OPS Sar52 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e20 Register(32 bit) ops_taps_fra_b5_sar_56to59
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae20 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g7_sar3 ops_taps_fra_b5_g7_sar2 ops_taps_fra_b5_g7_sar1 ops_taps_fra_b5_g7_sar0
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g7_sar3
ops_taps_fra_b5_g7_sar3[31:24]
OPS Sar59 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g7_sar2
ops_taps_fra_b5_g7_sar2[23:16]
OPS Sar58 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g7_sar1
ops_taps_fra_b5_g7_sar1[15:8]
OPS Sar57 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g7_sar0
ops_taps_fra_b5_g7_sar0[7:0]
OPS Sar56 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e24 Register(32 bit) ops_taps_fra_b5_sar_60to63
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae24 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name ops_taps_fra_b5_g7_sar7 ops_taps_fra_b5_g7_sar6 ops_taps_fra_b5_g7_sar5 ops_taps_fra_b5_g7_sar4
Access RW/V RW/V RW/V RW/V

[31:24]
RW/V

ops_taps_fra_b5_g7_sar7
ops_taps_fra_b5_g7_sar7[31:24]
OPS Sar63 tap frac value on bit 5

Reset: hex:0x00;

[23:16]
RW/V

ops_taps_fra_b5_g7_sar6
ops_taps_fra_b5_g7_sar6[23:16]
OPS Sar62 tap frac value on bit 5

Reset: hex:0x00;

[15:08]
RW/V

ops_taps_fra_b5_g7_sar5
ops_taps_fra_b5_g7_sar5[15:8]
OPS Sar61 tap frac value on bit 5

Reset: hex:0x00;

[07:00]
RW/V

ops_taps_fra_b5_g7_sar4
ops_taps_fra_b5_g7_sar4[7:0]
OPS Sar60 tap frac value on bit 5

Reset: hex:0x00;

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+0x00000e28 Register(32 bit) ofc_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae28 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x000b42d0
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 1 0 0 0 0 1 0 1 1 0 1 0 0 0 0
Name - ofc_taps_2 ofc_taps_1 ofc_taps_0
Access - RW/V RW/V RW/V

[29:20]
RW/V

ofc_taps_2
ofc_taps_2[29:20]
ofc tap2 value

Reset: hex:0x000;

[19:10]
RW/V

ofc_taps_1
ofc_taps_1[19:10]
ofc tap1 value

Reset: hex:0x2d0;

[09:00]
RW/V

ofc_taps_0
ofc_taps_0[9:0]
ofc tap0 value

Reset: hex:0x2d0;

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+0x00000e2c Register(32 bit) ofc_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae2c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x1304c000
Unaffected 0xc0000000
Undefined 0xc0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - 0 1 0 0 1 1 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ofc_taps_5 ofc_taps_4 ofc_taps_3
Access - RW/V RW/V RW/V

[29:20]
RW/V

ofc_taps_5
ofc_taps_5[29:20]
ofc tap5 value

Reset: hex:0x130;

[19:10]
RW/V

ofc_taps_4
ofc_taps_4[19:10]
ofc tap4 value

Reset: hex:0x130;

[09:00]
RW/V

ofc_taps_3
ofc_taps_3[9:0]
ofc tap3 value

Reset: hex:0x000;

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+0x00000e30 Register(32 bit) ofc_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae30 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ofc_taps_fra_2 ofc_taps_fra_1 ofc_taps_fra_0
Access - RW/V RW/V RW/V

[23:16]
RW/V

ofc_taps_fra_2
ofc_taps_fra_2[23:16]
ofc tap2 fractional value

Reset: hex:0x00;

[15:08]
RW/V

ofc_taps_fra_1
ofc_taps_fra_1[15:8]
ofc tap1 fractional value

Reset: hex:0x00;

[07:00]
RW/V

ofc_taps_fra_0
ofc_taps_fra_0[7:0]
ofc tap0 fractional value

Reset: hex:0x00;

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+0x00000e34 Register(32 bit) ofc_control_7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae34 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - ofc_taps_fra_5 ofc_taps_fra_4 ofc_taps_fra_3
Access - RW/V RW/V RW/V

[23:16]
RW/V

ofc_taps_fra_5
ofc_taps_fra_5[23:16]
ofc tap5 fractional value

Reset: hex:0x00;

[15:08]
RW/V

ofc_taps_fra_4
ofc_taps_fra_4[15:8]
ofc tap4 fractional value

Reset: hex:0x00;

[07:00]
RW/V

ofc_taps_fra_3
ofc_taps_fra_3[7:0]
ofc tap3 fractional value

Reset: hex:0x00;

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+0x00000e38 Register(32 bit) cdr_ffe_ofc_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae38 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x0005a168
Unaffected 0xe0080200
Undefined 0xe0080200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - 0 0 0 0 0 0 0 0 0 - 1 0 1 1 0 1 0 0 0 - 1 0 1 1 0 1 0 0 0
Name - cdr_ffe_ofc_taps_2 - cdr_ffe_ofc_taps_1 - cdr_ffe_ofc_taps_0
Access - RW/V - RW/V - RW/V

[28:20]
RW/V

cdr_ffe_ofc_taps_2
cdr_ffe_ofc_taps_2[28:20]
cdr_ffe_ofc tap2 value

Reset: hex:0x000;

[18:10]
RW/V

cdr_ffe_ofc_taps_1
cdr_ffe_ofc_taps_1[18:10]
cdr_ffe_ofc tap1 value

Reset: hex:0x168;

[08:00]
RW/V

cdr_ffe_ofc_taps_0
cdr_ffe_ofc_taps_0[8:0]
cdr_ffe_ofc tap0 value

Reset: hex:0x168;

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+0x00000e3c Register(32 bit) cdr_ffe_ofc_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae3c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x09826000
Unaffected 0xe0080200
Undefined 0xe0080200

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - 0 1 0 0 1 1 0 0 0 - 0 1 0 0 1 1 0 0 0 - 0 0 0 0 0 0 0 0 0
Name - cdr_ffe_ofc_taps_5 - cdr_ffe_ofc_taps_4 - cdr_ffe_ofc_taps_3
Access - RW/V - RW/V - RW/V

[28:20]
RW/V

cdr_ffe_ofc_taps_5
cdr_ffe_ofc_taps_5[28:20]
cdr_ffe_ofc tap5 value

Reset: hex:0x098;

[18:10]
RW/V

cdr_ffe_ofc_taps_4
cdr_ffe_ofc_taps_4[18:10]
cdr_ffe_ofc tap4 value

Reset: hex:0x098;

[08:00]
RW/V

cdr_ffe_ofc_taps_3
cdr_ffe_ofc_taps_3[8:0]
cdr_ffe_ofc tap3 value

Reset: hex:0x000;

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+0x00000e40 Register(32 bit) cdr_ffe_ofc_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae40 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - cdr_ffe_ofc_taps_fra_2 cdr_ffe_ofc_taps_fra_1 cdr_ffe_ofc_taps_fra_0
Access - RW/V RW/V RW/V

[23:16]
RW/V

cdr_ffe_ofc_taps_fra_2
cdr_ffe_ofc_taps_fra_2[23:16]
cdr_ffe_ofc tap2 fractional value

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_ofc_taps_fra_1
cdr_ffe_ofc_taps_fra_1[15:8]
cdr_ffe_ofc tap1 fractional value

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_ofc_taps_fra_0
cdr_ffe_ofc_taps_fra_0[7:0]
cdr_ffe_ofc tap0 fractional value

Reset: hex:0x00;

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+0x00000e44 Register(32 bit) cdr_ffe_ofc_control_7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae44 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - cdr_ffe_ofc_taps_fra_5 cdr_ffe_ofc_taps_fra_4 cdr_ffe_ofc_taps_fra_3
Access - RW/V RW/V RW/V

[23:16]
RW/V

cdr_ffe_ofc_taps_fra_5
cdr_ffe_ofc_taps_fra_5[23:16]
cdr_ffe_ofc tap5 fractional value

Reset: hex:0x00;

[15:08]
RW/V

cdr_ffe_ofc_taps_fra_4
cdr_ffe_ofc_taps_fra_4[15:8]
cdr_ffe_ofc tap4 fractional value

Reset: hex:0x00;

[07:00]
RW/V

cdr_ffe_ofc_taps_fra_3
cdr_ffe_ofc_taps_fra_3[7:0]
cdr_ffe_ofc tap3 fractional value

Reset: hex:0x00;

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+0x00000e48 Register(32 bit) adcofc_control_4
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae48 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00002d2d
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 0 0 0 0 0 0 - - 1 0 1 1 0 1 - - 1 0 1 1 0 1
Name - adcofc_taps_2 - adcofc_taps_1 - adcofc_taps_0
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adcofc_taps_2
adcofc_taps_2[21:16]
adcofc tap2 value

Reset: hex:0x00;

[13:08]
RW/V

adcofc_taps_1
adcofc_taps_1[13:8]
adcofc tap1 value

Reset: hex:0x2d;

[05:00]
RW/V

adcofc_taps_0
adcofc_taps_0[5:0]
adcofc tap0 value

Reset: hex:0x2d;

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+0x00000e4c Register(32 bit) adcofc_control_5
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae4c at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00131300
Unaffected 0xffc0c0c0
Undefined 0xffc0c0c0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - 0 1 0 0 1 1 - - 0 1 0 0 1 1 - - 0 0 0 0 0 0
Name - adcofc_taps_5 - adcofc_taps_4 - adcofc_taps_3
Access - RW/V - RW/V - RW/V

[21:16]
RW/V

adcofc_taps_5
adcofc_taps_5[21:16]
adcofc tap5 value

Reset: hex:0x13;

[13:08]
RW/V

adcofc_taps_4
adcofc_taps_4[13:8]
adcofc tap4 value

Reset: hex:0x13;

[05:00]
RW/V

adcofc_taps_3
adcofc_taps_3[5:0]
adcofc tap3 value

Reset: hex:0x00;

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+0x00000e50 Register(32 bit) adcofc_control_6
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae50 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - adcofc_taps_fra_2 adcofc_taps_fra_1 adcofc_taps_fra_0
Access - RW/V RW/V RW/V

[23:16]
RW/V

adcofc_taps_fra_2
adcofc_taps_fra_2[23:16]
adcofc tap2 fractional value

Reset: hex:0x00;

[15:08]
RW/V

adcofc_taps_fra_1
adcofc_taps_fra_1[15:8]
adcofc tap1 fractional value

Reset: hex:0x00;

[07:00]
RW/V

adcofc_taps_fra_0
adcofc_taps_fra_0[7:0]
adcofc tap0 fractional value

Reset: hex:0x00;

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+0x00000e54 Register(32 bit) adcofc_control_7
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702ae54 at NOC.jesd__axi (Mem)

Access RW/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xff000000
Undefined 0xff000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - adcofc_taps_fra_5 adcofc_taps_fra_4 adcofc_taps_fra_3
Access - RW/V RW/V RW/V

[23:16]
RW/V

adcofc_taps_fra_5
adcofc_taps_fra_5[23:16]
adcofc tap5 fractional value

Reset: hex:0x00;

[15:08]
RW/V

adcofc_taps_fra_4
adcofc_taps_fra_4[15:8]
adcofc tap4 fractional value

Reset: hex:0x00;

[07:00]
RW/V

adcofc_taps_fra_3
adcofc_taps_fra_3[7:0]
adcofc tap3 fractional value

Reset: hex:0x00;

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+0x00000ef8 Register(32 bit) rx_sigdet_venv_ctrl1
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aef8 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rx_sigdet_voltage_envelope_priority rx_sigdet_voltage_envelope_los_cnt_clr rx_sigdet_voltage_envelope_det_cnt_clr rx_sigdet_voltage_envelope_debounce_los_val rx_sigdet_voltage_envelope_debounce_det_val rx_sigdet_voltage_envelope_res_ovrd_val rx_sigdet_voltage_envelope_res_ovrd_en rx_sigdet_voltage_envelope_src_ovrd_val rx_sigdet_voltage_envelope_src_ovrd_en rx_sigdet_voltage_envelope_stats_max rx_sigdet_voltage_envelope_iter rx_sigdet_voltage_envelope_cont_mode rx_sigdet_voltage_envelope_en
Access RW RW RW RW RW RW RW RW RW RW RW RW RW

[31:31]
RW

rx_sigdet_voltage_envelope_priority
rx_sigdet_voltage_envelope_priority[31:31]
Rx signal Det/los Volt Envelope priority bit 1: prioritize DET 0: prioritize:LOS

Reset: hex:0x0;

[30:30]
RW

rx_sigdet_voltage_envelope_los_cnt_clr
rx_sigdet_voltage_envelope_los_cnt_clr[30:30]
Rx signal Det/los Volt Envelope reset bin count for los

Reset: hex:0x0;

[29:29]
RW

rx_sigdet_voltage_envelope_det_cnt_clr
rx_sigdet_voltage_envelope_det_cnt_clr[29:29]
Rx signal Det/los Volt Envelope reset bin count for detection

Reset: hex:0x0;

[28:26]
RW

rx_sigdet_voltage_envelope_debounce_los_val
rx_sigdet_voltage_envelope_debounce_los_val[28:26]
Rx signal Det/los Volt Envelope debounce value for los Enabled when >1

Reset: hex:0x0;

[25:23]
RW

rx_sigdet_voltage_envelope_debounce_det_val
rx_sigdet_voltage_envelope_debounce_det_val[25:23]
Rx signal Det/los Volt Envelope debounce value for detection Enabled when >1

Reset: hex:0x0;

[22:22]
RW

rx_sigdet_voltage_envelope_res_ovrd_val
rx_sigdet_voltage_envelope_res_ovrd_val[22:22]
Rx signal Det/los Volt Envelope final result override value bit

Reset: hex:0x0;

[21:21]
RW

rx_sigdet_voltage_envelope_res_ovrd_en
rx_sigdet_voltage_envelope_res_ovrd_en[21:21]
Rx signal Det/los Volt Envelope final result override Enable bit

Reset: hex:0x0;

[20:19]
RW

rx_sigdet_voltage_envelope_src_ovrd_val
rx_sigdet_voltage_envelope_src_ovrd_val[20:19]
Rx signal Det/los Volt Envelope source data override value

Reset: hex:0x0;

[18:18]
RW

rx_sigdet_voltage_envelope_src_ovrd_en
rx_sigdet_voltage_envelope_src_ovrd_en[18:18]
Rx signal Det/los Volt Envelope Source data override Enable bit

Reset: hex:0x0;

[17:10]
RW

rx_sigdet_voltage_envelope_stats_max
rx_sigdet_voltage_envelope_stats_max[17:10]
Rx signal Det/los Volt Envelope number of cycles to collect stats for each iter

Reset: hex:0x00;

[09:02]
RW

rx_sigdet_voltage_envelope_iter
rx_sigdet_voltage_envelope_iter[9:2]
Rx signal Det/los Volt Envelope number of iteration in cont. mode

Reset: hex:0x00;

[01:01]
RW

rx_sigdet_voltage_envelope_cont_mode
rx_sigdet_voltage_envelope_cont_mode[1:1]
Rx signal Det/los Volt Envelope cointinuous mode bit

Reset: hex:0x0;

[00:00]
RW

rx_sigdet_voltage_envelope_en
rx_sigdet_voltage_envelope_en[0:0]
Rx signal Det/los Volt Envelope Enable bit

Reset: hex:0x0;

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+0x00000efc Register(32 bit) rx_sigdet_venv_ctrl2
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702aefc at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rx_sigdet_voltage_envelope_det_thresh rx_sigdet_voltage_envelope_det_nlevel rx_sigdet_voltage_envelope_det_plevel
Access RW RW RW

[31:18]
RW

rx_sigdet_voltage_envelope_det_thresh
rx_sigdet_voltage_envelope_det_thresh[31:18]
Rx signal Det/los Volt Envelope lower level limit detection threshold (unsigned )

Reset: hex:0x0000;

[17:09]
RW

rx_sigdet_voltage_envelope_det_nlevel
rx_sigdet_voltage_envelope_det_nlevel[17:9]
Rx signal Det/los Volt Envelope lower level limit detection (unsigned)

Reset: hex:0x000;

[08:00]
RW

rx_sigdet_voltage_envelope_det_plevel
rx_sigdet_voltage_envelope_det_plevel[8:0]
Rx signal Det/los Volt Envelope upper level limit for detection (unsigned )

Reset: hex:0x000;

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+0x00000f00 Register(32 bit) rx_sigdet_venv_ctrl3
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702af00 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rx_sigdet_voltage_envelope_los_thresh rx_sigdet_voltage_envelope_los_nlevel rx_sigdet_voltage_envelope_los_plevel
Access RW RW RW

[31:18]
RW

rx_sigdet_voltage_envelope_los_thresh
rx_sigdet_voltage_envelope_los_thresh[31:18]
Rx signal Det/los Volt Envelope lower level limit los threshold (unsigned )

Reset: hex:0x0000;

[17:09]
RW

rx_sigdet_voltage_envelope_los_nlevel
rx_sigdet_voltage_envelope_los_nlevel[17:9]
Rx signal Det/los Volt Envelope lower level limit los (unsigned)

Reset: hex:0x000;

[08:00]
RW

rx_sigdet_voltage_envelope_los_plevel
rx_sigdet_voltage_envelope_los_plevel[8:0]
Rx signal Det/los Volt Envelope upper level limit for los (unsigned )

Reset: hex:0x000;

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+0x00000f04 Register(32 bit) rx_sigdet_venv_status
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702af04 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xf0000000
Undefined 0xf0000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name - rx_sigdet_voltage_envelope_los_cnt rx_sigdet_voltage_envelope_det_cnt
Access - RO/V RO/V

[27:14]
RO/V

rx_sigdet_voltage_envelope_los_cnt
rx_sigdet_voltage_envelope_los_cnt[27:14]
Rx signal Det/los Volt Envelope los bin counter

Reset: hex:0x0000;

[13:00]
RO/V

rx_sigdet_voltage_envelope_det_cnt
rx_sigdet_voltage_envelope_det_cnt[13:0]
Rx signal Det/los Volt Envelope detection bin counter

Reset: hex:0x0000;

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+0x00000f08 Register(32 bit) rx_sigdet_venv_status_clr
placeholder
placeholder

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702af08 at NOC.jesd__axi (Mem)

Access RO/C/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp 0x00000000
Unaffected 0xffffffe0
Undefined 0xffffffe0

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 0 0 0 0
Name - rx_sigdet_voltage_envelope_iter_done rx_sigdet_voltage_envelope_done rx_sigdet_voltage_envelope_error rx_sigdet_voltage_envelope_debounce rx_sigdet_voltage_envelope
Access - RO/C/V RO/C/V RO/C/V RO/C/V RO/C/V

[04:04]
RO/C/V

rx_sigdet_voltage_envelope_iter_done
rx_sigdet_voltage_envelope_iter_done[4:4]
Rx signal Det/los Volt Envelope all iterations done

Reset: hex:0x0;

[03:03]
RO/C/V

rx_sigdet_voltage_envelope_done
rx_sigdet_voltage_envelope_done[3:3]
Rx signal Det/los Volt Envelope all 1 stats cycle done

Reset: hex:0x0;

[02:02]
RO/C/V

rx_sigdet_voltage_envelope_error
rx_sigdet_voltage_envelope_error[2:2]
Rx signal Det/los Volt Envelope error when both det and los are identified at the same stat cycle. (block will sue priority )

Reset: hex:0x0;

[01:01]
RO/C/V

rx_sigdet_voltage_envelope_debounce
rx_sigdet_voltage_envelope_debounce[1:1]
Rx signal Det/los Volt Envelope linidcation debounced. Sticky on Iter Done.

Reset: hex:0x0;

[00:00]
RO/C/V

rx_sigdet_voltage_envelope
rx_sigdet_voltage_envelope[0:0]
Rx signal Det/los Volt Envelope linidcation Not debounced. Sticky on Done from first iteration

Reset: hex:0x0;

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+0x00000fd8 Register(32 bit) rxword_rw_spare_0
Spare RW register
Spare RW register

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702afd8 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxword_rw_spare_0
Access RW

[31:00]
RW

rxword_rw_spare_0
rxword_rw_spare_0[31:0]
Spare register. Reseved for future

Reset: hex:0x00000000;

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+0x00000fdc Register(32 bit) rxword_rw_spare_1
Spare RW register
Spare RW register

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702afdc at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxword_rw_spare_1
Access RW

[31:00]
RW

rxword_rw_spare_1
rxword_rw_spare_1[31:0]
Spare register. Reseved for future

Reset: hex:0x00000000;

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+0x00000fe0 Register(32 bit) rxword_rw_spare_2
Spare RW register
Spare RW register

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702afe0 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxword_rw_spare_2
Access RW

[31:00]
RW

rxword_rw_spare_2
rxword_rw_spare_2[31:0]
Spare register. Reseved for future

Reset: hex:0x00000000;

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+0x00000fe4 Register(32 bit) rxword_rw_spare_3
Spare RW register
Spare RW register

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702afe4 at NOC.jesd__axi (Mem)

Access RW

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxword_rw_spare_3
Access RW

[31:00]
RW

rxword_rw_spare_3
rxword_rw_spare_3[31:0]
Spare register. Reseved for future

Reset: hex:0x00000000;

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+0x00000fe8 Register(32 bit) rxword_ro_spare_0
Spare RO register
Spare RO register

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702afe8 at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxword_ro_spare_0
Access RO/V

[31:00]
RO/V

rxword_ro_spare_0
rxword_ro_spare_0[31:0]
Spare register. Reseved for future

Reset: hex:0x00000000;

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+0x00000fec Register(32 bit) rxword_ro_spare_1
Spare RO register
Spare RO register

Addresses AccessRestrictions are printed as (<Agent>:<Restriction>):
  0x0702afec at NOC.jesd__axi (Mem)

Access RO/V

Reset Information
Prio Type Properties Value/Mask (hex)
0 PowerUp , fully affected, fully defined 0x00000000

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Name rxword_ro_spare_1
Access RO/V

[31:00]
RO/V

rxword_ro_spare_1
rxword_ro_spare_1[31:0]
Spare register. Reseved for future

Reset: hex:0x00000000;

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